公开(公告)号：US20230051750A1

公开(公告)日：2023-02-16

申请号：US17689322

申请日：2022-03-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ingyu Jang ,  Jinbum Kim ,  Dahye Kim ,  Sujin Jung ,  Dongsuk Shin

IPC: H01L29/786 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L21/02 ,  H01L21/8234 ,  H01L21/764 ,  H01L29/66

Abstract: An integrated circuit (IC) device includes a fin-type active region on a substrate. A mesa-type channel region protrudes from the fin-type active region in a vertical direction. The mesa-type channel region is integrally connected with the fin-type active region. A gate line substantially surrounds a mesa-type channel region on the fin-type active region. A gate dielectric film is between the mesa-type channel region and the gate line. The mesa-type channel region includes: a plurality of round convex portions, which are convex toward the gate line; a concavo-convex sidewall, which includes a portion of each of the plurality of round convex portions and faces the gate line; and at least one void, which is inside the mesa-type channel region.

公开(公告)号：US11473755B2

公开(公告)日：2022-10-18

申请号：US17263702

申请日：2019-08-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Iksu Jung ,  Changjin Yang ,  Changwoo Jung ,  Jinwoo Kim ,  Heejun Park ,  Minseok Shin ,  Sujin Jung

IPC: F21V33/00 ,  F21V13/02 ,  F21V3/00 ,  F21V7/05 ,  F21V11/08 ,  F21V23/04

Abstract: An electronic apparatus according to an embodiment comprises: a housing including a first surface, a second surface facing the first surface, and a third surface which surrounds the inner space between the first surface and the second surface; a support member extending from the housing to the outside of the housing to support the housing; a speaker module arranged in the inner space; a first window arranged between the first surface and the speaker module and including a first light-transmitting surface facing the first surface and a first reflective surface facing away from the first light-transmitting surface; a second window arranged between the first window and the first surface and including a second light-transmitting surface facing the first surface and a second reflective surface facing away from the second light-transmitting surface; a light source module arranged between the first window and the speaker module; and a light diffusion member arranged between the light source module and the first reflective surface. The first window may include a light-transmitting region formed on at least a portion of the first reflective surface, through which light diffused by the light diffusion member transmits. Other embodiments are possible.

公开(公告)号：US11211456B2

公开(公告)日：2021-12-28

申请号：US16751726

申请日：2020-01-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sujin Jung ,  Kihwan Kim ,  Sunguk Jang ,  Youngdae Cho

IPC: H01L29/10 ,  H01L29/16 ,  H01L29/06 ,  H01L29/78 ,  H01L29/08

Abstract: A semiconductor device including: an active pattern on a substrate, the active pattern including a recess, the recess having a “V” shape; a growth prevention pattern on the recess; gate structures on portions of the active pattern at opposite sides of the recess; channels spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate, each of the channels extending through one of the gate structures; and a source/drain layer on the growth prevention pattern, the source/drain layer contacting the channels.

公开(公告)号：US20200381546A1

公开(公告)日：2020-12-03

申请号：US16732864

申请日：2020-01-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngdae Cho ,  Sunguk Jang ,  Sujin Jung ,  Jungtaek Kim ,  Sihyung Lee

IPC: H01L29/78 ,  H01L29/423

Abstract: A semiconductor device may include semiconductor patterns, a gate structure, a first spacer, a first semiconductor layer and a second semiconductor layer. The semiconductor patterns may be formed on a substrate, and may be spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate and may overlap in the vertical direction. The gate structure may be formed on the substrate and the semiconductor patterns. At least portion of the gate structure may be formed vertically between the semiconductor patterns. The first spacer may cover opposite sidewalls of the gate structure, the sidewalls opposite to each other in a first direction. The first semiconductor layer may cover the sidewalls of the semiconductor patterns in the first direction, and surfaces of the first spacer and the substrate. The first semiconductor layer may have a first concentration of impurities. The second semiconductor layer may be formed on the first semiconductor layer, and may have a second concentration of impurities different from the first concentration of impurities. The semiconductor device may have good characteristics and high reliability.

公开(公告)号：US10079305B2

公开(公告)日：2018-09-18

申请号：US14861748

申请日：2015-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byeongchan Lee ,  Nam-Kyu Kim ,  JinBum Kim ,  Kwan Heum Lee ,  Choeun Lee ,  Sujin Jung

IPC: H01L29/06 ,  H01L29/165 ,  H01L29/78 ,  H01L21/02 ,  H01L21/76 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7851 ,  H01L29/0649 ,  H01L29/0688 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848

Abstract: Provided are a semiconductor device and a method of fabricating the same. The device may include an active pattern protruding from a substrate, gate structures crossing the active pattern, and a source/drain region provided between adjacent ones of the gate structures. The source/drain region may include a source/drain epitaxial layer in a recessed region, which is formed in the active pattern between the adjacent ones of the gate structures. Further, an impurity diffusion region may be provided in the active pattern to enclose the source/drain epitaxial layer along inner surfaces of the recessed region.

公开(公告)号：US10068993B2

公开(公告)日：2018-09-04

申请号：US15871479

申请日：2018-01-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： JinBum Kim ,  Kang Hun Moon ,  Choeun Lee ,  Sujin Jung ,  Yang Xu

IPC: H01L29/66 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/78

Abstract: Methods of forming an integrated circuit device are provided. The methods may include forming a gate structure on a substrate, forming a first etch mask on a sidewall of the gate structure, anisotropically etching the substrate using the gate structure and the first etch mask as an etch mask to form a preliminary recess in the substrate, forming a sacrificial layer in the preliminary recess, forming a second etch mask on the first etch mask, etching the sacrificial layer and the substrate beneath the sacrificial layer using the gate structure and the first and second etch masks as an etch mask to form a source/drain recess in the substrate, and forming a source/drain in the source/drain recess. A sidewall of the source/drain recess may be recessed toward the gate structure relative to an outer surface of the second etch mask.

公开(公告)号：US09853160B2

公开(公告)日：2017-12-26

申请号：US15135566

申请日：2016-04-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sujin Jung ,  JinBum Kim ,  Kang Hun Moon ,  Kwan Heum Lee ,  Byeongchan Lee ,  Choeun Lee ,  Yang Xu

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7851 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/7848

Abstract: A semiconductor device is disclosed. The device includes a substrate including an active region defined by a device isolation layer, a fin pattern protruding from the substrate and extending in a first direction, the fin pattern including a gate fin region and a source/drain fin region, a gate pattern disposed on the gate fin region to extend in a second direction crossing the first direction, and a source/drain portion provided on a sidewall of the source/drain fin region. When measured in the second direction, a width of the source/drain fin region is different from a width in the second direction of the gate fin region.