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    Washing machine
    44.
    外观设计
    Washing machine 有权

    公开(公告)号：USD1015657S1

    公开(公告)日：2024-02-20

    申请号：US29829163

    申请日：2022-03-03

    Applicant: Samsung Electronics Co., Ltd.

    Designer： Jinnam Kim ,  Jinsook Park ,  Youngsun Shin ,  Sujin Oh ,  Dohyung Ha ,  Kyoungsoo Sun ,  Hoyoung Joo

    Abstract: FIG. 1 is a front perspective view of a washing machine, showing our new design;
    FIG. 2 is a front view thereof;
    FIG. 3 is a rear view thereof;
    FIG. 4 is a left-side view thereof;
    FIG. 5 is a right-side view thereof;
    FIG. 6 is a top view thereof;
    FIG. 7 is a bottom view thereof;
    FIG. 8 is an enlarged view of encircled portion 8 in FIG. 1;
    FIG. 9 is an enlarged view of encircled portion 9 in FIG. 1; and,
    FIG. 10 is an enlarged view of encircled portion 10 in FIG. 2.
    The even-dash broken lines illustrating portions of the washing machine form no part of the claimed design. The dot-dot-dash broken lines encircling enlarged portions of the claimed design form no part of the claimed design.

    Semiconductor device
    46.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11749587B2

    公开(公告)日：2023-09-05

    申请号：US17855902

    申请日：2022-07-01

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jinnam Kim ,  Seokho Kim ,  Hoonjoo Na ,  Kwangjin Moon

    IPC: H01L23/48 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66

    CPC classification number: H01L23/481 ,  H01L29/0649 ,  H01L29/0665 ,  H01L29/66795 ,  H01L29/785

    Abstract: A semiconductor device includes a substrate having a first surface on which an active region is disposed, and a second surface opposite the first surface, a buried conductive line extending in one direction and having a portion buried in the active region, an insulating portion covering the buried conductive line, a contact structure disposed on the insulating portion and connected to the buried conductive line, a through-hole extending from the second surface to the insulating portion and exposing the buried portion of the buried conductive line, an insulating isolation film disposed on a side surface of the buried conductive line and exposing a bottom surface of the buried portion and a side surface adjacent to the bottom surface, a through-via contacting the bottom surface and the adjacent side surface of the buried conductive line, an insulating liner surrounding the through-via.

    Semiconductor devices having penetration vias with portions having decreasing widths
    47.
    发明授权
    Semiconductor devices having penetration vias with portions having decreasing widths 有权

    公开(公告)号：US11664316B2

    公开(公告)日：2023-05-30

    申请号：US16849085

    申请日：2020-04-15

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hakseung Lee ,  Jinnam Kim ,  Hyoukyung Cho ,  Taeseong Kim ,  Kwangjin Moon

    IPC: H01L23/538

    CPC classification number: H01L23/5384 ,  H01L23/5385 ,  H01L2224/08146

    Abstract: A semiconductor device may include a first semiconductor substrate having a first surface and a second surface opposite to each other, a first circuit layer provided on the first surface of the first semiconductor substrate, a connection pad provided on the second surface of the first semiconductor substrate, and a first penetration via and a second penetration via penetrating the first semiconductor substrate and at least a portion of the first circuit layer. The first penetration via and the second penetration via may be provided in a first penetration hole and a second penetration hole, respectively. Each of the first and second penetration holes may include a first portion, a second portion, and a third portion. A width of the first portion of the first penetration hole may be smaller than a width of the first portion of the second penetration hole.

    Semiconductor device
    48.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11342221B2

    公开(公告)日：2022-05-24

    申请号：US16741187

    申请日：2020-01-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jaewon Hwang ,  Jinnam Kim ,  Kwangjin Moon ,  Kunsang Park ,  Myungjoo Park

    IPC: H01L21/768 ,  H01L21/02 ,  H01L21/306

    Abstract: Aspects of the present disclosure are related to a semiconductor device that includes a crystalline substrate having a first surface and a second surface vertically opposite each other and an insulating layer disposed on the first surface of the crystalline substrate. The device may also include an etch stop layer interposed between and contacting the crystalline substrate and the insulating layer and a conductive through via structure penetrating the crystalline substrate and the insulating layer. The device may also include an insulating separation layer disposed horizontally adjacent to the conductive through via structure, and having an inner wall and an outer wall. The insulating separation layer may include a first portion disposed between the conductive through via structure and the crystalline substrate, and a second portion disposed between the conductive through via structure and the etch stop layer.

    SEMICONDUCTOR DEVICE
    50.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210028112A1

    公开(公告)日：2021-01-28

    申请号：US16863126

    申请日：2020-04-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jinnam Kim ,  Kwangjin Moon ,  Hojin Lee ,  Pilkyu Kang ,  Hoonjoo Na

    IPC: H01L23/535 ,  H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L29/417 ,  H01L23/48 ,  H01L21/768 ,  H01L29/66

    Abstract: A semiconductor device includes a substrate having a first surface and a second surface opposite to each other, and having an active region located on the first surface and defined by a first isolation region; a plurality of active fins arranged on the active region, extending in a first direction, and defined by a second isolation region having a second depth smaller than a first depth of the first isolation region; a buried conductive wiring in a trench adjacent to the plurality of active fins, and extending in a direction of the trench; a filling insulation portion in the trench, and having the buried conductive wiring therein; an interlayer insulation layer on the first and second isolation regions and on the buried conductive wiring; a contact structure penetrating the interlayer insulation layer, and contacting the buried conductive wiring; and a conductive through structure extending through the substrate from the second surface to the trench, and contacting the buried conductive wiring.

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