Semiconductor device including through substrate vias and method of manufacturing the semiconductor device

    公开(公告)号:US11600553B2

    公开(公告)日:2023-03-07

    申请号:US17381287

    申请日:2021-07-21

    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. The semiconductor device includes a substrate, a first through substrate via configured to penetrate at least partially through the substrate, the first through substrate via having a first aspect ratio, and a second through substrate via configured to penetrate at least partially through the substrate. The second through substrate via has a second aspect ratio greater than the first aspect ratio, and each of the first through substrate via and the second through substrate via includes a first conductive layer and a second conductive layer. A thickness in a vertical direction of the first conductive layer of the first through substrate via is less than a thickness in the vertical direction of the first conductive layer of the second through substrate via.

    Semiconductor device including through substrate vias and method of manufacturing the semiconductor device

    公开(公告)号:US11101196B2

    公开(公告)日:2021-08-24

    申请号:US16795686

    申请日:2020-02-20

    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are disclosed. The semiconductor device includes a substrate, a first through substrate via configured to penetrate at least partially through the substrate, the first through substrate via having a first aspect ratio, and a second through substrate via configured to penetrate at least partially through the substrate. The second through substrate via has a second aspect ratio greater than the first aspect ratio, and each of the first through substrate via and the second through substrate via includes a first conductive layer and a second conductive layer. A thickness in a vertical direction of the first conductive layer of the first through substrate via is less than a thickness in the vertical direction of the first conductive layer of the second through substrate via.

    Semiconductor device
    6.
    发明授权

    公开(公告)号:US11342221B2

    公开(公告)日:2022-05-24

    申请号:US16741187

    申请日:2020-01-13

    Abstract: Aspects of the present disclosure are related to a semiconductor device that includes a crystalline substrate having a first surface and a second surface vertically opposite each other and an insulating layer disposed on the first surface of the crystalline substrate. The device may also include an etch stop layer interposed between and contacting the crystalline substrate and the insulating layer and a conductive through via structure penetrating the crystalline substrate and the insulating layer. The device may also include an insulating separation layer disposed horizontally adjacent to the conductive through via structure, and having an inner wall and an outer wall. The insulating separation layer may include a first portion disposed between the conductive through via structure and the crystalline substrate, and a second portion disposed between the conductive through via structure and the etch stop layer.

    Methods for fabricating semiconductor devices having through electrodes
    7.
    发明授权
    Methods for fabricating semiconductor devices having through electrodes 有权
    制造具有贯通电极的半导体器件的方法

    公开(公告)号:US09543200B2

    公开(公告)日:2017-01-10

    申请号:US14183817

    申请日:2014-02-19

    CPC classification number: H01L21/76864 H01L21/76873 H01L21/76898

    Abstract: Methods for fabricating semiconductor devices having through electrodes are provided. The method may comprise forming a via hole which opens towards an upper surface of a substrate and disconnects with a lower surface of the substrate; forming a via isolation layer which extends along an inner surface of the via hole and covers the upper surface of the substrate; forming a seed layer on the via isolation layer which extends along the via isolation layer; annealing the seed layer in-situ after forming the seed layer; forming a conductive layer, filling the via hole, by an electroplating using the seed layer; and planarizing the upper surface of the substrate to form a through electrode surrounded by the via isolation layer in the via hole.

    Abstract translation: 提供了具有通孔电极的制造半导体器件的方法。 该方法可以包括形成朝向衬底的上表面打开并且与衬底的下表面断开的通孔; 形成沿所述通孔的内表面延伸并覆盖所述基板的上表面的通孔隔离层; 在沿通孔隔离层延伸的通孔隔离层上形成晶种层; 在形成种子层之后,原位退火晶种层; 通过使用种子层的电镀形成导电层,填充所述通孔; 并且平坦化衬底的上表面以形成由通孔中的通孔隔离层包围的通孔。

    SEMICONDUCTOR DEVICE
    8.
    发明申请

    公开(公告)号:US20210066123A1

    公开(公告)日:2021-03-04

    申请号:US16741187

    申请日:2020-01-13

    Abstract: Aspects of the present disclosure are related to a semiconductor device that includes a crystalline substrate having a first surface and a second surface vertically opposite each other and an insulating layer disposed on the first surface of the crystalline substrate. The device may also include an etch stop layer interposed between and contacting the crystalline substrate and the insulating layer and a conductive through via structure penetrating the crystalline substrate and the insulating layer. The device may also include an insulating separation layer disposed horizontally adjacent to the conductive through via structure, and having an inner wall and an outer wall. The insulating separation layer may include a first portion disposed between the conductive through via structure and the crystalline substrate, and a second portion disposed between the conductive through via structure and the etch stop layer.

    Methods for Fabricating Semiconductor Devices Having Through Electrodes
    10.
    发明申请
    Methods for Fabricating Semiconductor Devices Having Through Electrodes 有权
    制造具有电极的半导体器件的方法

    公开(公告)号:US20140235052A1

    公开(公告)日:2014-08-21

    申请号:US14183817

    申请日:2014-02-19

    CPC classification number: H01L21/76864 H01L21/76873 H01L21/76898

    Abstract: Methods for fabricating semiconductor devices having through electrodes are provided. The method may comprise forming a via hole which opens towards an upper surface of a substrate and disconnects with a lower surface of the substrate; forming a via isolation layer which extends along an inner surface of the via hole and covers the upper surface of the substrate; forming a seed layer on the via isolation layer which extends along the via isolation layer; annealing the seed layer in-situ after forming the seed layer; forming a conductive layer, filling the via hole, by an electroplating using the seed layer; and planarizing the upper surface of the substrate to form a through electrode surrounded by the via isolation layer in the via hole.

    Abstract translation: 提供了具有通孔电极的制造半导体器件的方法。 该方法可以包括形成朝向衬底的上表面打开并且与衬底的下表面断开的通孔; 形成沿所述通孔的内表面延伸并覆盖所述基板的上表面的通孔隔离层; 在沿通孔隔离层延伸的通孔隔离层上形成晶种层; 在形成种子层之后,原位退火晶种层; 通过使用种子层的电镀形成导电层,填充通孔; 并且平坦化衬底的上表面以形成由通孔中的通孔隔离层包围的通孔。

Patent Agency Ranking