公开(公告)号：US08232121B2

公开(公告)日：2012-07-31

申请号：US12556914

申请日：2009-09-10

申请人： Chizu Kyotani ,  Naochika Horio

发明人： Chizu Kyotani ,  Naochika Horio

IPC分类号： H01L21/00 ,  H01L29/12

CPC分类号： H01L33/0095 ,  H01L33/0083 ,  H01L33/20

摘要： A semiconductor device that has excellent characteristics and mass productivity wherein the introduction of defects thereinto at the time of device separation is prevented, and a method for producing the semiconductor device. In particular, there is provided a high-performance semiconductor device having excellent luminous efficiency, longevity and mass productivity; and a method for producing this semiconductor device. The method for producing the semiconductor device has a step of forming, between a substrate comprising zinc oxide (ZnO) and a device operating layer, a defect-blocking layer having a crystal composition that is different from that of the substrate, and a step of forming device dividing grooves to a depth that goes beyond the defect-blocking layer, relative to the device operating layer side surface of the substrate on which the device operating layer is formed.

摘要翻译： 具有优异特性和质量生产率的半导体器件，其中防止在器件分离时引入缺陷，以及制造半导体器件的方法。 特别地，提供了具有优异的发光效率，寿命和批量生产率的高性能半导体器件; 以及该半导体装置的制造方法。 制造半导体器件的方法具有在包含氧化锌（ZnO）和器件工作层的衬底之间形成具有不同于衬底的晶体组成的缺陷阻挡层的步骤，以及 相对于其上形成有器件工作层的衬底的器件工作层侧表面，将器件分割槽形成为超过缺陷阻挡层的深度。

公开(公告)号：US20100295039A1

公开(公告)日：2010-11-25

申请号：US12784704

申请日：2010-05-21

申请人： Naochika Horio ,  Masayuki Makishima

发明人： Naochika Horio ,  Masayuki Makishima

IPC分类号： H01L29/22 ,  C30B23/00 ,  B32B9/04

CPC分类号： C30B29/16 ,  C30B25/02 ,  H01L29/22 ,  H01L33/0083

摘要： A method which has a step of growing a thermostable-state ZnO-based single crystal on a ZnO single crystal substrate at a growth temperature that is equal to or greater than 600° C. and less than 900° C. by using a metalorganic compound containing no oxygen and water vapor based on an MOCVD method.

摘要翻译： 在ZnO单晶基板上，通过使用金属有机化合物，在等于或高于600℃且小于900℃的生长温度下生长热稳定型ZnO基单晶的方法 基于MOCVD方法不含氧和水蒸气。

公开(公告)号：US07763898B2

公开(公告)日：2010-07-27

申请号：US11589297

申请日：2006-10-30

申请人： Satoshi Tanaka ,  Naochika Horio ,  Masahiko Tsuchiya

发明人： Satoshi Tanaka ,  Naochika Horio ,  Masahiko Tsuchiya

IPC分类号： H01L27/15 ,  H01L29/18 ,  H01L31/12 ,  H01L33/00

CPC分类号： H01L33/08 ,  H01L33/20 ,  H01L33/38 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2924/00

摘要： A light emitting device includes a lower semiconductor layer of a first conductivity type; an optical emission layer formed on said lower semiconductor layer; an upper semiconductor layer of a second conductivity type opposite to said first conductivity type, said upper semiconductor layer being formed on said optical emission layer; a lower side electrode electrically connected to said lower semiconductor layer; and an upper side electrode electrically connected to said upper semiconductor layer, wherein said upper side electrode is formed on said upper semiconductor layer, and said upper semiconductor layer has a mesh pattern defining a plurality of sections each surrounded by said upper side electrode, and wherein at least one dent is disposed in at least one of said sections, said dent having a bottom reaching at least an upper surface of said lower semiconductor layer and having an opening with an upper edge spaced apart from said upper side electrode.

摘要翻译： 发光器件包括第一导电类型的下半导体层; 形成在所述下半导体层上的光发射层; 与所述第一导电类型相反的第二导电类型的上半导体层，所述上半导体层形成在所述光发射层上; 电连接到所述下半导体层的下侧电极; 电连接到所述上半导体层的上侧电极，其中所述上侧电极形成在所述上半导体层上，并且所述上半导体层具有限定由所述上侧电极围绕的多个部分的网格图案，并且其中 至少一个凹痕设置在所述部分中的至少一个中，所述凹陷具有到达所述下半导体层的至少上表面的底部，并且具有开口，所述开口具有与所述上侧电极间隔开的上边缘。

公开(公告)号：US20070131941A1

公开(公告)日：2007-06-14

申请号：US11589297

申请日：2006-10-30

申请人： Satoshi Tanaka ,  Naochika Horio ,  Masahiko Tsuchiya

发明人： Satoshi Tanaka ,  Naochika Horio ,  Masahiko Tsuchiya

IPC分类号： H01L33/00 ,  H01L31/12 ,  H01L27/15 ,  H01L29/26

CPC分类号： H01L33/08 ,  H01L33/20 ,  H01L33/38 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2924/00

摘要： A light emitting device includes a lower semiconductor layer of a first conductivity type; an optical emission layer formed on said lower semiconductor layer; an upper semiconductor layer of a second conductivity type opposite to said first conductivity type, said upper semiconductor layer being formed on said optical emission layer; a lower side electrode electrically connected to said lower semiconductor layer; and an upper side electrode electrically connected to said upper semiconductor layer, wherein said upper side electrode is formed on said upper semiconductor layer, and said upper semiconductor layer has a mesh pattern defining a plurality of sections each surrounded by said upper side electrode, and wherein at least one dent is disposed in at least one of said sections, said dent having a bottom reaching at least an upper surface of said lower semiconductor layer and having an opening with an upper edge spaced apart from said upper side electrode.

摘要翻译： 发光器件包括第一导电类型的下半导体层; 形成在所述下半导体层上的光发射层; 与所述第一导电类型相反的第二导电类型的上半导体层，所述上半导体层形成在所述光发射层上; 电连接到所述下半导体层的下侧电极; 电连接到所述上半导体层的上侧电极，其中所述上侧电极形成在所述上半导体层上，并且所述上半导体层具有限定由所述上侧电极围绕的多个部分的网格图案，并且其中 至少一个凹痕设置在所述部分中的至少一个中，所述凹陷具有到达所述下半导体层的至少上表面的底部，并且具有开口，所述开口具有与所述上侧电极间隔开的上边缘。

公开(公告)号：US07193247B2

公开(公告)日：2007-03-20

申请号：US11276653

申请日：2006-03-09

申请人： Masahiko Tsuchiya ,  Naochika Horio ,  Kenichi Morikawa

发明人： Masahiko Tsuchiya ,  Naochika Horio ,  Kenichi Morikawa

IPC分类号： H01L33/00

CPC分类号： H01L33/40 ,  H01L21/28575 ,  H01L33/007 ,  H01L33/0095 ,  H01L2224/14

摘要： A GaN compound semiconductor device can be capable of free process design and can have optimum device characteristics. The device can include a group III nitride compound semiconductor laminate structure including an n-type GaN compound semiconductor layer and a p-type GaN compound semiconductor layer. An n electrode can be formed on the n-type GaN compound semiconductor layer, and a p electrode can be formed on the p-type GaN compound semiconductor layer. The n electrode preferably includes an Al layer of 1 to 10 nm, in contact with the n-type GaN compound semiconductor layer, and any metal layer of Rh, Ir, Pt, and Pd formed on the Al layer. The p electrode can be made of a 200 nm or less layer of of Pd, Pt, Rh, Pt/Rh, Pt/Ag, Rh/Ag, Pd/Rh, or Pd/Ag, in contact with the p-type GaN compound semiconductor layer. Both electrodes can make ohmic contact with respective n-type/p-type GaN semiconductors without application of active annealing.

摘要翻译： GaN化合物半导体器件能够具有自由工艺设计并具有最佳的器件特性。 该装置可以包括包括n型GaN化合物半导体层和p型GaN化合物半导体层的III族氮化物化合物半导体层叠结构。 可以在n型GaN化合物半导体层上形成n电极，并且可以在p型GaN化合物半导体层上形成p电极。 n电极优选包括与n型GaN化合物半导体层接触的1〜10nm的Al层，以及形成在Al层上的任何Rh，Ir，Pt和Pd的金属层。 p电极可以由与p型GaN接触的Pd，Pt，Rh，Pt / Rh，Pt / Ag，Rh / Ag，Pd / Rh或Pd / Ag的200nm或更少的层制成 化合物半导体层。 两个电极都可以与相应的n型/ p型GaN半导体进行欧姆接触，而不需要主动退火。

公开(公告)号：US07141825B2

公开(公告)日：2006-11-28

申请号：US10968761

申请日：2004-10-19

申请人： Naochika Horio ,  Masahiko Tsuchiya ,  Hitoshi Tamura

发明人： Naochika Horio ,  Masahiko Tsuchiya ,  Hitoshi Tamura

IPC分类号： H01L27/15 ,  H01L29/22

CPC分类号： H01L33/40 ,  H01L33/32 ,  H01L33/38 ,  H01L33/46 ,  H01L2224/02166 ,  H01L2224/0603 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49107 ,  H01L2224/8592 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A luminous lamination structure includes a first layer made of n-type nitride semiconductor and a second layer made of p-type nitride semiconductor and disposed over the first layer wherein a luminous region is defined between the first and second layers. The second layer is removed to expose the first layer in a first area which is a partial surface of the first layer. A p-side electrode is disposed on a surface of the second layer and electrically connected to the second layer. An insulating film covers the p-side electrode. An n-side electrode electrically connected to the first layer is disposed in the first area. A reflection film disposed on the insulating film extends to the n-side electrode and electrically connected to the n-side electrode. The reflection film is made of silver containing alloy or silver.

摘要翻译： 发光层压结构包括由n型氮化物半导体制成的第一层和由p型氮化物半导体制成的第二层，并且设置在第一层上，其中在第一层和第二层之间限定发光区域。 去除第二层以在作为第一层的部分表面的第一区域中露出第一层。 p侧电极设置在第二层的表面上并电连接到第二层。 绝缘膜覆盖p侧电极。 电连接到第一层的n侧电极设置在第一区域中。 设置在绝缘膜上的反射膜延伸到n侧电极并与n侧电极电连接。 反射膜由含银合金或银制成。

公开(公告)号：US07049160B2

公开(公告)日：2006-05-23

申请号：US10940690

申请日：2004-09-15

申请人： Masahiko Tsuchiya ,  Naochika Horio ,  Kenichi Morikawa

发明人： Masahiko Tsuchiya ,  Naochika Horio ,  Kenichi Morikawa

IPC分类号： H01L21/00

CPC分类号： H01L33/40 ,  H01L21/28575 ,  H01L33/007 ,  H01L33/0095 ,  H01L2224/14

摘要： A GaN compound semiconductor device can be capable of free process design and can have optimum device characteristics. The device can include a group III nitride compound semiconductor laminate structure including an n-type GaN compound semiconductor layer and a p-type GaN compound semiconductor layer. An n electrode can be formed on the n-type GaN compound semiconductor layer, and a p electrode can be formed on the p-type GaN compound semiconductor layer. The n electrode preferably includes an Al layer of 1 to 10 nm, in contact with the n-type GaN compound semiconductor layer, and any metal layer of Rh, Ir, Pt, and Pd formed on the Al layer. The p electrode can be made of a 200 nm or less layer of of Pd, Pt, Rh, Pt/Rh, Pt/Ag, Rh/Ag, Pd/Rh, or Pd/Ag, in contact with the p-type GaN compound semiconductor layer. Both electrodes can make ohmic contact with respective n-type/p-type GaN semiconductors without application of active annealing.

摘要翻译： GaN化合物半导体器件能够具有自由工艺设计并具有最佳的器件特性。 该装置可以包括包括n型GaN化合物半导体层和p型GaN化合物半导体层的III族氮化物化合物半导体层叠结构。 可以在n型GaN化合物半导体层上形成n电极，并且可以在p型GaN化合物半导体层上形成p电极。 n电极优选包括与n型GaN化合物半导体层接触的1〜10nm的Al层，以及形成在Al层上的任何Rh，Ir，Pt和Pd的金属层。 p电极可以由与p型GaN接触的Pd，Pt，Rh，Pt / Rh，Pt / Ag，Rh / Ag，Pd / Rh或Pd / Ag的200nm或更少的层制成 化合物半导体层。 两个电极都可以与相应的n型/ p型GaN半导体进行欧姆接触，而不需要主动退火。