公开(公告)号：US06482730B1

公开(公告)日：2002-11-19

申请号：US09510084

申请日：2000-02-22

申请人： Mutsumi Masumoto ,  Kenji Masumoto

发明人： Mutsumi Masumoto ,  Kenji Masumoto

IPC分类号： H01L2144

CPC分类号： H01L24/12 ,  H01L21/78 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/94 ,  H01L29/0657 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05647 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/013

摘要： A method to improve the resin sealing reliability in the manufacturing of a wafer-level CSP. The method for manufacturing a semiconductor device of the present invention includes a process that forms wiring 14 and conductive supports 16, which electrically connect electrode pads 10a and corresponding external terminals, on a wafer 10 on which semiconductor elements are formed. In subsequent processes, a groove 18 (preferably V shaped) is formed in the surface of the above-mentioned wafer along the boundary lines of the respective semiconductor elements. Next, the end surfaces of the above-mentioned conductive supports 16 are exposed, and the above-mentioned wafer surface is covered with a resin 19 so that external terminals 20 are arranged on the end surfaces of the conductive supports. In the final process, along the boundary lines of the above-mentioned semiconductor elements, packaged semiconductor devices 32 are obtained by dicing the above-mentioned wafer.

摘要翻译： 一种提高晶片级CSP制造中的树脂密封可靠性的方法。 本发明的半导体器件的制造方法包括在其上形成有半导体元件的晶片10上形成布线14和将电极焊盘10a和对应的外部端子电连接的导电支撑体16的工序。 在随后的处理中，沿着各个半导体元件的边界线，在上述晶片的表面中形成有槽18（优选为V形）。 接下来，将上述导电支撑体16的端面露出，上述晶片表面被树脂19覆盖，使得外部端子20布置在导电支撑件的端面上。 在最后的方法中，沿着上述半导体元件的边界线，通过切割上述晶片获得封装的半导体器件32。