公开(公告)号：US11598742B2

公开(公告)日：2023-03-07

申请号：US17137251

申请日：2020-12-29

申请人： Texas Instruments Incorporated

发明人： Enis Tuncer ,  Vikas Gupta

IPC分类号： H01L21/768 ,  G01N27/22 ,  H01L23/522 ,  H01L23/00

摘要： Described examples include a sensor device having at least one conductive elongated first pillar positioned on a central pad of a first conductor layer over a semiconductor substrate, the first pillar extending in a first direction normal to a plane of a surface of the first conductor layer. Conductive elongated second pillars are positioned in normal orientation on a second conductor layer over the semiconductor substrate, the conductive elongated second pillars at locations coincident to via openings in the first conductor layer. The second conductor layer is parallel to and spaced from the first conductor layer by at least an insulator layer, the conductive elongated second pillars extending in the first direction through a respective one of the via openings. The at least one conductive elongated first pillar is spaced from surrounding conductive elongated second pillars by gaps.

公开(公告)号：US20220319988A1

公开(公告)日：2022-10-06

申请号：US17218941

申请日：2021-03-31

申请人： Texas Instruments Incorporated

发明人： Enis Tuncer

IPC分类号： H01L23/525 ,  H01L23/498 ,  H01L23/00

摘要： In a described example, an apparatus includes: a package substrate having a die pad configured for mounting a semiconductor die, and leads spaced from the die pad; a semiconductor die mounted on the die pad; a fuse mounted to a lead, the fuse having a fuse element coupled between a fuse cap and the lead, the fuse having a fuse body with an opening surrounding the fuse element, the fuse cap attached to the fuse body; electrical connections coupling the semiconductor die to the fuse; and mold compound covering the semiconductor die, the fuse, the electrical connections, and a portion of the package substrate, with portions of the leads exposed from the mold compound to form terminals.

公开(公告)号：US20220208699A1

公开(公告)日：2022-06-30

申请号：US17138903

申请日：2020-12-31

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Enis Tuncer

IPC分类号： H01L23/62 ,  H01L23/31 ,  H01L23/24 ,  H02H7/00 ,  H01L21/56 ,  H01L23/00

摘要： A semiconductor package includes a metallic pad and leads, a semiconductor die including a semiconductor substrate attached to the metallic pad, and a conductor including a sacrificial fuse element above the semiconductor substrate, the sacrificial fuse element being electrically coupled between one of the leads and at least one terminal of the semiconductor die, a shock-absorbing material over a profile of the sacrificial fuse element, and mold compound covering the semiconductor die, the conductor, and the shock-absorbing material, and partially covering the metallic pad and leads, with the metallic pad and the leads exposed on an outer surface of the semiconductor package. Either a glass transition temperature of the shock-absorbing material or a melting point of the shock-absorbing material is lower than a melting point of the conductor.

公开(公告)号：US20220140154A1

公开(公告)日：2022-05-05

申请号：US17088963

申请日：2020-11-04

申请人： Texas Instruments Incorporated

发明人： Enis Tuncer

IPC分类号： H01L31/0203 ,  H01L31/02 ,  H01L31/173 ,  G01J1/02

摘要： An optical sensor package includes an IC die including a light sensor element, an output node, and bond pads including a bond pad coupled to the output node. A leadframe includes a plurality of leads or lead terminals, wherein at least some of the plurality of leads or lead terminals are coupled to the bond pads including to the bond pad coupled to the output node. A mold compound provides encapsulation for the optical sensor package including for the light sensor element. The mold compound includes a polymer-base material having filler particles including at least one of infrared or terahertz transparent particle composition provided in a sufficient concentration so that the mold compound is optically transparent for providing an optical transparency of at least 50% for a minimum mold thickness of 500 μm in a portion of at least one of an infrared frequency range and a terahertz frequency range.

公开(公告)号：US20210231729A1

公开(公告)日：2021-07-29

申请号：US17158994

申请日：2021-01-26

申请人： Texas Instruments Incorporated

发明人： Ming-Chuan You ,  Andrew Patrick Couch ,  Phillip Marcus Blitz ,  Xinkun Huang ,  Chi-Tsung Lee ,  Roy Deidrick Solomon ,  Enis Tuncer

IPC分类号： G01R31/28

摘要： An integrated circuit testing assembly that includes: (i) a first slug configured to contact a first surface of a first set of pins of an integrated circuit; (ii) a second slug configured to contact a second surface of the first set of pins of the integrated circuit; (iii) a third slug configured to contact a first surface of a second set of pins of the integrated circuit; and (iv) a fourth slug configured to contact a second surface of the second set of pins of the integrated circuit.

公开(公告)号：US12027572B2

公开(公告)日：2024-07-02

申请号：US17491451

申请日：2021-09-30

申请人： Texas Instruments Incorporated

发明人： Enis Tuncer

IPC分类号： H01L23/64 ,  H01L23/00 ,  H01L25/065 ,  H01L49/02

CPC分类号： H01L28/10 ,  H01L23/645 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/48177 ,  H01L2924/1425

摘要： In a described example, an apparatus includes a transformer including: an isolation dielectric layer with a first surface and a second surface opposite the first surface; a first inductor formed over the first surface, the first inductor comprising a first layer of ferrite material, and a first coil at least partially covered by the first layer of ferrite material; and a second inductor formed over the second surface, the second inductor comprising a second layer of ferrite material and a second coil at least partially covered by the second layer of ferrite material.

公开(公告)号：US11881461B2

公开(公告)日：2024-01-23

申请号：US17491522

申请日：2021-09-30

申请人： Texas Instruments Incorporated

发明人： Enis Tuncer

IPC分类号： H01L23/60 ,  H01L23/00

CPC分类号： H01L23/60 ,  H01L24/05 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647

摘要： In a described example, an apparatus includes: a semiconductor die having bond pads on a device side surface, the semiconductor die having a ground plane spaced from the bond pads by a spacing distance. The bond pads have an upper surface for receiving a ball bond, and an outer boundary, the bond pads having vertical sides extending from the upper surface to a bottom surface, the bottom surface formed over the device side surface of the semiconductor die. A protective overcoat (PO) is formed overlying the ground plane and overlying the vertical sides of the bond pads, and overlying a portion of the upper surface of the bond pads, and having an opening exposing the remaining portion of the upper surface of the bond pads, the protective overcoat having a dielectric constant of less than 3.8.

公开(公告)号：US20230245957A1

公开(公告)日：2023-08-03

申请号：US18295793

申请日：2023-04-04

申请人： Texas Instruments Incorporated

发明人： Enis Tuncer

IPC分类号： H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  G01R19/00 ,  G01R15/20 ,  H10N52/00

CPC分类号： H01L23/49541 ,  H01L23/3107 ,  H01L24/05 ,  H01L21/4803 ,  H01L24/85 ,  H01L21/56 ,  G01R19/0092 ,  G01R15/202 ,  H10N52/101 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/48175

摘要： In a described example, an apparatus includes: a lead frame having a first portion and having a second portion electrically isolated from the first portion, the first portion having a side surface normal to a planar opposite surface, and having a recessed edge that is notched or chamfered and extending between the side surface and a planar device side surface; a spacer dielectric mounted to the planar device side surface and partially covered by the first portion, and extending beyond the first portion; a semiconductor die mounted to the spacer dielectric, the semiconductor die partially covered by the spacer dielectric and extending beyond the spacer dielectric; the second portion of the lead frame comprising leads coupled to the semiconductor die by electrical connections; and mold compound covering the semiconductor die, the electrical connections, the spacer dielectric, and partially covering the first portion and the second portion.

公开(公告)号：US11594474B2

公开(公告)日：2023-02-28

申请号：US17246568

申请日：2021-04-30

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Enis Tuncer

IPC分类号： H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

摘要： In some examples, a semiconductor package comprises a semiconductor die; a conductive member coupled to the semiconductor die; and a wirebonded protrusion coupled to the conductive member. A physical structure of the wirebonded protrusion is determined at least in part by a sequence of movements of a wirebonding capillary used to form the wirebonded protrusion, the wirebonded protrusion including a ball bond and a bond wire, and the bond wire having a proximal end coupled to the ball bond. The bond wire has a distal end. The package also comprises a mold compound covering the semiconductor die, the conductive member, and the wirebonded protrusion. The distal end is in a common vertical plane with the ball bond and is not connected to a structure other than the mold compound.

公开(公告)号：US20220384370A1

公开(公告)日：2022-12-01

申请号：US17330621

申请日：2021-05-26

申请人： Texas Instruments Incorporated

发明人： Enis Tuncer

IPC分类号： H01L23/64 ,  H01L23/31 ,  H01L23/495 ,  H01L49/02 ,  H01L21/48 ,  H01L21/56

摘要： An electronic device includes a magnetic assembly with a multilevel lamination or metallization structure having a core layer, dielectric layers and conductive features formed in metal layers on or between the dielectric layers in respective planes of orthogonal first and second directions and stacked along an orthogonal third direction. The conductive features include first and second patterned conductive features forming first and second windings, first and second conductive capacitor plates, and first and second conductive field plates, in which the first conductive capacitor plate is between the first conductive field plate and the core layer along the third direction and the second conductive capacitor plate is between the second conductive field plate and the core layer along the third direction.