公开(公告)号：US20170017166A1

公开(公告)日：2017-01-19

申请号：US14798563

申请日：2015-07-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yung-Yao Lee ,  Heng-Hsin Liu ,  Jui-Chun Peng ,  Yung-Cheng Chen

IPC: G03F7/20 ,  G03F7/32

CPC classification number: G03F7/70633

Abstract: The present disclosure relates to a method of semiconductor processing. The method includes, receiving a first wafer having a photoresist coating on a face of the first wafer. An exposure unit is used to perform a first number of radiation exposures on the photoresist coating, thereby forming an exposed photoresist coating. The exposed photoresist coating is developed, thereby forming a developed photoresist coating. An OVL measurement zone pattern is selected from a number of different, pre-determined OVL measurement zone patterns based on at least one of: the first number of radiation exposures performed on the first wafer or a previous number of radiation exposures performed on a previously processed wafer, which was processed before the first wafer. A number of OVL measurements are performed on the developed photoresist coating within the selected OVL measurement zone pattern.

Abstract translation: 本公开涉及一种半导体处理方法。 该方法包括：在第一晶片的表面上接收具有光致抗蚀剂涂层的第一晶片。 曝光单元用于在光致抗蚀剂涂层上执行第一数量的辐射照射，由此形成曝光的光致抗蚀剂涂层。 曝光的光致抗蚀剂涂层被显影，从而形成显影的光刻胶涂层。 基于以下至少一个，从多个不同的预定OVL测量区域图案中选择OVL测量区域图案：在第一晶片上执行的第一数量的辐射曝光或对先前处理的OVL测量区域图案执行的先前数量的辐射曝光 晶片，其在第一晶片之前被处理。 在所选择的OVL测量区域图案中对所开发的光致抗蚀剂涂层进行多个OVL测量。

公开(公告)号：US09123583B2

公开(公告)日：2015-09-01

申请号：US13940335

申请日：2013-07-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Hsien Lin ,  Kuo-Hung Chao ,  Yi-Ping Hsieh ,  Yen-Di Tsen ,  Jui-Chun Peng ,  Heng-Hsin Liu ,  Jong-I Mou

IPC: G01N21/00 ,  H01L21/66 ,  G01N21/95 ,  G03F7/00 ,  G01B13/06 ,  G01B11/24

CPC classification number: H01L22/12 ,  G01B11/24 ,  G01B13/065 ,  G01B2210/56 ,  G01N21/9501 ,  G03F7/00 ,  G03F7/70533 ,  G03F9/7003 ,  H01L22/20 ,  H01L22/30

Abstract: The present disclosure relates to a method of monitoring wafer topography. A position and orientation of a plurality first alignment shapes disposed on a surface of a wafer are measured. Wafer topography as a function of wafer position is modeled by subjecting the wafer to an alignment which simultaneously minimizes misalignment between the wafer and a patterning apparatus and maximizes a focus of radiation on the surface. A non-correctable error is determined as a difference between the modeled wafer topography and a measured wafer topography. A maximum non-correctable error per field is determined for a wafer, and a mean variation in the maximum non-correctable error across each field within each wafer of a lot is determined, both within a layer and across layers. These values are then verified against a set of statistical process control rules to determine if they are within a specification limit of the manufacturing process.

Abstract translation: 本公开涉及一种监测晶片形貌的方法。 测量设置在晶片表面上的多个第一对准形状的位置和取向。 作为晶片位置的函数的晶片形貌通过使晶片经受对准，同时最小化晶片和图案形成装置之间的未对准并使辐射在表面上的焦点最大化来建模。 不可校正误差被确定为模拟晶片形貌与测量的晶片形貌之间的差异。 对于晶片确定每场的最大不可校正误差，并且在层内和跨层中确定在批次的每个晶片内的每个场上的每个场的最大不可校正误差的平均变化。 然后根据一组统计过程控制规则验证这些值，以确定它们是否在制造过程的规格限制内。