Overlay Abnormality Gating by Z Data
    2.
    发明申请
    Overlay Abnormality Gating by Z Data 有权
    叠加异常门控Z数据

    公开(公告)号:US20150015870A1

    公开(公告)日:2015-01-15

    申请号:US13940335

    申请日:2013-07-12

    Abstract: The present disclosure relates to a method of monitoring wafer topography. A position and orientation of a plurality first alignment shapes disposed on a surface of a wafer are measured. Wafer topography as a function of wafer position is modeled by subjecting the wafer to an alignment which simultaneously minimizes misalignment between the wafer and a patterning apparatus and maximizes a focus of radiation on the surface. A non-correctable error is determined as a difference between the modeled wafer topography and a measured wafer topography. A maximum non-correctable error per field is determined for a wafer, and a mean variation in the maximum non-correctable error across each field within each wafer of a lot is determined, both within a layer and across layers. These values are then verified against a set of statistical process control rules to determine if they are within a specification limit of the manufacturing process.

    Abstract translation: 本公开涉及一种监测晶片形貌的方法。 测量设置在晶片表面上的多个第一对准形状的位置和取向。 作为晶片位置的函数的晶片形貌通过使晶片经受对准,同时最小化晶片和图案形成装置之间的未对准并使辐射在表面上的焦点最大化来建模。 不可校正误差被确定为模拟晶片形貌与测量的晶片形貌之间的差异。 对于晶片确定每场的最大不可校正误差,并且在层内和跨层中确定在批次的每个晶片内的每个场上的每个场的最大不可校正误差的平均变化。 然后根据一组统计过程控制规则验证这些值,以确定它们是否在制造过程的规格限制内。

    In-line inspection and clean for immersion lithography

    公开(公告)号:US09658536B2

    公开(公告)日:2017-05-23

    申请号:US14189975

    申请日:2014-02-25

    CPC classification number: G03F7/70341 G03F7/70925

    Abstract: An immersion lithography apparatus includes a lens system, an immersion hood, a wafer stage, an inspection system and a cleaning fluid supplier. The lens system is configured to project a pattern onto a wafer. The immersion hood is configured to confine an immersion fluid between the lens system and the wafer, and includes a peripheral hole configured to suck up the immersion fluid. The wafer stage is configured to position the wafer under the lens system. The inspection system is configured to detect whether there is contamination in the peripheral hole. The cleaning fluid supplier is coupled to the inspection system and configured to supply a cleaning fluid through the peripheral hole to remove the contamination, in which the inspection system and the cleaning fluid supplier are coupled to the wafer stage.

    Flexible wafer leveling design for various orientation of line/trench
    4.
    发明授权
    Flexible wafer leveling design for various orientation of line/trench 有权
    灵活的晶圆调平设计,适用于各种定向/沟槽

    公开(公告)号:US09228827B2

    公开(公告)日:2016-01-05

    申请号:US13913584

    申请日:2013-06-10

    CPC classification number: G01B11/0608 G03F9/7026 G03F9/7034

    Abstract: The present disclosure relates to a photolithography system having an ambulatory projection and/or detection gratings that provide for high quality height measurements without the use of an air gauge. In some embodiments, the photolithography system has a level sensor having a projection source that generates a measurement beam that is provided to a semiconductor substrate via a projection grating. A detector is positioned to receive a measurement beam reflected from the semiconductor substrate via a detection grating. An ambulatory element selectively varies an orientation of the projection grating and/or the detection grating to improve the measurement of the level sensor. By selectively varying an orientation of the projection and/or detection gratings, erroneous measurements of the level sensor can be eliminated.

    Abstract translation: 本公开涉及一种具有移动式投影和/或检测光栅的光刻系统,其提供高质量的高度测量而不使用空气规。 在一些实施例中,光刻系统具有液位传感器,该液位传感器具有产生经由投影光栅提供给半导体基板的测量光束的投影源。 检测器被定位成经由检测光栅接收从半导体衬底反射的测量光束。 移动元件选择性地改变投影光栅和/或检测光栅的取向以改进液位传感器的测量。 通过选择性地改变投影和/或检测光栅的取向,可以消除液位传感器的错误测量。

    Synchronized integrated metrology for overlay-shift reduction

    公开(公告)号:US09841687B2

    公开(公告)日:2017-12-12

    申请号:US14798563

    申请日:2015-07-14

    CPC classification number: G03F7/70633

    Abstract: The present disclosure relates to a method of semiconductor processing. The method includes, receiving a first wafer having a photoresist coating on a face of the first wafer. An exposure unit is used to perform a first number of radiation exposures on the photoresist coating, thereby forming an exposed photoresist coating. The exposed photoresist coating is developed, thereby forming a developed photoresist coating. An OVL measurement zone pattern is selected from a number of different, pre-determined OVL measurement zone patterns based on at least one of: the first number of radiation exposures performed on the first wafer or a previous number of radiation exposures performed on a previously processed wafer, which was processed before the first wafer. A number of OVL measurements are performed on the developed photoresist coating within the selected OVL measurement zone pattern.

    FLEXIBLE WAFER LEVELING DESIGN FOR VARIOUS ORIENTATION OF LINE/TRENCH
    6.
    发明申请
    FLEXIBLE WAFER LEVELING DESIGN FOR VARIOUS ORIENTATION OF LINE/TRENCH 有权
    灵活的水平设计,适用于各种方向的线/ TRENCH

    公开(公告)号:US20140362359A1

    公开(公告)日:2014-12-11

    申请号:US13913584

    申请日:2013-06-10

    CPC classification number: G01B11/0608 G03F9/7026 G03F9/7034

    Abstract: The present disclosure relates to a photolithography system having an ambulatory projection and/or detection gratings that provide for high quality height measurements without the use of an air gauge. In some embodiments, the photolithography system has a level sensor having a projection source that generates a measurement beam that is provided to a semiconductor substrate via a projection grating. A detector is positioned to receive a measurement beam reflected from the semiconductor substrate via a detection grating. An ambulatory element selectively varies an orientation of the projection grating and/or the detection grating to improve the measurement of the level sensor. By selectively varying an orientation of the projection and/or detection gratings, erroneous measurements of the level sensor can be eliminated.

    Abstract translation: 本公开涉及一种具有移动式投影和/或检测光栅的光刻系统,其提供高质量的高度测量而不使用空气计。 在一些实施例中,光刻系统具有液位传感器,该液位传感器具有产生经由投影光栅提供给半导体基板的测量光束的投影源。 检测器被定位成经由检测光栅接收从半导体衬底反射的测量光束。 移动元件选择性地改变投影光栅和/或检测光栅的取向以改进液位传感器的测量。 通过选择性地改变投影和/或检测光栅的取向,可以消除液位传感器的错误测量。

    Exposure method and exposure apparatus

    公开(公告)号:US11500299B2

    公开(公告)日:2022-11-15

    申请号:US16994804

    申请日:2020-08-17

    Abstract: In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.

    Synchronized Integrated Metrology for Overlay-Shift Reduction
    9.
    发明申请
    Synchronized Integrated Metrology for Overlay-Shift Reduction 有权
    同步综合测量用于覆盖减少

    公开(公告)号:US20170017166A1

    公开(公告)日:2017-01-19

    申请号:US14798563

    申请日:2015-07-14

    CPC classification number: G03F7/70633

    Abstract: The present disclosure relates to a method of semiconductor processing. The method includes, receiving a first wafer having a photoresist coating on a face of the first wafer. An exposure unit is used to perform a first number of radiation exposures on the photoresist coating, thereby forming an exposed photoresist coating. The exposed photoresist coating is developed, thereby forming a developed photoresist coating. An OVL measurement zone pattern is selected from a number of different, pre-determined OVL measurement zone patterns based on at least one of: the first number of radiation exposures performed on the first wafer or a previous number of radiation exposures performed on a previously processed wafer, which was processed before the first wafer. A number of OVL measurements are performed on the developed photoresist coating within the selected OVL measurement zone pattern.

    Abstract translation: 本公开涉及一种半导体处理方法。 该方法包括:在第一晶片的表面上接收具有光致抗蚀剂涂层的第一晶片。 曝光单元用于在光致抗蚀剂涂层上执行第一数量的辐射照射,由此形成曝光的光致抗蚀剂涂层。 曝光的光致抗蚀剂涂层被显影,从而形成显影的光刻胶涂层。 基于以下至少一个,从多个不同的预定OVL测量区域图案中选择OVL测量区域图案:在第一晶片上执行的第一数量的辐射曝光或对先前处理的OVL测量区域图案执行的先前数量的辐射曝光 晶片,其在第一晶片之前被处理。 在所选择的OVL测量区域图案中对所开发的光致抗蚀剂涂层进行多个OVL测量。

    Overlay abnormality gating by Z data
    10.
    发明授权
    Overlay abnormality gating by Z data 有权
    叠加异常门控Z数据

    公开(公告)号:US09123583B2

    公开(公告)日:2015-09-01

    申请号:US13940335

    申请日:2013-07-12

    Abstract: The present disclosure relates to a method of monitoring wafer topography. A position and orientation of a plurality first alignment shapes disposed on a surface of a wafer are measured. Wafer topography as a function of wafer position is modeled by subjecting the wafer to an alignment which simultaneously minimizes misalignment between the wafer and a patterning apparatus and maximizes a focus of radiation on the surface. A non-correctable error is determined as a difference between the modeled wafer topography and a measured wafer topography. A maximum non-correctable error per field is determined for a wafer, and a mean variation in the maximum non-correctable error across each field within each wafer of a lot is determined, both within a layer and across layers. These values are then verified against a set of statistical process control rules to determine if they are within a specification limit of the manufacturing process.

    Abstract translation: 本公开涉及一种监测晶片形貌的方法。 测量设置在晶片表面上的多个第一对准形状的位置和取向。 作为晶片位置的函数的晶片形貌通过使晶片经受对准,同时最小化晶片和图案形成装置之间的未对准并使辐射在表面上的焦点最大化来建模。 不可校正误差被确定为模拟晶片形貌与测量的晶片形貌之间的差异。 对于晶片确定每场的最大不可校正误差,并且在层内和跨层中确定在批次的每个晶片内的每个场上的每个场的最大不可校正误差的平均变化。 然后根据一组统计过程控制规则验证这些值,以确定它们是否在制造过程的规格限制内。

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