Sewing machine and sewing machine operating program recorded on computer-readable recording medium
    41.
    发明申请
    Sewing machine and sewing machine operating program recorded on computer-readable recording medium 有权
    缝纫机和缝纫机操作程序记录在计算机可读记录介质上

    公开(公告)号:US20080006193A1

    公开(公告)日:2008-01-10

    申请号:US11822091

    申请日:2007-07-02

    IPC分类号: G05B19/04

    摘要: A sewing machine and a sewing machine operating program stored on a computer-readable medium for changing display items displayed on a liquid crystal display of a sewing machine on a page by page basis, when an output signal of an operation of rolling forward or backward a mouse wheel is detected. The sewing machine may include a display device that displays a variety of information related to sewing and a display item storage device that stores display items to be displayed on the display device. The sewing machine may also include an operation device that includes an operating member for performing plural types of operations and a display control device that changes the display item displayed on the display device in response to at least one of the operation type or the operation quantity outputted by the operation device.

    摘要翻译: 一种缝纫机和缝纫机操作程序,其存储在计算机可读介质上,用于逐页地改变显示在缝纫机的液晶显示器上的显示项目,当前进或后退的操作的输出信号 检测到鼠标滚轮。 缝纫机可以包括显示与缝制有关的各种信息的显示装置和存储要显示在显示装置上的显示项目的显示项目存储装置。 缝纫机还可以包括操作装置,其包括用于执行多种操作的操作构件和显示控制装置,该显示控制装置响应于输出的操作类型或操作量中的至少一个来改变显示在显示装置上的显示项目 由操作装置。

    Television broadcast receiving apparatus, television broadcast receiving method, and television broadcast receiving program
    42.
    发明授权
    Television broadcast receiving apparatus, television broadcast receiving method, and television broadcast receiving program 失效
    电视广播接收装置,电视广播接收方式以及电视广播接收节目

    公开(公告)号:US07230734B2

    公开(公告)日:2007-06-12

    申请号:US10094823

    申请日:2002-03-12

    申请人: Takashi Hirata

    发明人: Takashi Hirata

    IPC分类号: G06F3/12 G06F15/00

    摘要: In a system for receiving a television broadcast, when a printer is connected to a receiving apparatus for use, a printer driver which controls the printer is automatically registered. For this purpose, a television broadcast receiving apparatus includes a unit for setting download information for a printer driver to be retrieved, a unit for retrieving a printer driver file which is specified by the set download information with the television broadcast, and a unit for installing the printer driver file into a storage unit so as to be executable.

    摘要翻译: 在用于接收电视广播的系统中,当打印机连接到接收设备使用时,自动登记控制打印机的打印机驱动程序。 为此,电视广播接收装置包括用于设置要检索的打印机驱动程序的下载信息的单元,用于通过电视广播来检索由设置的下载信息指定的打印机驱动程序文件的单元和用于安装的单元 将打印机驱动程序文件写入存储单元以便可执行。

    NETWORK DEVICE AND CONTROL METHOD OF THE SAME
    43.
    发明申请
    NETWORK DEVICE AND CONTROL METHOD OF THE SAME 有权
    网络设备及其控制方法

    公开(公告)号:US20070067430A1

    公开(公告)日:2007-03-22

    申请号:US11461852

    申请日:2006-08-02

    IPC分类号: G06F15/173

    摘要: A network device obtains capability information of a device existing on a network, activites/inactivates one of a plurality of types of communication middleware on the basis of the obtained capability information, and executes communication between devices across the network by using the communication middleware. The network device also analyses a protocol used by communication middleware of another device on the network, and corrects the corresponding communication middleware in accordance with the result of analysis.

    摘要翻译: 网络设备获取网络上存在的设备的能力信息,根据所获得的能力信息,激活/停用多种类型的通信中间件中的一种,并且通过使用通信中间件来执行跨网络的设备之间的通信。 网络设备还分析了网络上另一设备的通信中间件使用的协议,并根据分析结果对相应的通信中间件进行了修正。

    Sewing machine capable of embroidery sewing and display control program therefor
    45.
    发明申请
    Sewing machine capable of embroidery sewing and display control program therefor 有权
    缝纫缝纫机及其显示控制程序

    公开(公告)号:US20060027154A1

    公开(公告)日:2006-02-09

    申请号:US11196711

    申请日:2005-08-04

    IPC分类号: D05B19/00

    CPC分类号: D05B19/105

    摘要: An electronic sewing machine M capable of embroidery stitching is provided with an embroidery frame driving mechanism for driving a embroidery frame based on embroidery stitching data, in the case of a large-size embroidery pattern larger than the embroidery area of the embroidery frame, capable of dividing the pattern into a plurality of divided patterns to perform the embroidery stitching. Included are an embroidery stitching data storage unit that stores embroidery stitching data of a plurality of divided patterns of a plurality of large-size embroidery patterns; a display adapted to display the embroidery patterns etc.; a pattern display data storage unit that stores a plurality of pattern display data for displaying each of the large-size embroidery patterns on the display in a real image close to an embroidered state; and a display control device that reads out pattern display data of an appointed large-size embroidery pattern from the pattern display data storage unit and controls the display to display an image thereon.

    摘要翻译: 具有刺绣缝合的电子缝纫机M设有刺绣框架驱动机构,用于以刺绣缝合数据驱动刺绣框架,在大于刺绣框架的刺绣区域的大尺寸刺绣图案的情况下,能够 将图案分割为多个分割图案以执行刺绣缝合。 包括一个刺绣缝合数据存储单元,其存储多个大尺寸刺绣图案的多个划分图案的刺绣缝合数据; 适于显示绣花图案的显示器; 图案显示数据存储单元,存储用于以接近于绣制状态的实际图像显示在显示器上的每个大尺寸刺绣图案的多个图案显示数据; 以及显示控制装置,其从图案显示数据存储单元读出指定的大尺寸刺绣图案的图案显示数据,并控制显示以在其上显示图像。

    Semiconductor integrated circuit with voltage-detecting circuit and signal transmitting and receiving system
    46.
    发明授权
    Semiconductor integrated circuit with voltage-detecting circuit and signal transmitting and receiving system 失效
    具有电压检测电路和信号发射和接收系统的半导体集成电路

    公开(公告)号:US06944003B2

    公开(公告)日:2005-09-13

    申请号:US10365527

    申请日:2003-02-13

    CPC分类号: H02H9/046

    摘要: A first semiconductor integrated circuit is connected to a second semiconductor integrated circuit with a cable. In the first semiconductor integrated circuit, when a power supply voltage becomes less than a set voltage detection level, a voltage-detecting circuit outputs a voltage-detected signal to lower the voltage of the cable and to stop the operation. The second semiconductor integrated circuit detects the decrease in the voltage of the cable to recognize the halt of the operation of the first semiconductor integrated circuit. In the first semiconductor integrated circuit thus configured, in testing the operation under low-voltage conditions in which the power supply voltage is less than the set voltage detection level, the voltage-detecting circuit receives a control signal from an external terminal to stop the operation forcibly. Consequently, even when the power supply voltage is made lower than the set voltage-detecting level, the first semiconductor integrated circuit properly operates until the power supply voltage reaches a predetermined lower limit of operating voltage. Thus, evaluation of operation is possible under low-voltage conditions.

    摘要翻译: 第一半导体集成电路通过电缆连接到第二半导体集成电路。 在第一半导体集成电路中,当电源电压变得小于设定电压检测电平时,电压检测电路输出电压检测信号来降低电缆的电压并停止工作。 第二半导体集成电路检测电缆的电压的降低以识别第一半导体集成电路的操作停止。 在这样配置的第一半导体集成电路中,在电源电压小于设定电压检测电平的低电压条件下进行测试时,电压检测电路从外部端子接收控制信号,停止动作 强制。 因此,即使电源电压低于设定电压检测电平,第一半导体集成电路也可以正常工作,直到电源电压达到预定的工作电压下限。 因此,在低电压条件下可以进行运行评估。

    Apparatus and method for transmitting command
    47.
    发明申请
    Apparatus and method for transmitting command 有权
    发送命令的装置和方法

    公开(公告)号:US20050060419A1

    公开(公告)日:2005-03-17

    申请号:US10937362

    申请日:2004-09-10

    摘要: There are provided an apparatus and method for transmitting commands in a network to which a plurality of communication protocols may be applied. A first command that supports a plurality of communication protocols is input. One of the plurality of communication protocols is selected in accordance with the input first command. The first command is converted into a corresponding second command in the selected communication protocol. The converted second command is transmitted using the selected communication protocol.

    摘要翻译: 提供了一种用于在可应用多个通信协议的网络中发送命令的装置和方法。 输入支持多个通信协议的第一命令。 根据输入的第一命令来选择多个通信协议之一。 所选择的通信协议中的第一个命令被转换成相应的第二个命令。 使用所选择的通信协议来发送转换的第二命令。

    Semiconductor integrated circuit and signal sending/receiving system
    48.
    发明申请
    Semiconductor integrated circuit and signal sending/receiving system 审中-公开
    半导体集成电路和信号发送/接收系统

    公开(公告)号:US20050024084A1

    公开(公告)日:2005-02-03

    申请号:US10855351

    申请日:2004-05-28

    IPC分类号: G05F1/56 H04L25/02 H03K19/003

    摘要: A terminal resistor built in a signal-sending or signal-receiving semiconductor integrated circuit is composed of a parallel circuit of a polysilicon resistor element having excellent frequency characteristic and a P-type MOS transistor. The resistance value of the polysilicon resistor element is set so as to be an approximate value of the characteristic impedance of a transmission line to be connected. The gate voltage of the P-type MOS transistor is controlled by a gate bias voltage adjustment circuit. The resistance value of the P-type MOS transistor is variably adjusted. Variation in the resistance value of the polysilicon resistor element due to dispersion in its manufacturing process is absorbed by variably adjusting the resistance value of the P-type MOS transistor. The combined resistance value of the polysilicon resistor element and the P-type MOS transistor is adjusted with high precision just to the characteristic impedance of the transmission line. Thus, a signal-sending or signal-receiving semiconductor integrated circuit in which the terminal resistor having excellent frequency and DC characteristics is built can be obtained.

    摘要翻译: 内置在信号发送或信号接收半导体集成电路中的端子电阻由具有优异频率特性的多晶硅电阻元件和P型MOS晶体管的并联电路组成。 将多晶硅电阻元件的电阻值设定为要连接的传输线的特性阻抗的近似值。 P型MOS晶体管的栅极电压由栅极偏置电压调节电路控制。 可变地调节P型MOS晶体管的电阻值。 通过可变地调节P型MOS晶体管的电阻值来吸收由于其制造过程中的分散而导致的多晶硅电阻元件的电阻值的变化。 与传输线的特性阻抗相比,多晶硅电阻元件和P型MOS晶体管的组合电阻值被高精度地调整。 因此,可以获得其中构建具有优异的频率和DC特性的端子电阻器的信号发送或信号接收半导体集成电路。

    Multi-phase clock transmission circuit and method
    49.
    发明授权
    Multi-phase clock transmission circuit and method 失效
    多相时钟传输电路及方法

    公开(公告)号:US06794912B2

    公开(公告)日:2004-09-21

    申请号:US10361610

    申请日:2003-02-11

    IPC分类号: H03D324

    摘要: A multi-phase clock transmission circuit includes: a clock generator for generating a clock synchronizing with a reference clock and a control signal responsive to the phase difference between the reference clock and the generated clock; and a delay circuit for generating a multi-phase clock based on the clock and the control signal. The clock generator generates a signal having a frequency equal to an integral multiple of the frequency of the reference clock and outputs the signal as the clock. The delay circuit has a circuit receiving the clock and including a plurality of delay elements in cascade connection each giving a delay according to the control signal to an input signal. Signals output from the plurality of delay elements are used as signals constituting the multi-phase clock.

    摘要翻译: 多相时钟传输电路包括:时钟发生器,用于响应于参考时钟和所产生的时钟之间的相位差,产生与参考时钟同步的时钟和控制信号; 以及用于基于时钟和控制信号产生多相时钟的延迟电路。 时钟发生器产生具有等于参考时钟的频率的整数倍的频率的信号,并将该信号作为时钟输出。 延迟电路具有接收时钟并且包括多个级联连接的延迟元件的电路,每个延迟元件根据与输入信号的控制信号给出延迟。 将从多个延迟元件输出的信号用作构成多相时钟的信号。

    Semiconductor integrated circuit and semiconductor integrated circuit system having serially interconnectable data buses
    50.
    发明授权
    Semiconductor integrated circuit and semiconductor integrated circuit system having serially interconnectable data buses 有权
    具有串行可互连数据总线的半导体集成电路和半导体集成电路系统

    公开(公告)号:US06297675B1

    公开(公告)日:2001-10-02

    申请号:US09478530

    申请日:2000-01-06

    IPC分类号: H03B100

    CPC分类号: H03K19/018514 Y10T307/549

    摘要: A data line pair and a strobe line pair are provided between first and second chips to exchange data therebetween. The first chip includes an output circuit and a controller for controlling the output circuit. The second chip includes an input circuit. For example, the output circuit supplies a direct current from a power supply to one of the data lines. Then, the input circuit feeds back the received current to the output circuit through a pair of terminal resistors and the other data line. Subsequently, the output circuit supplies the fed back direct current to one of the strobe lines. In response, the input circuit feeds back the received current again to the output circuit through another pair of terminal resistors and the other strobe line. And then the fed back current is drained to the ground. Thus, compared to driving the data and strobe line pairs separately with the same amount of current supplied, the current dissipation can be halved. In this manner, the present invention is applicable to reduction of current dissipation when data should be transmitted at high speeds through multiple data bus pairs that are driven with a current supplied.

    摘要翻译: 在第一和第二芯片之间提供数据线对和选通线对,以在它们之间交换数据。 第一芯片包括输出电路和用于控制输出电路的控制器。 第二芯片包括输入电路。 例如,输出电路将电流从电源提供给数据线之一。 然后,输入电路通过一对端子电阻和另一条数据线将接收的电流反馈到输出电路。 随后,输出电路将反馈的直流电流提供给选通线之一。 作为响应,输入电路通过另一对端子电阻器和另一个选通线路将接收到的电流再次反馈到输出电路。 然后将反馈电流排到地面。 因此,与以相同的电流量驱动数据和选通线对相比,电流消耗可以减半。 以这种方式,本发明可应用于当通过以所提供的电流驱动的多个数据总线对以高速传输数据时,减少电流消耗。