公开(公告)号：US06906372B2

公开(公告)日：2005-06-14

申请号：US09993967

申请日：2001-11-27

申请人： Takashi Yamada ,  Takeshi Kajiyama

发明人： Takashi Yamada ,  Takeshi Kajiyama

IPC分类号： H01L21/8242 ,  H01L27/108 ,  H01L27/12 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L27/10864 ,  H01L27/10841 ,  H01L27/10867 ,  H01L27/10876 ,  H01L27/10891 ,  H01L27/1203

摘要： A semiconductor device has an element substrate including a semiconductor layer of a first conductivity type being formed over a semiconductor substrate with a dielectric film interposed therebetween. A groove is formed in the element substrate with a depth extending from a top surface of the semiconductor layer into the dielectric film, the groove having a width-increased groove portion in the dielectric film as to expose a bottom surface of the semiconductor layer. An impurity diffusion source is buried in the width-increased groove portion to be contacted with the bottom surface. A transistor is formed to have a first diffusion layer being formed through impurity diffusion from the impurity diffusion source to the bottom surface of the semiconductor layer, a second diffusion layer formed through impurity diffusion to the top surface of the semiconductor layer, and a gate electrode formed at a side face of the groove over the impurity diffusion source with a gate insulation film between the side face and the gate electrode.

摘要翻译： 半导体器件具有包括第一导电类型的半导体层的元件衬底，该半导体层形成在半导体衬底上，介于其间的电介质膜。 在元件基板中形成有从半导体层的顶表面延伸到电介质膜的深度的凹槽，该凹槽在电介质膜中具有宽度增加的沟槽部分，以露出半导体层的底表面。 杂质扩散源被埋在宽度增加的槽部分中以与底表面接触。 晶体管形成为具有通过从杂质扩散源到半导体层的底面的杂质扩散而形成的第一扩散层，通过杂质向半导体层的顶表面形成的第二扩散层，以及栅电极 在所述杂质扩散源的所述沟槽的侧面上形成有在所述侧面和所述栅电极之间的栅极绝缘膜。

公开(公告)号：US20050070033A1

公开(公告)日：2005-03-31

申请号：US10736831

申请日：2003-12-17

申请人： Takeshi Kajiyama

发明人： Takeshi Kajiyama

IPC分类号： H01L27/10 ,  H01L21/00 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L43/08

CPC分类号： H01L27/228 ,  B82Y10/00

摘要： A magnetic memory device includes a memory cell which has a first wiring line composed of a first wiring layer, a second wiring line composed of a second wiring layer and provided above or below the first wiring line so as to cross the first wiring line, and a magnetoresistive effect element device provided in a position where the first wiring line and the second wiring line cross each other. The device further includes a peripheral circuit which includes a third wiring line provided around the memory cell and composed of the first wiring layer, a fourth wiring line provided above or below the third wiring line and composed of the second wiring layer, and at least one magnetic layer forming the magnetoresistive effect element device and provided between the third wiring line and the fourth wiring line.

摘要翻译： 一种磁存储器件，包括：具有由第一布线层构成的第一布线和由第二布线层构成的第二布线并且设置在第一布线的上方或下方以跨越第一布线的存储单元;以及 设置在第一布线和第二布线彼此交叉的位置处的磁阻效应元件装置。 该装置还包括外围电路，其包括设置在存储单元周围并由第一布线层构成的第三布线，设置在第三布线的上方或下方并由第二布线层构成的第四布线，以及至少一个 形成磁阻效应元件的磁性层，设置在第三布线和第四布线之间。

公开(公告)号：US06617658B2

公开(公告)日：2003-09-09

申请号：US10125485

申请日：2002-04-19

申请人： Takeshi Kajiyama

发明人： Takeshi Kajiyama

IPC分类号： H01L27108

CPC分类号： H01L27/222 ,  B82Y10/00

摘要： A semiconductor memory device includes a semiconductor substrate, and a first magneto resistive element separated from the semiconductor substrate, and including a first magnetic layer and a first nonmagnetic layer. The first magnetic layer and the first nonmagnetic layer are formed in a direction perpendicular to the semiconductor substrate.

摘要翻译： 半导体存储器件包括半导体衬底和与半导体衬底分离的第一磁阻元件，并且包括第一磁性层和第一非磁性层。 第一磁性层和第一非磁性层在垂直于半导体衬底的方向上形成。

公开(公告)号：US06175140B1

公开(公告)日：2001-01-16

申请号：US09372043

申请日：1999-08-11

申请人： Takeshi Kajiyama

发明人： Takeshi Kajiyama

IPC分类号： H01L2976

CPC分类号： H01L21/28123 ,  H01L21/76232 ,  H01L29/4238

摘要： In a MOS transistor using shallow trench isolation, a pattern of an element formation region has a shape of a modified hexagon in which a hexagon is compressed into a shape like a rhombus in a direction perpendicular to an extension direction of a gate electrode wiring. The pattern of element formation region is constructed as described above, so that an element formation region is formed in a lager current path in a corner device. Thus, a lowering of a threshold voltage (a short channel effect) due to the corner device can be restricted without increasing a width of the gate electrode wiring.

摘要翻译： 在使用浅沟槽隔离的MOS晶体管中，元件形成区域的图案具有六边形的形状，其中六边形沿垂直于栅电极布线的延伸方向的方向被压缩成像菱形的形状。 如上所述构成元件形成区域的图案，使得元件形成区域形成在拐角装置中的较大电流路径中。 因此，可以在不增加栅电极布线的宽度的情况下限制由于拐角装置引起的阈值电压（短沟道效应）的降低。

公开(公告)号：US08607259B2

公开(公告)日：2013-12-10

申请号：US13106385

申请日：2011-05-12

申请人： Yoshimichi Takano ,  Nobuaki Onagi ,  Kohji Tsukahara ,  Haruki Tokumaru ,  Daiichi Koide ,  Takeshi Kajiyama ,  Masami Nishida

发明人： Yoshimichi Takano ,  Nobuaki Onagi ,  Kohji Tsukahara ,  Haruki Tokumaru ,  Daiichi Koide ,  Takeshi Kajiyama ,  Masami Nishida

IPC分类号： G11B17/04 ,  G11B23/03

CPC分类号： G11B17/225 ,  G11B23/0021 ,  G11B23/0035 ,  G11B23/005

摘要： A disk laminate includes thin disks laminated to each other, which are to be suctioned and conveyed; and spacers provided between the thin disks to prevent the thin disks from directly contacting each other, the spacers having air permeability.

摘要翻译： 圆盘叠片包括彼此层叠的薄盘，它们被抽吸和输送; 以及设置在所述薄盘之间的间隔件，以防止所述薄盘彼此直接接触，所述间隔件具有透气性。

公开(公告)号：US08238144B2

公开(公告)日：2012-08-07

申请号：US12716723

申请日：2010-03-03

申请人： Takeshi Kajiyama

发明人： Takeshi Kajiyama

IPC分类号： G11C11/00

CPC分类号： G11C11/1675 ,  G11C11/1659

摘要： A spin-transfer magnetic memory includes a magnetoresistive element having a pinned layer, a free layer and a tunnel insulating layer provided between the pinned layer and the free layer, a bit line connected to one terminal of the magnetoresistive element, a select transistor having a current path whose one terminal is connected to the other terminal of the magnetoresistive element, a source line connected to the other terminal of the current path of the select transistor, and a pulse generation circuit passing a microwave pulse current through the magnetoresistive element, and assisting a magnetization switching of the free layer in a write operation.

摘要翻译： 自旋转移磁存储器包括具有被钉扎层，自由层和设置在被钉扎层和自由层之间的隧道绝缘层的磁阻元件，连接到磁阻元件的一个端子的位线，选择晶体管，其具有 电流路径，其一个端子连接到磁阻元件的另一个端子，连接到选择晶体管的电流路径的另一个端子的源极线和使微波脉冲电流通过磁阻元件的脉冲发生电路，并且辅助 在写入操作中自由层的磁化切换。

公开(公告)号：US20110233661A1

公开(公告)日：2011-09-29

申请号：US13051846

申请日：2011-03-18

申请人： Takeshi Kajiyama

发明人： Takeshi Kajiyama

IPC分类号： H01L29/78 ,  H01L21/3205

CPC分类号： H01L29/66621 ,  H01L27/228 ,  H01L43/08

摘要： According to one embodiment, a semiconductor memory device includes a fin-shaped active area, a gate electrode, a silicide layer, and a contact. The fin-shaped active area is provided in a semiconductor substrate and has a first side, a second side parallel to the first side, and a top face connecting the first and second sides. The gate electrode is formed in a trench formed in the active area such that it crosses the trench and is a part of a word line insulated from the active area. The silicide layer is located in the active area on either side of the gate electrode and is formed at least on the first side of the active area serving as a source and a drain region. The contact is connected to the silicide layer and connects at least a storage element.

摘要翻译： 根据一个实施例，半导体存储器件包括鳍状有源区，栅电极，硅化物层和触点。 鳍状有源区设置在半导体基板中，具有第一侧，平行于第一侧的第二侧和连接第一侧和第二侧的顶面。 栅极电极形成在有源区域中形成的沟槽中，使得其跨越沟槽，并且是与有源区域绝缘的字线的一部分。 硅化物层位于栅极电极两侧的有源区中，至少形成在用作源极和漏极区的有源区的第一侧上。 接触件连接到硅化物层并连接至少一个存储元件。

公开(公告)号：US07796422B2

公开(公告)日：2010-09-14

申请号：US12333472

申请日：2008-12-12

申请人： Takeshi Kajiyama

发明人： Takeshi Kajiyama

IPC分类号： G11C11/00

CPC分类号： G11C11/1675 ,  G11C11/161

摘要： A spin transfer type magnetic random access memory includes a magnetoresistive effect element including a fixed layer, a recording layer, and a nonmagnetic layer, a source line connected to one terminal of the magnetoresistive effect element, a transistor having a current path whose one end is connected to the other terminal of the magnetoresistive effect element, a bit line connected to the other end of the current path of the transistor, and running parallel to the source line, and a source/sinker which supplies a write current between the source line and the bit line via the magnetoresistive effect element and the transistor, a direction in which a magnetic field generated by the write current having passed through the bit line is applied to the magnetoresistive effect element being opposite to a direction of the write current passing through the magnetoresistive effect element.

摘要翻译： 自旋转移型磁性随机存取存储器包括具有固定层，记录层和非磁性层的磁阻效应元件，与磁阻效应元件的一个端子连接的源极线，具有一端为 连接到磁阻效应元件的另一个端子，连接到晶体管的电流路径的另一端并且平行于源极线并行的位线，以及在源极线和源极线之间提供写入电流的源极/ 通过磁阻效应元件和晶体管的位线，将通过位线的写入电流产生的磁场施加到与通过磁阻的写入电流的方向相反的磁阻效应元件的方向 效果元素。

公开(公告)号：US07061036B2

公开(公告)日：2006-06-13

申请号：US10792586

申请日：2004-03-04

申请人： Takeshi Kajiyama

发明人： Takeshi Kajiyama

IPC分类号： H01L31/062

CPC分类号： H01L27/222 ,  G11C11/16 ,  H01L27/0688

摘要： Magnetic random access memory including a cell array stacked in a plurality of plane levels, a plurality of write wirings disposed on each of the stacked cell array, and a contact plug commonly or independently coupled to the plurality of stacked array planes. Also, a method for manufacturing magnetic random access memory so as to reduce influences of parasitic wiring resistances due to differences of the writing current values for supplying the stacked cell array. The magnetic random access memory includes a cell array of TMR elements stacked in a plurality of plane levels, a plurality of write wirings being formed so that a parasitic resistance becomes smaller accompanying a longer distance from a drive current source, and one or a plurality of contact plugs for commonly or independently coupling to the plurality of stacked array planes.

摘要翻译： 磁性随机存取存储器，包括堆叠在多个平面级中的单元阵列，布置在每个堆叠单元阵列上的多个写配线以及通常或独立地耦合到多个堆叠阵列平面的接触插头。 另外，一种用于制造磁随机存取存储器的方法，以便减少由于用于提供堆叠单元阵列的写入电流值的差异引起的寄生布线电阻的影响。 磁性随机存取存储器包括堆叠在多个平面电平中的TMR元件的单元阵列，多个写配线被形成为使得寄生电阻随着与驱动电流源的距离较远而变小，以及一个或多个 用于通常或独立地耦合到多个堆叠的阵列平面的接触插塞。

公开(公告)号：US20050030813A1

公开(公告)日：2005-02-10

申请号：US10936693

申请日：2004-09-09

申请人： Takeshi Kajiyama

发明人： Takeshi Kajiyama

IPC分类号： G11C11/15 ,  G11C11/14

CPC分类号： G11C11/15 ,  G11C11/1659 ,  G11C2213/71

摘要： MTJ elements are accumulated in a plurality of portions on a semiconductor substrate. A first conductive line functioning as a read line and extending in the X direction is connected to pin layers of the MTJ elements. A second conductive line functioning as a write line and read line and extending in the X direction is connected to free layers of the MTJ elements. A write line extends in the Y direction and is shared with two MTJ elements present above and below the write line. The two MTJ elements present above and below the write line are arranged symmetric to the write line.

摘要翻译： MTJ元件被累积在半导体衬底上的多个部分中。 用作读取线并沿X方向延伸的第一导电线连接到MTJ元件的引脚层。 用作写入线和读取线并沿X方向延伸的第二导线连接到MTJ元件的自由层。 写行在Y方向上延伸，并与写入行上方和下方的两个MTJ元素共享。 写入线上方和下方的两个MTJ元件与写入线对称。