公开(公告)号：US09385048B2

公开(公告)日：2016-07-05

申请号：US14018439

申请日：2013-09-05

申请人： UNITED MICROELECTRONICS CORP.

发明人： Shih-Fang Hong ,  Chung-Yi Chiu

IPC分类号： H01L21/027 ,  H01L27/088 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/84 ,  H01L29/66

CPC分类号： H01L21/823821 ,  H01L21/845 ,  H01L29/6681

摘要： The present invention provides a method of forming Fin-FET. A substrate with an active region and a dummy region are defined thereon. A plurality of first fins and second fins are formed in the active region, and a plurality of dummy fins are formed in the dummy region and the active region. A first active region is provided in the active region. A revised first active region is formed by extending the first active region to cover at least one adjacent dummy fin. Next, a first dummy region is provided in the dummy region. A first mask layout is formed by combining the revised first active region and the first dummy region. A first patterned mask layer is formed by using the first mask layout. A first epitaxial process is performed for the first fins and the dummy fins exposed by the first patterned mask layer.

公开(公告)号：US09141744B2

公开(公告)日：2015-09-22

申请号：US13968391

申请日：2013-08-15

申请人： UNITED MICROELECTRONICS CORP.

发明人： Po-Chao Tsao ,  Shih-Fang Hong ,  Chia-Wei Huang ,  Ming-Jui Chen ,  Shih-Fang Tzou ,  Ming-Te Wei

IPC分类号： G06F17/50 ,  G03F1/00

CPC分类号： G06F17/5068 ,  G03F1/144 ,  G03F1/36

摘要： A method for generating a layout pattern is provided. First, a layout pattern is provided to a computer system and is classified into two sub-patterns and a blank pattern. Each of the sub-patterns has pitches in simple integer ratios and the blank pattern is between the two sub-patterns. Then, a plurality of first stripe patterns and at least two second stripe patterns are generated. The edges of the first stripe patterns are aligned with the edges of the sub-patterns and the first stripe patterns have equal spacings and widths. The spacings or widths of the second stripe patterns are different from that of the first stripe patterns.

摘要翻译： 提供了一种用于生成布局图案的方法。 首先，将布局图案提供给计算机系统，并将其分为两个子图案和空白图案。 每个子图案具有简单整数比例的间距，并且空白图案在两个子图案之间。 然后，生成多个第一条纹图案和至少两个第二条纹图案。 第一条形图案的边缘与子图案的边缘对齐，并且第一条纹图案具有相等的间隔和宽度。 第二条纹图案的间距或宽度与第一条纹图案的间距或宽度不同。

公开(公告)号：US09123810B2

公开(公告)日：2015-09-01

申请号：US13920093

申请日：2013-06-18

申请人： UNITED MICROELECTRONICS CORP.

发明人： Shih-Fang Hong ,  Po-Chao Tsao

IPC分类号： H01L29/78

CPC分类号： H01L23/562 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/10879 ,  H01L27/1211 ,  H01L29/0692 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/785 ,  H01L29/7851 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor integrated device includes a substrate, a plurality of active fins, and a plurality of first protecting fins. The substrate includes an active region, and the active fins are positioned in the active region. The active region is surrounded by the first protecting fins. The active fins and the first protecting fins all extend along a first direction.

摘要翻译： 半导体集成器件包括衬底，多个有源鳍片和多个第一保护鳍片。 衬底包括有源区，活性鳍位于有源区中。 有源区被第一保护鳍包围。 活动鳍片和第一保护翼片沿着第一方向全部延伸。