公开(公告)号：US5760984A

公开(公告)日：1998-06-02

申请号：US546162

申请日：1995-10-20

申请人： Mark S. Spurbeck ,  Richard T. Behrens

发明人： Mark S. Spurbeck ,  Richard T. Behrens

IPC分类号： G11B5/09 ,  G11B20/10 ,  G11B20/12 ,  G11B20/14 ,  H04L7/02

CPC分类号： H04L7/0029 ,  G11B20/10009 ,  G11B20/10037 ,  G11B20/10055 ,  G11B20/10064 ,  G11B20/10074 ,  G11B20/1403 ,  G11B20/1258 ,  G11B2020/1234 ,  H04L2007/047

摘要： A sampled amplitude read channel reads information stored on a magnetic medium by detecting digital data from a sequence of discrete time interpolated sample values, the interpolated sample values generated by interpolating a sequence of discrete time channel sample values generated by sampling pulses in an analog read signal from a magnetic read head positioned over the magnetic medium. A write VFO generates a write clock for writing digital data to the magnetic medium at a predetermined baud rate for a selected zone, and upon read back, the write VFO generates a sampling clock at a frequency slightly higher than the write frequency. A sampling device samples the analog read signal at the sampling clock rate to generate a sequence of discrete time channel samples that are not synchronized to the baud rate, and the channel samples are equalized by a discrete time equalizing filter according to a predetermined partial response (PR4, EPR4, EEPR4, etc.). An interpolating timing recovery circuit, responsive to the equalized channel samples, computes an interpolation interval .tau. and, in response thereto, generates interpolated sample values substantially synchronized to the baud rate. The timing recovery circuit also generates a data clock for clocking a discrete time sequence detector which detects the digital data from the interpolated sample values. In a cost reduced implementation, the interpolation filter coefficients are computed in real time as a function of the interpolation interval .tau..

摘要翻译： 采样幅度读取通道通过从离散时间内插采样值序列中检测数字数据来读取存储在磁性介质上的信息，内插采样值是通过内插由模拟读取信号中的采样脉冲产生的离散时间通道采样值序列而产生的 从位于磁介质上的磁读头。 写入VFO产生写入时钟，用于以预定的波特率为所选区域将数字数据写入磁介质，并且在读回时，写入VFO以略高于写入频率的频率产生采样时钟。 采样装置以采样时钟速率对模拟读取信号进行采样，以产生不与波特率同步的离散时间信道采样序列，并且通过离散时间均衡滤波器根据预定的部分响应（ PR4，EPR4，EEPR4等）。 内插定时恢复电路响应于均衡信道采样，计算内插间隔τ，并且响应于此产生基本上与波特率同步的内插采样值。 定时恢复电路还产生数据时钟，用于计时离散时间序列检测器，其从插值的采样值检测数字数据。 在成本降低的实现中，内插滤波器系数作为内插间隔τ的函数被实时计算。

公开(公告)号：US5696639A

公开(公告)日：1997-12-09

申请号：US440508

申请日：1995-05-12

申请人： Mark S. Spurbeck ,  Richard T. Behrens ,  German S. Feyh

发明人： Mark S. Spurbeck ,  Richard T. Behrens ,  German S. Feyh

IPC分类号： G11B20/10 ,  G11B20/12 ,  G11B20/14 ,  H04L7/02 ,  H04L7/04 ,  C11B5/09

CPC分类号： G11B20/10009 ,  G11B20/10037 ,  G11B20/10055 ,  G11B20/1403 ,  H04L7/0029 ,  G11B20/1258 ,  H04L2007/047 ,  H04L7/04

摘要： A sampled amplitude read channel for reading information stored on a magnetic medium by detecting digital data from a sequence of discrete time interpolated sample values, the interpolated sample values generated by interpolating a sequence of discrete time channel sample values generated by sampling pulses in an analog read signal from a magnetic read head positioned over the magnetic medium. A write VFO generates a write clock for writing digital data to the magnetic medium at a predetermined baud rate for a selected zone, and upon read back, the write VFO generates a sampling clock at a frequency slightly higher than the write frequency. A sampling device samples the analog read signal at the sampling clock rate to generate a sequence of discrete time channel samples that are not synchronized to the baud rate. The channel samples are equalized by a discrete time equalizing filter according to a predetermined partial response (PR4, EPR4, EEPR4, etc.). An interpolating timing recovery circuit, responsive to the equalized channel samples, computes an interpolation interval .tau. and, in response thereto, generates interpolated sample values substantially synchronized to the baud rate. The timing recovery circuit also generates a data clock for clocking a discrete time sequence detector for detecting the digital data from the interpolated sample values.

摘要翻译： 一种采样振幅读通道，用于通过从离散时间内插样本值序列中检测数字数据来读取存储在磁介质上的信息，该内插样本值是通过内插由模拟读取中的采样脉冲产生的离散时间通道采样值序列而产生的 来自位于磁介质上的磁读头的信号。 写入VFO产生写入时钟，用于以预定的波特率为所选区域将数字数据写入磁介质，并且在读回时，写入VFO以略高于写入频率的频率产生采样时钟。 采样设备以采样时钟速率对模拟读取信号进行采样，以产生不与波特率同步的离散时间通道采样序列。 信道样本根据预定的部分响应（PR4，EPR4，EEPR4等）由离散时间均衡滤波器进行均衡。 内插定时恢复电路响应于均衡信道采样，计算内插间隔τ，并且响应于此产生基本上与波特率同步的内插采样值。 定时恢复电路还产生用于对离散时间序列检测器进行计时的数据时钟，用于从内插样本值检测数字数据。

公开(公告)号：US08054918B2

公开(公告)日：2011-11-08

申请号：US10955584

申请日：2004-09-30

申请人： Marvin L. Vis ,  Jing Liang ,  Richard T. Behrens ,  Samuel Rousselin

发明人： Marvin L. Vis ,  Jing Liang ,  Richard T. Behrens ,  Samuel Rousselin

IPC分类号： H03D1/00 ,  H04L27/06

CPC分类号： H04L27/22 ,  H04L2027/0028 ,  H04L2027/0057 ,  H04L2027/0095

摘要： A wireless communication system is provided that detects a frequency burst (FB) through analysis of the autocorrelation function of received signals. The system can accommodate the relatively large frequency offsets that are associated with less expensive reference frequency crystals. The system employs a multi-mode filter including an FB filter and a channelization filter. In one embodiment, the FB filter is employed until an FB is located and then, once the FB is located, the channelization filter is employed to receive signals.

摘要翻译： 提供了一种通过分析接收信号的自相关函数来检测频率突发（FB）的无线通信系统。 该系统可以适应与较便宜的参考频率晶体相关联的相对较大的频率偏移。 该系统采用包括FB滤波器和信道化滤波器的多模式滤波器。 在一个实施例中，使用FB滤波器直到FB被定位，然后一旦FB被定位，则使用信道化滤波器来接收信号。

公开(公告)号：US20100166124A1

公开(公告)日：2010-07-01

申请号：US12715361

申请日：2010-03-01

申请人： Richard T. Behrens ,  Tod Paulus ,  Mark S. Spurbeck ,  Vishnu S. Srinivasan ,  Donald A. Kerth ,  Jeffrey W. Scott ,  G. Tyson Tuttle ,  G. Diwakar Vishakhadatta

发明人： Richard T. Behrens ,  Tod Paulus ,  Mark S. Spurbeck ,  Vishnu S. Srinivasan ,  Donald A. Kerth ,  Jeffrey W. Scott ,  G. Tyson Tuttle ,  G. Diwakar Vishakhadatta

IPC分类号： H04L27/00 ,  H04B1/10

CPC分类号： H04B1/28 ,  H04B1/0003 ,  H04B1/38 ,  H04B1/406 ,  H04B15/02 ,  H04B15/04 ,  H04B2215/064

摘要： A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry. The receiver analog circuitry resides within a first integrated circuit and the receiver digital circuitry resides within a second integrated circuit. The second integrated circuit couples to the first integrated circuit via a one-bit digital interface. The receiver analog circuitry receives an RF signal and processes the received RF signal to generate a digital signal. The receiver analog circuitry provides the digital signal to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal with an intermediate frequency (IF) local oscillator (LO) signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal.

摘要翻译： 射频（RF）接收机包括接收机模拟电路和接收机数字电路。 接收器模拟电路驻留在第一集成电路内，并且接收器数字电路位于第二集成电路内。 第二集成电路通过一位数字接口耦合到第一集成电路。 接收机模拟电路接收RF信号并处理所接收的RF信号以产生数字信号。 接收机模拟电路将数字信号提供给接收机数字电路。 接收机数字电路包括数字下变频器电路，其将数字信号与中频（IF）本地振荡器（LO）信号混合以产生数字下变频信号。 接收机数字电路还包括数字滤波器电路，其对数字下变频信号进行滤波以产生经滤波的数字信号。

公开(公告)号：US07567637B2

公开(公告)日：2009-07-28

申请号：US10954791

申请日：2004-09-30

申请人： Jing Liang ,  Marvin L. Vis ,  Richard T. Behrens

发明人： Jing Liang ,  Marvin L. Vis ,  Richard T. Behrens

IPC分类号： H03D1/00

CPC分类号： H04L27/22 ,  H04L2027/0028 ,  H04L2027/0057 ,  H04L2027/0095

摘要： A wireless communication system is provided that detects a frequency burst (FB) through analysis of the autocorrelation function of received signals. The system can accommodate the relatively large frequency offsets that are associated with less expensive reference frequency crystals. In one embodiment, the system includes FB search hardware that operates in two modes, namely an FB location mode with narrowband interference (e.g. CW or continuous wave) detection and an FB location mode without such narrowband interference detection, depending on whether a CW signal (carrier or other narrowband interferer) is present or not.

摘要翻译： 提供了一种通过分析接收信号的自相关函数来检测频率突发（FB）的无线通信系统。 该系统可以适应与较便宜的参考频率晶体相关联的相对较大的频率偏移。 在一个实施例中，系统包括以两种模式操作的FB搜索硬件，即具有窄带干扰（例如CW或连续波）检测的FB位置模式和没有这种窄带干扰检测的FB位置模式，这取决于CW信号 载波或其他窄带干扰源）存在或不存在。

公开(公告)号：US20080232480A1

公开(公告)日：2008-09-25

申请号：US11726500

申请日：2007-03-22

申请人： G. Tyson Tuttle ,  Dan B. Kasha ,  Wade R. Gillham ,  Richard T. Behrens

发明人： G. Tyson Tuttle ,  Dan B. Kasha ,  Wade R. Gillham ,  Richard T. Behrens

IPC分类号： H04L27/00

CPC分类号： H04H40/18 ,  H04B1/1646 ,  H04B1/3805 ,  H04B1/406

摘要： Receiver architectures and related methods are disclosed for high definition (HD) and digital radio FM broadcast receivers. The radio receiver architectures are configured to utilize multiple analog-to-digital converters (ADCs) to handle the digital radio spectrum and can be configured to modify a target IF frequencies depending upon the mode of operation of the receiver. For example, the receiver can include an analog FM reception mode and a digital FM reception mode for which different down-conversions are used for the same analog-plus-digital audio broadcast channel. If desired, the radio broadcast receivers disclosed can be configured so that they only receive digital FM radio content, for example, if the analog FM broadcast was of no interest and/or if the broadcast was all digital.

摘要翻译： 公开了用于高分辨率（HD）和数字无线电FM广播接收机的接收机架构和相关方法。 无线电接收器架构被配置为利用多个模数转换器（ADC）来处理数字无线电频谱，并且可以被配置为根据接收机的操作模式来修改目标IF频率。 例如，接收机可以包括模拟FM接收模式和数字FM接收模式，对于相同的模拟 - 数字音频广播频道，接收模式和不同的下变频被使用。 如果需要，所公开的无线电广播接收机可以被配置为使得它们仅接收数字FM无线电内容，例如，如果模拟FM广播不感兴趣和/或如果广播全部是数字的。

公开(公告)号：US07366478B2

公开(公告)日：2008-04-29

申请号：US10878880

申请日：2004-06-28

申请人： Donald A. Kerth ,  Richard T. Behrens ,  Jeffrey W. Scott ,  G. Diwakar Vishakhadatta ,  G. Tyson Tuttle ,  Vishnu Shankar Srinivasan

发明人： Donald A. Kerth ,  Richard T. Behrens ,  Jeffrey W. Scott ,  G. Diwakar Vishakhadatta ,  G. Tyson Tuttle ,  Vishnu Shankar Srinivasan

IPC分类号： H04B1/40

CPC分类号： H04B1/109 ,  H04B1/0003 ,  H04B1/28 ,  H04B1/406 ,  H04B15/02 ,  H04B15/04 ,  H04B2215/064 ,  H04L27/2649

摘要： Radio-frequency (RF) apparatus includes receiver analog circuitry that receives an RF signal and provides at least one digital signal to receiver digital circuitry that functions in cooperation with the receiver analog circuitry. The receiver analog circuitry and the receiver digital circuitry are partitioned so that interference effects between the receiver analog circuitry and the receiver digital circuitry tend to be reduced.

公开(公告)号：US07177610B2

公开(公告)日：2007-02-13

申请号：US10081121

申请日：2002-02-22

申请人： Jeffrey W. Scott ,  G. Diwakar Vishakhadatta ,  Donald A. Kerth ,  Richard T. Behrens ,  G. Tyson Tuttle ,  Vishnu S. Srinivasan

发明人： Jeffrey W. Scott ,  G. Diwakar Vishakhadatta ,  Donald A. Kerth ,  Richard T. Behrens ,  G. Tyson Tuttle ,  Vishnu S. Srinivasan

IPC分类号： H04B1/06 ,  H04B7/00

CPC分类号： H04B1/0003 ,  H04B1/28 ,  H04B1/406 ,  H04B15/02 ,  H04B15/04 ,  H04B2215/064

摘要： A low-noise current reference circuitry includes a voltage source, a current source, and a controller. The voltage source generates a reference voltage. The current source provides a low-noise output current in response to a control signal. The controller provides the control signal based at least in part on the relative magnitudes of the reference voltage and a voltage derived from the output current. A low-noise voltage reference circuitry includes a reference voltage source, a voltage source, and a controller. The reference voltage source generates a reference voltage. The voltage source provides a low-noise output voltage in response to a control signal. The controller provides the control signal based at least in part on the relative magnitudes of the output voltage and the reference voltage.

摘要翻译： 低噪声电流参考电路包括电压源，电流源和控制器。 电压源产生参考电压。 电流源提供响应于控制信号的低噪声输出电流。 控制器至少部分地基于参考电压的相对幅度和从输出电流导出的电压来提供控制信号。 低噪声电压参考电路包括参考电压源，电压源和控制器。 参考电压源产生参考电压。 电压源响应于控制信号提供低噪声输出电压。 控制器至少部分地基于输出电压和参考电压的相对幅度提供控制信号。

公开(公告)号：US6005727A

公开(公告)日：1999-12-21

申请号：US790038

申请日：1997-01-28

申请人： Richard T. Behrens ,  Christopher P. Zook ,  David E. Reed ,  Stephen A. Turk

发明人： Richard T. Behrens ,  Christopher P. Zook ,  David E. Reed ,  Stephen A. Turk

IPC分类号： G11B5/55 ,  G11B5/596 ,  G11B7/007 ,  G11B21/08 ,  G11B21/10 ,  G11B27/30 ,  G11B5/09

CPC分类号： G11B7/00745 ,  G11B21/083 ,  G11B21/106 ,  G11B27/3027 ,  G11B5/553 ,  G11B5/59655 ,  G11B5/59688 ,  G11B5/5547

摘要： A servo decoder is disclosed for disc storage systems that operates according to a novel coding scheme capable of accurately decoding detected codewords representing servo track address during seek operations, even when the recording head flies between two adjacent tracks, and capable of correcting errors in the detected codedwords caused by noise in the read signal, such as inter-symbol interference. In a first embodiment, the coding scheme comprises an error correcting code (ECC) capable of correcting a predetermined number of bit errors in the detected codewords. To achieve the equivalent effect of a conventional Gray code, the codewords are arranged such that adjacent track addresses differ by a number of bits equal to the minimum distance of the ECC code. In a second embodiment, the servo code corrects certain minimum distance error events associated with a trellis type sequence detector. To achieve the equivalent effect of a conventional Gray code in this embodiment, the codewords are arranged such that adjacent track addresses differ by a number of bits relative to the minimum distance error events corrected. In this manner, when the recording head spans two adjacent tracks during a seek operation, the ambiguity in the detected codeword will be resolved in favor of one of the adjacent track addresses. Further, due to the error correcting capabilities of the code, the present invention improves the performance of servo seeking and tracking operations, and allows the servo data to be recorded at a higher density.

摘要翻译： 公开了一种用于盘存储系统的伺服解码器，该盘存储系统根据能够在搜索操作期间精确地解码表示伺服轨迹地址的检测码字的新型编码方案进行操作，即使当记录头在两个相邻的轨道之间飞行时，也能够校正检测到的错误 读取信号中由噪声引起的编码字，如符号间干扰。 在第一实施例中，编码方案包括能够校正检测码字中预定数量的位错误的纠错码（ECC）。 为了实现常规格雷码的等效效果，码字被布置成使得相邻轨道地址与等于ECC码的最小距离的位数相差。 在第二实施例中，伺服代码校正与网格型序列检测器相关联的某些最小距离误差事件。 为了实现本实施例中常规格雷码的等效效果，码字被布置成使得相邻轨道地址相对于校正的最小距离误差事件相差多个位。 以这种方式，当在搜索操作期间记录头跨越两个相邻轨道时，检测到的码字中的模糊度将被解析为有利于相邻轨道地址之一。 此外，由于代码的纠错能力，本发明提高了伺服寻找和跟踪操作的性能，并允许以更高的密度记录伺服数据。

公开(公告)号：US5999355A

公开(公告)日：1999-12-07

申请号：US640410

申请日：1996-04-30

申请人： Richard T. Behrens ,  William G. Bliss ,  Li Du ,  Mark S. Spurbeck ,  German S. Feyh ,  Trent O. Dudley

发明人： Richard T. Behrens ,  William G. Bliss ,  Li Du ,  Mark S. Spurbeck ,  German S. Feyh ,  Trent O. Dudley

IPC分类号： G11B5/012 ,  G11B5/035 ,  G11B5/09 ,  G11B20/10 ,  G11B20/14 ,  G11B20/18 ,  H03H15/00 ,  H03H17/02 ,  H03H17/06 ,  H04L7/00 ,  H04L7/02 ,  H04L25/03

CPC分类号： G11B20/10055 ,  G11B20/10009 ,  G11B20/10037 ,  G11B20/1403 ,  G11B5/09 ,  G11B5/012 ,  G11B5/035 ,  H04L7/0029 ,  H04L7/0062

摘要： A sampled amplitude read channel for magnetic disk recording which asynchronously samples the analog read signal, adaptively equalizes the resulting discrete time sample values according to a target partial response, extracts synchronous sample values through interpolated timing recovery, and detects digital data from the synchronous sample values using a Viterbi sequence detector is disclosed. To minimize interference from the timing and gain control loops, the phase and magnitude response of the adaptive equalizer filter are constrained at a predetermined frequency using an optimal orthogonal projection operation as a modification to a least mean square (LMS) adaptation algorithm. Further, with interpolated timing recovery, the equalizer filter and its associated latency are removed from the timing recovery loop, thereby allowing a higher order discrete time filter and a lower order analog filter.

摘要翻译： 用于磁盘记录的采样幅度读取通道，其异步采样模拟读取信号，根据目标部分响应对所得离散时间采样值进行自适应均衡，通过内插定时恢复提取同步采样值，并从同步采样值检测数字数据 公开了使用维特比序列检测器。 为了最小化来自定时和增益控制环路的干扰，使用最佳正交投影操作将自适应均衡器滤波器的相位和幅度响应约束在预定频率，作为对最小均方（LMS）适配算法的修改。 此外，通过内插定时恢复，均衡器滤波器及其相关等待时间从定时恢复环路中移除，从而允许较高阶离散时间滤波器和较低阶模拟滤波器。