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502 条记录 (耗时 0.043 秒)

    Power conditioner and method of operating the same
    48.
    发明授权
    Power conditioner and method of operating the same 失效
    功率调节器及其操作方法

    公开(公告)号：US07656057B2

    公开(公告)日：2010-02-02

    申请号：US11860768

    申请日：2007-09-25

    申请人： Yong Wang ,  Duk-Jin Oh ,  See-young Choi

    发明人： Yong Wang ,  Duk-Jin Oh ,  See-young Choi

    IPC分类号： H02J9/00 ,  H01M8/12

    CPC分类号： H02J7/34 ,  H02J2001/004 ,  Y10T307/615

    摘要： A power conditioner for supplying controlled power generated from a power source such as a fuel cell or a solar battery to a load. The power conditioner includes a main converter converting the output voltage of the power source; an auxiliary converter converting the output voltage of the main converter to a voltage that is supplied to BOP elements; and a direct connecting line connecting the output voltage of the power source to the auxiliary converter bypassing the main converter. Accordingly, because the voltage for the power to be supplied to the BOP elements is converted only once, the power loss can be significantly reduced compared to the power loss from a conventional power conditioner.

    摘要翻译： 一种用于将诸如燃料电池或太阳能电池的电源产生的受控电力提供给负载的功率调节器。 功率调节器包括转换电源的输出电压的主转换器; 辅助转换器将主转换器的输出电压转换为提供给BOP元件的电压; 以及将电源的输出电压连接到旁路主转换器的辅助转换器的直接连接线。 因此，因为供给BOP元件的电力的电压仅被转换一次，所以与以往的功率调节器的功率损失相比，能够显着地降低功率损耗。

    Synchronous de-skew with programmable latency for multi-lane high speed serial interface
    49.
    发明申请
    Synchronous de-skew with programmable latency for multi-lane high speed serial interface 有权
    具有多通道高速串行接口的可编程延迟的同步去偏移

    公开(公告)号：US20100008460A1

    公开(公告)日：2010-01-14

    申请号：US12218375

    申请日：2008-07-11

    申请人： Liang- Zhang ,  Hui Wang ,  Yong Wang

    发明人： Liang- Zhang ,  Hui Wang ,  Yong Wang

    IPC分类号： H04L7/00

    CPC分类号： H04L25/14

    摘要： A method and system for performing clock calibration and de-skew on a multi-lane high speed serial interface is presented. Each of a plurality of serial lane transceivers associated with an individual bit lane receives a first data frame, comprising a training sequence header pattern. Based on each of the first data frames, the plurality of serial lane transceivers de-skew a plurality of data frames and generate a plurality of event signals. Using the plurality of event signals, a core clock, having a first phase, is adjusted to be phase aligned with the slowest bit lane.

    摘要翻译： 提出了一种用于在多通道高速串行接口上​​执行时钟校准和去偏移的方法和系统。 与单个位通道相关联的多个串行通道收发器中的每一个接收包括训练序列头部模式的第一数据帧。 基于第一数据帧中的每一个，多个串行通道收发器对多个数据帧进行偏移，并产生多个事件信号。 使用多个事件信号，具有第一相位的核心时钟被调整为与最慢位通道相位对准。

    Linear monotonic delay chain circuit
    50.
    发明申请
    Linear monotonic delay chain circuit 有权
    线性单调延迟链电路

    公开(公告)号：US20100007398A1

    公开(公告)日：2010-01-14

    申请号：US12218486

    申请日：2008-07-11

    申请人： Shengyuan Zhang ,  Shoujun Wang ,  Yong Wang

    发明人： Shengyuan Zhang ,  Shoujun Wang ,  Yong Wang

    IPC分类号： H03H11/26

    CPC分类号： H03H11/265

    摘要： A method and circuit for generating an adjustable delay signal is presented, wherein the delay can be linear and monotonic with high resolution delay steps. The circuit utilizes one or more serially coupled delay cells and a load cell. Each delay cell comprises an inverter, a nor-multiplexer, and a programmable capacitor, wherein a first control signal is used to control the operation of the nor-multiplexer and a second control signal is used to control capacitance of the programmable capacitor. Values of the first and the second control signals are selected based on any desired range of total delay time and any desired delay time for a specific application of the circuit.

    摘要翻译： 提出了一种用于产生可调延迟信号的方法和电路，其中延迟可以是具有高分辨率延迟步长的线性和单调的。 该电路利用一个或多个串联耦合的延迟单元和负载单元。 每个延迟单元包括反相器，非多路复用器和可编程电容器，其中第一控制信号用于控制非多路复用器的操作，并且第二控制信号用于控制可编程电容器的电容。 第一和第二控制信号的值基于总延迟时间的任何期望范围和用于电路的特定应用的任何期望的延迟时间来选择。