公开(公告)号：US20180278221A1

公开(公告)日：2018-09-27

申请号：US15927508

申请日：2018-03-21

申请人： ABLIC Inc.

发明人： Toshiyuki TSUZAKI ,  Masakazu SUGIURA

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F1/0277 ,  H03F3/45672 ,  H03F3/45739 ,  H03F2200/513 ,  H03F2203/45406

摘要： To perform a rail-to-rail input operation, provided is a differential amplifier circuit including a first differential input pair and a second differential input pair which has a threshold value different from that of the first differential input pair. Both the differential input pairs do not operate at the same time. A transistor is connected between the first differential input pair and a current source to achieve a configuration in which the first differential input pair and the second differential input pair do not operate at the same time.

公开(公告)号：US20150077183A1

公开(公告)日：2015-03-19

申请号：US14031806

申请日：2013-09-19

申请人： Analog Devices, Inc.

发明人： Alexandru A. Ciubotaru

IPC分类号： H03F3/45 ,  H03G3/00

CPC分类号： H03F3/45179 ,  H03F3/45632 ,  H03F2200/91 ,  H03F2203/45406 ,  H03F2203/45424 ,  H03F2203/45431 ,  H03G1/0029 ,  H03G3/00

摘要： An integrated, fully-differential current-feedback transimpedance operational amplifier circuit is disclosed. The circuit can be configured as a class-AB, low-impedance input stage, followed by an inverter-based, rail-to-rail output stage. For enhancing the open-loop transimpedance gain of the amplifier without consuming additional DC power, the same bias current is used both in the input stage and in a gain-enhancement stage serving as its load. The gain-enhancement stage can be either DC- or AC-coupled to the input of the amplifier. In the case of DC coupling, an output common-mode feedback loop can be used to provide the proper operating voltages in the amplifier.

摘要翻译： 公开了一种集成的全差分电流反馈跨阻运算放大器电路。 该电路可以配置为AB类，低阻抗输入级，其次是基于变频器的轨到轨输出级。 为了增强放大器的开环跨阻增益而不消耗额外的直流电源，在输入级和用作其负载的增益级中都使用相同的偏置电流。 增益级可以与放大器的输入端直流或交流耦合。 在DC耦合的情况下，可以使用输出共模反馈环来在放大器中提供适当的工作电压。

公开(公告)号：US07924095B2

公开(公告)日：2011-04-12

申请号：US12458630

申请日：2009-07-17

申请人： Ahmad Yazdi ,  Ahmad Mirzaei ,  Hooman Darabi

发明人： Ahmad Yazdi ,  Ahmad Mirzaei ,  Hooman Darabi

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/4565 ,  H03F2203/45008 ,  H03F2203/45082 ,  H03F2203/45406 ,  H03F2203/45692

摘要： An operational amplifier is provided. The operational amplifier includes a first transistor configured to receive a first input voltage, a second transistor configured to receive a second input voltage, and a current steering module coupled to first and second transistors and configured to receive a reference voltage. The first and second transistors form a differential pair. The first transistor, second transistor, and current steering module are configured such that a current is steered from the current steering module or to the current steering module based on common-mode voltages of the first and second input voltages and the reference voltage to set a common-mode output voltage of the operational amplifier.

摘要翻译： 提供运算放大器。 运算放大器包括被配置为接收第一输入电压的第一晶体管，被配置为接收第二输入电压的第二晶体管，以及耦合到第一和第二晶体管并被配置为接收参考电压的电流导向模块。 第一和第二晶体管形成差分对。 第一晶体管，第二晶体管和电流转向模块被配置成使得电流基于第一和第二输入电压和参考电压的共模电压被转向从当前转向模块或当前转向模块，以将 运算放大器的共模输出电压。

公开(公告)号：US07564308B1

公开(公告)日：2009-07-21

申请号：US11818398

申请日：2007-06-13

申请人： Saurabh Vats

发明人： Saurabh Vats

IPC分类号： H03F3/45

CPC分类号： H03F3/45134 ,  H03F3/45121 ,  H03F3/45506 ,  H03F2203/45406 ,  H03F2203/45424 ,  H03F2203/45434 ,  H03F2203/45652 ,  H03F2203/45722

摘要： An operational amplifier in accordance with one embodiment of the invention includes folded cascode transistors and a self-biased common-mode feedback circuit coupled to the folded cascode transistors. The operational amplifier can include an output stage coupled to the self-biased common-mode feedback circuit and the folded cascode transistors.

摘要翻译： 根据本发明的一个实施例的运算放大器包括折叠共源共栅晶体管和耦合到折叠共源共栅晶体管的自偏压共模反馈电路。 运算放大器可以包括耦合到自偏置共模反馈电路和折叠共源共栅晶体管的输出级。

公开(公告)号：US07215153B2

公开(公告)日：2007-05-08

申请号：US11266207

申请日：2005-11-04

申请人： Hung-Sung Li

发明人： Hung-Sung Li

IPC分类号： H03K19/094 ,  H03F3/45

CPC分类号： H03F3/45708 ,  H03F3/45192 ,  H03F2203/45361 ,  H03F2203/45401 ,  H03F2203/45406

摘要： An input buffer for use in a differential operational amplifier is disclosed that regulates current through a main input differential pair while preventing output distortion and allowing high linearity. The input buffer includes a main input transistor pair that receives a voltage input, a tail current source, and a squeezable tail current source circuit including a single-ended self-biased folded feedback loop. These are configured such that current through the main input transistor pair is maintained as the voltage input varies. The folded feedback loop includes a folding transistor and a biasing current source that biases the folding transistor. The squeezable tail current source circuit also includes a replica transistor pair, a bias transistor, and a tail transistor pair. The biasing current source and folding transistor isolate the bias transistor and tail transistor pair from a drain voltage of the replica transistor pair, preventing output distortion and allowing high linearity.

摘要翻译： 公开了一种用于差分运算放大器的输入缓冲器，其调节通过主输入差分对的电流，同时防止输出失真并允许高线性度。 输入缓冲器包括接收电压输入的主输入晶体管对，尾电流源和包括单端自偏置折叠反馈回路的可压缩尾电流源电路。 这些配置使得当电压输入变化时，保持通过主输入晶体管对的电流。 折叠的反馈回路包括折叠晶体管和偏置电流源，偏置电流源偏置折叠晶体管。 可挤压尾电流源电路还包括复制晶体管对，偏置晶体管和尾部晶体管对。 偏置电流源和折叠晶体管将偏置晶体管和尾部晶体管对与复制晶体管对的漏极电压隔离，从而防止输出失真并允许高线性度。

公开(公告)号：US07049889B2

公开(公告)日：2006-05-23

申请号：US10911371

申请日：2004-08-03

申请人： Arthur J. Kalb

发明人： Arthur J. Kalb

IPC分类号： H03F3/45

CPC分类号： H03F3/45744 ,  H03F1/301 ,  H03F3/4573 ,  H03F2203/45212 ,  H03F2203/45406

摘要： Differential stage voltage offset trim circuitry involves the use of one or more trim circuits, each of which is dedicated to trimming one particular source of voltage offset (Vos) error for a “main” differential pair. One trim circuit may be dedicated to trimming Vos error that arises due to mismatch between the main pairs' threshold voltages, and another trim circuit may be dedicated to trimming Vos error that arises due to mismatch between the main pairs' beta values. Another trim circuit can trim Vos error due to gamma mismatch between the main pair transistors, and respective trim circuits can be employed to trim Vos error that arises due to threshold mismatch and/or beta mismatch between the transistors of an active load driven by the main pair. Several trim circuits may be employed simultaneously to reduce offset errors that arise from each of several sources.

摘要翻译： 差分级电压偏移调整电路涉及使用一个或多个微调电路，每个微调电路专用于修整“主”差分对的一个特定电压偏移源（V OUT）。 一个微调电路可以专用于修剪由于主对阈值电压之间的失配而产生的错误，并且另一个微调电路可以专用于修整V OSOS错误 这是由于主要对的β值之间的不匹配引起的。 另一个微调电路可以由于主对晶体管之间的伽马不匹配而修正V OS错误，并且可以采用相应的微调电路来修正由于阈值失配引起的V OSO错误 和/或由主对驱动的有源负载的晶体管之间的β失配。 可以同时采用多个微调电路来减少由多个源中的每一个产生的偏移误差。

公开(公告)号：US06998907B1

公开(公告)日：2006-02-14

申请号：US10847103

申请日：2004-05-17

申请人： Willem J. Kindt ,  Gertjan V. Sprakelaar

发明人： Willem J. Kindt ,  Gertjan V. Sprakelaar

IPC分类号： H03F3/45 ,  G06G7/12

CPC分类号： H03F3/45834 ,  H03F1/26 ,  H03F3/45192 ,  H03F3/45291 ,  H03F3/45686 ,  H03F2203/45366 ,  H03F2203/45406 ,  H03F2203/45424

摘要： An input stage employs low-voltage MOSFETs as input devices for an operational amplifier circuit that operates at common mode voltages that may exceed the gate-oxide breakdown voltage of the input devices. Also, the input stage is arranged for relatively low noise. The input stage is arranged to detect the input common mode voltage and to feed back the detected input common mode voltage to a base of a bipolar folded cascode transistor that is coupled to the drain of the input devices. Accordingly, the input devices are bootstrapped such that they are protected from gate-oxide breakdown.

摘要翻译： 输入级使用低压MOSFET作为运算放大器电路的输入装置，该运算放大器电路在可能超过输入装置的栅氧化物击穿电压的共模电压下工作。 此外，输入级被布置为相对低的噪声。 输入级被布置成检测输入共模电压并将检测到的输入共模电压反馈到耦合到输入器件的漏极的双折叠共源共栅晶体管的基极。 因此，输入装置被自举，使得它们被保护免受栅极氧化物击穿。

公开(公告)号：US06977526B2

公开(公告)日：2005-12-20

申请号：US10761276

申请日：2004-01-22

申请人： Hung-Sung Li

发明人： Hung-Sung Li

IPC分类号： H03F3/45 ,  H03K19/0175 ,  H03K19/094

CPC分类号： H03F3/45708 ,  H03F3/45192 ,  H03F2203/45361 ,  H03F2203/45401 ,  H03F2203/45406

摘要： A squeezable tail current source for use in a differential operational amplifier is disclosed that regulates the current through a main input differential pair while preventing output distortion and allowing high linearity. The squeezable tail current source includes a first transistor pair that replicates a main input transistor pair, wherein both the first transistor pair and the main input transistor pair receive a common voltage input at their respective gates. The squeezable tail current source also includes a second transistor pair, a bias transistor, a first current source, a folding transistor, and a second current source that biases the folding transistor. These components are configured such that current through the main input transistor pair is maintained as the voltage input varies. In addition, the second current source and the folding transistor isolate the bias transistor and the second transistor pair from a drain voltage of the first transistor pair, thereby causing the first transistor pair and the main input transistor pair to have a common drain bias, which prevents output distortion and allows high linearity to be achieved.

公开(公告)号：US20050218980A1

公开(公告)日：2005-10-06

申请号：US10911371

申请日：2004-08-03

申请人： Arthur Kalb

发明人： Arthur Kalb

IPC分类号： H03F1/30 ,  H03F3/45

CPC分类号： H03F3/45744 ,  H03F1/301 ,  H03F3/4573 ,  H03F2203/45212 ,  H03F2203/45406

摘要： Differential stage voltage offset trim circuitry involves the use of one or more trim circuits, each of which is dedicated to trimming one particular source of voltage offset (Vos) error for a “main” differential pair. One trim circuit may be dedicated to trimming Vos error that arises due to mismatch between the main pairs' threshold voltages, and another trim circuit may be dedicated to trimming Vos error that arises due to mismatch between the main pairs' beta values. Another trim circuit can trim Vos error due to gamma mismatch between the main pair transistors, and respective trim circuits can be employed to trim Vos error that arises due to threshold mismatch and/or beta mismatch between the transistors of an active load driven by the main pair. Several trim circuits may be employed simultaneously to reduce offset errors that arise from each of several sources.

摘要翻译： 差分级电压偏移调整电路涉及使用一个或多个微调电路，每个微调电路专用于修整“主”差分对的一个特定电压偏移源（V OUT）。 一个微调电路可以专用于修剪由于主对阈值电压之间的失配而产生的错误，并且另一个微调电路可以专用于修整V OSOS错误 这是由于主要对的β值之间的不匹配引起的。 另一个微调电路可以由于主对晶体管之间的伽马不匹配而修正V OS错误，并且可以采用相应的微调电路来修正由于阈值失配引起的V OSO错误 和/或由主对驱动的有源负载的晶体管之间的β失配。 可以同时采用多个微调电路来减少由多个源中的每一个产生的偏移误差。

公开(公告)号：US06448848B1

公开(公告)日：2002-09-10

申请号：US09751435

申请日：2000-12-29

申请人： Michael W. Altmann

发明人： Michael W. Altmann

IPC分类号： G06G712

CPC分类号： H03F3/45946 ,  H03F3/45659 ,  H03F2203/45406 ,  H03F2203/45431 ,  H03F2203/45631 ,  H03H11/0433

摘要： An apparatus and method is disclosed wherein a first gm-C cell has an output, a second gm-C cell has an input coupled to the output of the first gm-C cell, and a feedback loop is coupled between the first and the second gm-C cell to control a CM voltage with respect to a reference.

摘要翻译： 公开了一种装置和方法，其中第一gm-C单元具有输出，第二gm-C单元具有耦合到第一gm-C单元的输出的输入，并且反馈回路耦合在第一和第二 gm-C电池以控制相对于参考电压的CM电压。