公开(公告)号：US08361757B2

公开(公告)日：2013-01-29

申请号：US13241262

申请日：2011-09-23

申请人： Yin-Chao Huang ,  Shi-Bai Chen ,  Kang-Wei Hsueh ,  Hung-Sung Li

发明人： Yin-Chao Huang ,  Shi-Bai Chen ,  Kang-Wei Hsueh ,  Hung-Sung Li

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/49575 ,  H01L23/49531 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48145 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device assembly includes a first semiconductor die, a second semiconductor die, at least one semiconductor package component or another semiconductor die, a first conductive element and a second conductive element. The first semiconductor die includes at least one bonding pad. The second semiconductor die includes a bonding pad module. The first conductive element is coupled between the bonding pad module of the second semiconductor die and the bonding pad of the first semiconductor die, and the second conductive element is coupled between the bonding pad module of the second semiconductor die and the semiconductor package component or the another semiconductor die, wherein the first semiconductor die is coupled to the semiconductor package component or the another semiconductor die via the bonding pad and the bonding pad module and the first and second conductive elements.

摘要翻译： 半导体器件组件包括第一半导体管芯，第二半导体管芯，至少一个半导体封装部件或另一个半导体管芯，第一导电元件和第二导电元件。 第一半导体管芯包括至少一个焊盘。 第二半导体管芯包括焊盘模块。 第一导电元件耦合在第二半导体管芯的焊盘模块和第一半导体管芯的焊盘之间，并且第二导电元件耦合在第二半导体管芯的焊盘模块和半导体封装部件之间或者 另一个半导体管芯，其中第一半导体管芯经由焊盘和焊盘模块以及第一和第二导电元件耦合到半导体封装部件或另一半导体管芯。

公开(公告)号：US08110876B2

公开(公告)日：2012-02-07

申请号：US12620254

申请日：2009-11-17

申请人： Hung-Sung Li ,  Laurentiu Vasiliu

发明人： Hung-Sung Li ,  Laurentiu Vasiliu

IPC分类号： H01L29/861 ,  H01L23/62

CPC分类号： H01L27/0255

摘要： An ESD protection system providing extra headroom at an integrated circuit (IC) terminal pad. The system includes an ESD protection circuit having one or more first diodes coupled in series between the supply voltage and terminal pad, and a second diode coupled to ground. One or more third diodes are coupled in series between the terminal pad and second diode, and are configured to permit a voltage on the interconnection nodes between the one or more third diodes and second diode different from ground. The one or more third diodes include an n+ on an area of P-substrate. A deep N-well separates the area of P-substrate from a common area of P-substrate, which is coupled to ground. The allowable signal swing at the terminal pad is increased to greater than supply voltage plus 1.4 V. The ESD protection circuit is useful for, among other things, relatively low supply voltage ICs.

摘要翻译： 一种ESD保护系统，在集成电路（IC）端子板上提供额外的余量。 该系统包括ESD保护电路，其具有串联在电源电压和端子焊盘之间的一个或多个第一二极管和耦合到地的第二二极管。 一个或多个第三二极管串联在端子焊盘和第二二极管之间，并且被配置为允许在一个或多个第三二极管和与地之间不同的第二二极管之间的互连节点上的电压。 一个或多个第三二极管包括P基底区域上的n +。 深N阱将P基板的区域与耦合到地面的P基板的公共区域分离。 端子焊盘处的允许信号摆幅增加到大于电源电压加上1.4V。ESD保护电路尤其适用于较低的电源电压IC。

公开(公告)号：US20100225515A1

公开(公告)日：2010-09-09

申请号：US12775543

申请日：2010-05-07

申请人： Zwei-Mei Lee ,  Kang-Wei Hsueh ,  Ya-Lun Yang ,  Hung-Sung Li ,  Pao-Cheng Chiu

发明人： Zwei-Mei Lee ,  Kang-Wei Hsueh ,  Ya-Lun Yang ,  Hung-Sung Li ,  Pao-Cheng Chiu

IPC分类号： H03M1/00 ,  G11C27/02 ,  H03M1/12

CPC分类号： H03M1/1038 ,  H03M1/0682 ,  H03M1/1245

摘要： A track and hold amplifier is provided. The track and hold amplifier includes an input node receiving an analog signal, a buffer coupled between a first node and an output node, a first switch coupled between the input node and the first node, a plurality of switching circuits and a voltage generating unit. Each of the switching circuits includes a capacitor coupled between the first node and a second node. The voltage generating unit selectively provides a common signal or a reference signal to the capacitors of the switching circuits, wherein the reference signal is independent from the analog signal.

摘要翻译： 提供了一个跟踪和保持放大器。 轨道和保持放大器包括接收模拟信号的输入节点，耦合在第一节点和输出节点之间的缓冲器，耦合在输入节点和第一节点之间的第一开关，多个开关电路和电压产生单元。 每个开关电路包括耦合在第一节点和第二节点之间的电容器。 电压产生单元选择性地向切换电路的电容器提供公共信号或参考信号，其中参考信号独立于模拟信号。

公开(公告)号：US07605654B2

公开(公告)日：2009-10-20

申请号：US12047415

申请日：2008-03-13

申请人： Yung-Chih Yen ,  Hung-Sung Li

发明人： Yung-Chih Yen ,  Hung-Sung Li

IPC分类号： H03F3/45

CPC分类号： H03F3/45475 ,  H03F3/45188 ,  H03F3/45192 ,  H03F2203/45136 ,  H03F2203/45528

摘要： A telescopic operational amplifier including a current source, an input stage, and a load stage is provided. The input stage is coupled to the current source and includes a group of input transistors for receiving an input voltage. The load stage is coupled to the input stage and includes a group of load transistors for outputting an output voltage. The threshold voltages of the group of input transistors are larger than that of the group of load transistors.

摘要翻译： 提供了包括电流源，输入级和负载级的伸缩运算放大器。 输入级耦合到电流源，并且包括用于接收输入电压的一组输入晶体管。 负载级耦合到输入级，并且包括用于输出输出电压的一组负载晶体管。 输入晶体管组的阈值电压大于负载晶体管组的阈值电压。

公开(公告)号：US20090021643A1

公开(公告)日：2009-01-22

申请号：US12118811

申请日：2008-05-12

申请人： Kang-Wei Hsueh ,  Ya-Lun Yang ,  Hung-Sung Li

发明人： Kang-Wei Hsueh ,  Ya-Lun Yang ,  Hung-Sung Li

IPC分类号： H03M1/12 ,  H04N9/77

CPC分类号： H04N9/642 ,  G09G5/008 ,  H04N1/32358 ,  H04N5/14 ,  H04N5/20 ,  H04N5/21 ,  H04N5/44 ,  H04N5/52 ,  H04N9/64 ,  H04N21/42607

摘要： A digital television chip having a reduced layout size is disclosed, comprising a multiplexer, and first and second converting units. The multiplexer, according to a control signal, outputs one of S-video signals SY and SC to the first converting unit, outputs the other of the S-video signals SY and SC to the second converting unit, outputs one of Tuner CVBS signals VIF and SIF to the first converting unit, outputs the other of the Tuner CVBS signals VIF and SIF to the second converting unit, or outputs a CVBS Line-in Video signal to one of the first and second converting units, for reducing the size of the chip. The first converting unit converts one of the S-video signals SY and SC, one of the Tuner CVBS signals VIF and SIF, or the CVBS Line-in Video signal into a first digital signal for signal processing. The second converting unit converts one of the S-video signals SY and SC, one of the Tuner CVBS signals VIF and SIF, or the CVBS Line-in Video signal into a second digital signal for signal processing.

摘要翻译： 公开了一种具有缩小布局尺寸的数字电视芯片，包括多路复用器以及第一和第二转换单元。 根据控制信号，多路复用器将S视频信号SY和SC中的一个输出到第一转换单元，将另一个S视频信号SY和SC输出到第二转换单元，输出调谐器CVBS信号VIF 和SIF传送到第一转换单元，将调谐器CVBS信号VIF和SIF中的另一个输出到第二转换单元，或者将CVBS线路输入视频信号输出到第一和第二转换单元之一，以减小 芯片。 第一转换单元将S视频信号SY和SC中的一个将调谐器CVBS信号VIF和SIF中的一个或CVBS线路输入视频信号转换成用于信号处理的第一数字信号。 第二转换单元将S视频信号SY和SC中的一个将调谐器CVBS信号VIF和SIF中的一个或CVBS线路输入视频信号转换成用于信号处理的第二数字信号。

公开(公告)号：US07348838B2

公开(公告)日：2008-03-25

申请号：US11115199

申请日：2005-04-27

申请人： Sumant Ranganathan ,  Tom W. Kwan ,  Hung-Sung Li

发明人： Sumant Ranganathan ,  Tom W. Kwan ,  Hung-Sung Li

IPC分类号： H03D3/00 ,  H03L5/00

CPC分类号： H04B1/30

摘要： Provided are a method and system for removing an offset direct current (DC) component from an input waveform. The method includes multiplying the input waveform with a demodulation waveform to produce a first differential current signal. An absolute value representation of the demodulation waveform is multiplied with a reference DC offset value to produce a second differential current signal. The first and second differential current signals are then differenced.

摘要翻译： 提供了用于从输入波形去除偏移直流（DC）分量的方法和系统。 该方法包括将输入波形与解调波形相乘以产生第一差分电流信号。 将解调波形的绝对值表示与参考DC偏移值相乘以产生第二差分电流信号。 然后，第一和第二差分电流信号被差分。

公开(公告)号：US07302505B2

公开(公告)日：2007-11-27

申请号：US10306558

申请日：2002-11-27

申请人： Joseph M Ingino, Jr. ,  Hung-Sung Li

发明人： Joseph M Ingino, Jr. ,  Hung-Sung Li

IPC分类号： G06F3/00 ,  G06F3/05 ,  G06F13/42 ,  G11C7/00 ,  G11C7/10

CPC分类号： H04L69/08 ,  H04L69/18

摘要： A receiver multi-protocol interface includes a wide bandwidth amplifier, a data sampling module, and a clocking module. The wide bandwidth amplifier amplifies a first formatted input signal or a second formatted input signal to produce an amplified input signal. The data sampling module converts the amplified input signal into a first data stream in accordance with at least one first sampling clock signal when the interface is configured in the first mode and to converts the amplified input signal into a second data stream in accordance with at least a second sampling clock signal when the interface is in a second mode. The clocking module generates the first sampling clock signals from a reference clock when the multi-protocol interface is in a first operational mode and generates the second sampling clock signals based on the reference clock when the interface is in the second operational mode.

摘要翻译： 接收机多协议接口包括宽带宽放大器，数据采样模块和时钟模块。 宽带宽放大器放大第一格式化的输入信号或第二格式化的输入信号以产生放大的输入信号。 当接口被配置为第一模式时，数据采样模块根据至少一个第一采样时钟信号将放大的输入信号转换成第一数据流，并且至少根据至少一个第二数据流将放大的输入信号转换成第二数据流 当接口处于第二模式时的第二采样时钟信号。 当多协议接口处于第一操作模式时，时钟模块从参考时钟产生第一采样时钟信号，并且当接口处于第二操作模式时，基于参考时钟产生第二采样时钟信号。

公开(公告)号：US20050238123A1

公开(公告)日：2005-10-27

申请号：US11115226

申请日：2005-04-27

申请人： Sumant Ranganathan ,  Tom Kwan ,  Hung-Sung Li

发明人： Sumant Ranganathan ,  Tom Kwan ,  Hung-Sung Li

IPC分类号： G01D5/24 ,  G01L9/12 ,  G01P15/125 ,  H04L27/06

CPC分类号： G01D5/24 ,  G01L9/12 ,  G01P15/125

摘要： Provided are a method and system for digitizing a sensor model output signal. The system includes a filter, a demodulator coupled to the filter, a DC offset cancellation mechanism coupled to the demodulator, and an analog to digital converter (ADC). The ADC is directly coupled to the demodulator and the DC offset cancellation mechanism.

摘要翻译： 提供了一种用于数字化传感器模型输出信号的方法和系统。 该系统包括滤波器，耦合到滤波器的解调器，耦合到解调器的DC偏移消除机构，以及模数转换器（ADC）。 ADC直接耦合到解调器和DC偏移消除机制。

公开(公告)号：US20050162190A1

公开(公告)日：2005-07-28

申请号：US10761276

申请日：2004-01-22

申请人： Hung-Sung Li

发明人： Hung-Sung Li

IPC分类号： H03F3/45 ,  H03K19/0175 ,  H03K19/094

CPC分类号： H03F3/45708 ,  H03F3/45192 ,  H03F2203/45361 ,  H03F2203/45401 ,  H03F2203/45406

摘要： A squeezable tail current source for use in a differential operational amplifier is disclosed that regulates the current through a main input differential pair while preventing output distortion and allowing high linearity. The squeezable tail current source includes a first transistor pair that replicates a main input transistor pair, wherein both the first transistor pair and the main input transistor pair receive a common voltage input at their respective gates. The squeezable tail current source also includes a second transistor pair, a bias transistor, a first current source, a folding transistor, and a second current source that biases the folding transistor. These components are configured such that current through the main input transistor pair is maintained as the voltage input varies. In addition, the second current source and the folding transistor isolate the bias transistor and the second transistor pair from a drain voltage of the first transistor pair, thereby causing the first transistor pair and the main input transistor pair to have a common drain bias, which prevents output distortion and allows high linearity to be achieved.

摘要翻译： 公开了一种用于差分运算放大器的可压缩尾电流源，其调节通过主输入差分对的电流，同时防止输出失真并允许高线性度。 可压缩尾电流源包括复制主输入晶体管对的第一晶体管对，其中第一晶体管对和主输入晶体管对均在其各自的栅极处接收公共电压输入。 可挤压尾电流源还包括偏置折叠晶体管的第二晶体管对，偏置晶体管，第一电流源，折叠晶体管和第二电流源。 这些部件配置成使得当电压输入变化时，通过主输入晶体管对的电流被维持。 此外，第二电流源和折叠晶体管将偏置晶体管和第二晶体管对与第一晶体管对的漏极电压隔离，从而使第一晶体管对和主输入晶体管对具有共同的漏极偏置，其中 防止输出失真并允许实现高线性度。

公开(公告)号：US20050133873A1

公开(公告)日：2005-06-23

申请号：US10736681

申请日：2003-12-17

申请人： Hung-Sung Li ,  Laurentiu Vasiliu

发明人： Hung-Sung Li ,  Laurentiu Vasiliu

IPC分类号： H01L27/02 ,  H01L29/06

CPC分类号： H01L27/0255

摘要： An ESD protection system providing extra headroom at an integrated circuit (IC) terminal pad. The system includes an ESD protection circuit having one or more first diodes coupled in series between the supply voltage and terminal pad, and a second diode coupled to ground. One or more third diodes are coupled in series between the terminal pad and second diode, and are configured to permit a voltage on the interconnection nodes between the one or more third diodes and second diode different from ground. The one or more third diodes include an n+ on an area of P-substrate. A deep N-well separates the area of P-substrate from a common area of P-substrate, which is coupled to ground. The allowable signal swing at the terminal pad is increased to greater than supply voltage plus 1.4 V. The ESD protection circuit is useful for, among other things, relatively low supply voltage ICs.

摘要翻译： 一种ESD保护系统，在集成电路（IC）端子板上提供额外的余量。 该系统包括ESD保护电路，其具有串联在电源电压和端子焊盘之间的一个或多个第一二极管和耦合到地的第二二极管。 一个或多个第三二极管串联在端子焊盘和第二二极管之间，并且被配置为允许在一个或多个第三二极管和与地之间不同的第二二极管之间的互连节点上的电压。 一个或多个第三二极管包括P基底区域上的n +。 深N阱将P基板的区域与耦合到地面的P基板的公共区域分离。 端子焊盘处的允许信号摆幅增加到大于电源电压加上1.4V。ESD保护电路尤其适用于较低的电源电压IC。