公开(公告)号：US20120182075A1

公开(公告)日：2012-07-19

申请号：US13007321

申请日：2011-01-14

申请人： Evgueni Ivanov ,  Arthur Kalb

发明人： Evgueni Ivanov ,  Arthur Kalb

IPC分类号： H03F3/68 ,  H03F1/22

CPC分类号： H03F1/14 ,  H03F1/086 ,  H03F3/45192

摘要： An amplifier circuit includes a first amplifier stage having a first output node; a second amplifier stage having a second output node; and a compensation block electrically coupled between the first and second output nodes. The compensation block has a compensation capacitor electrically coupled to the first node and electrically connectable to the second node, and has an impedance electrically connectable to the compensation capacitor. The compensation capacitor is electrically coupled via a switch to the impedance such that the compensation capacitor can contribute a zero to shunt branch formed by the compensation capacitor and impedance when the compensation capacitor is disconnected from the second node.

摘要翻译： 放大器电路包括具有第一输出节点的第一放大器级; 具有第二输出节点的第二放大器级; 以及电耦合在第一和第二输出节点之间的补偿块。 补偿块具有电耦合到第一节点并可电连接到第二节点的补偿电容器，并且具有可电连接到补偿电容器的阻抗。 补偿电容器经由开关电耦合到阻抗，使得当补偿电容器与第二节点断开连接时，补偿电容器可以贡献零补偿由补偿电容器形成的分支和阻抗。

公开(公告)号：US20060197586A1

公开(公告)日：2006-09-07

申请号：US11098904

申请日：2005-04-04

申请人： Arthur Kalb

发明人： Arthur Kalb

IPC分类号： G05F1/10

CPC分类号： G05F3/205 ,  H03F2200/18 ,  H03F2200/61 ,  H03K17/063 ,  H03K17/6871 ,  H03K2217/0018

摘要： Bias networks are provided for accurate generation of biases of cascode transistor arrangements. Network embodiments generate a voltage that accurately biases the transistor of a cascode arrangement at a selected point in its saturation region and this voltage is accurately transferred to the drain of a transistor via the gate-to-source voltage drops of a pair of gate-coupled transistors.

摘要翻译： 偏置网络被提供用于准确地产生共源共栅晶体管布置的偏置。 网络实施例产生电压，其精确地偏置其饱和区域中的选定点处的共源共栅布置的晶体管，并且该电压通过一对栅极耦合的栅极 - 源极电压降被精确地传输到晶体管的漏极 晶体管。

公开(公告)号：US20050218980A1

公开(公告)日：2005-10-06

申请号：US10911371

申请日：2004-08-03

申请人： Arthur Kalb

发明人： Arthur Kalb

IPC分类号： H03F1/30 ,  H03F3/45

CPC分类号： H03F3/45744 ,  H03F1/301 ,  H03F3/4573 ,  H03F2203/45212 ,  H03F2203/45406

摘要： Differential stage voltage offset trim circuitry involves the use of one or more trim circuits, each of which is dedicated to trimming one particular source of voltage offset (Vos) error for a “main” differential pair. One trim circuit may be dedicated to trimming Vos error that arises due to mismatch between the main pairs' threshold voltages, and another trim circuit may be dedicated to trimming Vos error that arises due to mismatch between the main pairs' beta values. Another trim circuit can trim Vos error due to gamma mismatch between the main pair transistors, and respective trim circuits can be employed to trim Vos error that arises due to threshold mismatch and/or beta mismatch between the transistors of an active load driven by the main pair. Several trim circuits may be employed simultaneously to reduce offset errors that arise from each of several sources.

摘要翻译： 差分级电压偏移调整电路涉及使用一个或多个微调电路，每个微调电路专用于修整“主”差分对的一个特定电压偏移源（V OUT）。 一个微调电路可以专用于修剪由于主对阈值电压之间的失配而产生的错误，并且另一个微调电路可以专用于修整V OSOS错误 这是由于主要对的β值之间的不匹配引起的。 另一个微调电路可以由于主对晶体管之间的伽马不匹配而修正V OS错误，并且可以采用相应的微调电路来修正由于阈值失配引起的V OSO错误 和/或由主对驱动的有源负载的晶体管之间的β失配。 可以同时采用多个微调电路来减少由多个源中的每一个产生的偏移误差。

公开(公告)号：US20080007368A1

公开(公告)日：2008-01-10

申请号：US11810517

申请日：2007-06-05

申请人： Arthur Kalb ,  Evaldo Miranda

发明人： Arthur Kalb ,  Evaldo Miranda

IPC分类号： H03H21/00

CPC分类号： H03K17/56 ,  H03H7/40 ,  H03H11/28

摘要： Electrical networks are formed to produce an approximation of at least one desired performance characteristic, based on the recognition that fabrication variations introduce slight differences in electronic sub-networks which were intended to be identical. These fabrication differences are turned to an advantage by providing a pool of sub-networks, and then selectively connecting particular combinations of these sub-networks to implement networks that approximate the desired performance characteristics. The sub-networks are of like kind (e.g., resistors) and have a like measure.

摘要翻译： 基于认识到制造变化引入旨在相同的电子子网络的轻微差异，形成电网络以产生至少一个期望的性能特征的近似。 通过提供一个子网络池，然后选择性地连接这些子网络的特定组合来实现近似所期望的性能特征的网络，这些制造差异变得有利。 子网络类似（例如，电阻器）并且具有相似的测量。

公开(公告)号：US08395448B2

公开(公告)日：2013-03-12

申请号：US13007321

申请日：2011-01-14

申请人： Evgueni Ivanov ,  Arthur Kalb

发明人： Evgueni Ivanov ,  Arthur Kalb

IPC分类号： H03F1/14

CPC分类号： H03F1/14 ,  H03F1/086 ,  H03F3/45192

摘要： An amplifier circuit includes a first amplifier stage having a first output node; a second amplifier stage having a second output node; and a compensation block electrically coupled between the first and second output nodes. The compensation block has a compensation capacitor electrically coupled to the first node and electrically connectable to the second node, and has an impedance electrically connectable to the compensation capacitor. The compensation capacitor is electrically coupled via a switch to the impedance such that the compensation capacitor can contribute a zero to shunt branch formed by the compensation capacitor and impedance when the compensation capacitor is disconnected from the second node.

摘要翻译： 放大器电路包括具有第一输出节点的第一放大器级; 具有第二输出节点的第二放大器级; 以及电耦合在第一和第二输出节点之间的补偿块。 补偿块具有电耦合到第一节点并可电连接到第二节点的补偿电容器，并且具有可电连接到补偿电容器的阻抗。 补偿电容器经由开关电耦合到阻抗，使得当补偿电容器与第二节点断开连接时，补偿电容器可以贡献零补偿由补偿电容器形成的分支和阻抗。

公开(公告)号：US08174321B1

公开(公告)日：2012-05-08

申请号：US13007321

申请日：2011-01-14

申请人： Evgueni Ivanov ,  Arthur Kalb

发明人： Evgueni Ivanov ,  Arthur Kalb

IPC分类号： H03F1/14

摘要： An amplifier circuit includes a first amplifier stage having a first output node; a second amplifier stage having a second output node; and a compensation block electrically coupled between the first and second output nodes. The compensation block has a compensation capacitor electrically coupled to the first node and electrically connectable to the second node, and has an impedance electrically connectable to the compensation capacitor. The compensation capacitor is electrically coupled via a switch to the impedance such that the compensation capacitor can contribute a zero to shunt branch formed by the compensation capacitor and impedance when the compensation capacitor is disconnected from the second node.