-
公开(公告)号：US20160020754A1
公开(公告)日：2016-01-21
申请号：US14569140
申请日：2014-12-12
申请人： SK hynix Inc.
发明人： Seong-Jin KIM , Sung-Soo CHI
CPC分类号： H03K3/013 , H03K3/356104
摘要： An integrated circuit includes a latch block suitable for storing a signal through four or more even-numbered coupling lines inverted and driven alternately with each other, wherein the coupling lines are divided into two or more coupling line groups each including coupling lines inverted and driven to the same logic level, and a charge buffer block coupled between two or more coupling lines included in one of the coupling line groups and suitable for slowing down a charge movement speed therebetween.
摘要翻译： 集成电路包括适于通过四个或更多个偶数编号的耦合线彼此反向和交替地存储信号的锁存块，其中耦合线被分成两个或更多个耦合线组，每个耦合线组包括反相和驱动的耦合线 相同的逻辑电平，以及耦合在包括在耦合线组之一中的两个或更多个耦合线之间的电荷缓冲块，并且适于减缓它们之间的充电移动速度。
-
公开(公告)号：US09197201B2
公开(公告)日：2015-11-24
申请号：US14294237
申请日：2014-06-03
发明人： Hiroyuki Ogawa , Takayuki Sakurai , Tetsuo Yoshimitsu , Tatsuya Hirose , Satoshi Hiroshima , Masayuki Hikita , Masahiro Kozako , Takahisa Ueno
摘要： A signal generator generates a combined signal that is generated only in the period where supply of a pulse signal is effected, a pulse signal whose frequency is of a higher impulse repetition frequency than the frequency of the period setting signal and whose amplitude represents a voltage value that is lower than the high voltage HVDC value. A semiconductor switch accumulates electric charge on a capacitative element by means of the high voltage HVDC from the high voltage generator when the voltage value of the combined signal is lower than the set gate voltage value and generates an impulse voltage whose peak value is the value of the high voltage HVDC, by means of the electric charge that is discharged from the capacitative element when the voltage value of the combined signal exceeds the set gate voltage value.
摘要翻译： 信号发生器产生仅在实施脉冲信号供给的周期中产生的组合信号，其频率比周期设定信号的频率高的脉冲重复频率的脉冲信号，其振幅表示电压值 即低于高压HVDC值。 当组合信号的电压值低于设定的栅极电压值时，半导体开关借助于来自高电压发生器的高电压HVDC在电容元件上积累电荷，并产生峰值为 通过在组合信号的电压值超过设定的栅极电压值时从电容元件放电的电荷，产生高压HVDC。
-
公开(公告)号：US09166838B1
公开(公告)日：2015-10-20
申请号：US14489814
申请日：2014-09-18
申请人： Rambus Inc.
发明人： Lei Luo , Barry W. Daly , Kambiz Kaviani , John Cronan Eble, III , John Wilson
CPC分类号： H03K3/013 , G11C5/147 , G11C29/021 , G11C29/022 , G11C29/028 , H04L25/0296 , H04L25/06 , H04L25/08
摘要： A signal on a transmitter tracks noise on a ground node in a manner decoupled from a positive node of a power supply. The signal is transmitted from the transmitter to the receiver. A reference voltage is generated on the receiver to track noise on a ground node in the receiver. Consequently, the received signal and the reference voltage have substantially the same noise characteristics, which become common mode noise that can be cancelled out when these two signals are compared against each other. In a further embodiment, the reference voltage is compared against a predetermined calibration pattern. An error signal is generated based on a difference between the sampler output and the predetermined calibration pattern. The error signal is then used to adjust the reference voltage so that the DC level of the reference voltage is positioned substantially in the middle of the received signal.
摘要翻译： 发射机上的信号以与电源的正节点分离的方式跟踪接地节点上的噪声。 信号从发射机发射到接收机。 在接收机上产生参考电压以跟踪接收机中接地节点上的噪声。 因此，接收信号和参考电压具有基本上相同的噪声特性，这些噪声特性成为当这两个信号彼此进行比较时可以消除的共模噪声。 在另一实施例中，将参考电压与预定校准图案进行比较。 基于采样器输出和预定校准图案之间的差异产生误差信号。 然后使用误差信号来调整参考电压，使得参考电压的直流电平基本上位于接收信号的中间。
-
公开(公告)号：US20150256158A1
公开(公告)日：2015-09-10
申请号：US14478315
申请日：2014-09-05
发明人： Yuui SHIMIZU
IPC分类号： H03K3/013 , H01L27/092 , H01L29/423 , H01L27/06
CPC分类号： H01L29/42372 , H03K19/018571
摘要： According to one embodiment, a semiconductor integrated device includes a first node that receives a first voltage, a second node that receives a second voltage, and an electrode. A PMOS transistor is coupled between the first node and the electrode. An NMOS transistor is coupled between the second node and the electrode. A control signal at a voltage lower than the second voltage is supplied to a gate electrode of the PMOS transistor. A control signal at a voltage higher than the first voltage is supplied to a gate electrode of the NMOS transistor.
摘要翻译： 根据一个实施例，半导体集成器件包括接收第一电压的第一节点，接收第二电压的第二节点和电极。 PMOS晶体管耦合在第一节点和电极之间。 NMOS晶体管耦合在第二节点和电极之间。 将低于第二电压的电压的控制信号提供给PMOS晶体管的栅电极。 将高于第一电压的电压的控制信号提供给NMOS晶体管的栅电极。
-
公开(公告)号：US20150214931A1
公开(公告)日：2015-07-30
申请号：US14461933
申请日：2014-08-18
发明人： Hyun Jin YOO , Hyun Hwan YOO , Yoo Hwan KIM , Jong Myeong KIM , Dae Seok JANG , Yoo Sam NA
CPC分类号： H04L12/50 , H03K17/102 , H03K17/693 , H03K2017/066 , H04L12/10
摘要： A radio frequency (RF) switching circuit may include: a first switching circuit unit connected between a first signal port for signal transmission and reception and a common connection node connected to an antenna port and operated according to a first gate signal; a second switching circuit unit connected between a second signal port for signal transmission and reception and the common connection node and operated according to a second gate signal; a negative voltage generating unit generating a negative voltage using a voltage of an RF signal from the common connection node; and a gate signal generating unit generating the first and second gate signals using the negative voltage from the negative voltage generating unit and an operating voltage.
摘要翻译： 射频（RF）切换电路可以包括：第一切换电路单元，连接在用于信号发送和接收的第一信号端口和连接到天线端口并且根据第一门信号操作的公共连接节点; 第二切换电路单元，连接在用于信号发送和接收的第二信号端口和公共连接节点之间，并根据第二门控信号进行操作; 负电压产生单元，使用来自公共连接节点的RF信号的电压产生负电压; 以及栅极信号生成单元，使用来自所述负电压生成单元的负电压和工作电压来生成所述第一和第二栅极信号。
-
公开(公告)号：US20150188523A1
公开(公告)日：2015-07-02
申请号：US14261943
申请日：2014-04-25
发明人： Lakhdar Iguelmamene
IPC分类号： H03K3/3565 , H03K3/012 , H03K3/013
CPC分类号： H03K3/3565 , H03K3/012 , H03K3/013 , H03K5/1252
摘要： An integrated circuit (“IC”) includes an input receiver with multiple hysteresis levels. An exemplary input receiver may be an input buffer with a Schmitt trigger that has multiple hysteresis windows between different high and low input voltages. This circuit may improve the input noise immunity of the external input signals and timing by allowing for a selection one of the plurality of levels depending on parameters of the input (e.g. noise level).
摘要翻译： 集成电路（“IC”）包括具有多个滞后电平的输入接收器。 示例性输入接收器可以是具有施密特特触发器的输入缓冲器，该施密特触发器在不同的高输入电压和低输入电压之间具有多个滞后窗口。 该电路可以通过根据输入的参数（例如噪声电平）允许选择多个电平中的一个来提高外部输入信号的输入噪声抗扰度和定时。
-
47.发明申请公开(公告)号：US20150115946A1
公开(公告)日：2015-04-30
申请号：US14065798
申请日：2013-10-29
CPC分类号： H03K5/007 , G01R33/0029 , G01R33/02 , H03K3/012 , H03K3/013 , H03K3/0377 , H03K5/2481 , H03K17/95 , H03K17/9512 , H03K19/21
摘要： An omnipolar magnetic sensor system includes an input stage and a behavior component. The input stage is configured to receive a source signal and to selectively chop the source signal. Further, the input stage is configured to balance the source signal using behavior parameters and generate a balanced source signal.
摘要翻译： 全极性磁传感器系统包括输入级和行为元件。 输入级被配置为接收源信号并选择性地切断源信号。 此外，输入级被配置为使用行为参数平衡源信号并产生平衡源信号。
-
公开(公告)号：US09018997B2
公开(公告)日：2015-04-28
申请号：US14135058
申请日：2013-12-19
申请人： SK Hynix Inc.
发明人： Bo-Yeun Kim
CPC分类号： H03K3/013 , H03K3/012 , H03K19/00346
摘要： A semiconductor device includes conducting lines of a first group and a second group arranged in parallel, a plurality of first internal elements respectively coupled to the conducting lines of the first group and the second group and a plurality of first contact pads arranged between and along the conducting lines of the first group and the second groups, wherein at least a part of the plurality of first contact pads are respectively coupled to control terminals of the plurality of first internal elements, and the part of the plurality of first internal elements receive a plurality of first control signals through corresponding control terminals, respectively.
摘要翻译： 半导体器件包括并联布置的第一组和第二组的导线，分别耦合到第一组和第二组的导电线的多个第一内部元件和布置在第一组和第二组之间的多个第一接触垫 所述第一组和所述第二组的导线，其中所述多个第一接触焊盘的至少一部分分别耦合到所述多个第一内部元件的控制端子，并且所述多个第一内部元件的所述部分接收多个 的第一控制信号分别通过相应的控制端子。
-
公开(公告)号：US20150102855A1
公开(公告)日：2015-04-16
申请号：US14517824
申请日：2014-10-18
发明人： Yoshio Tasaki
CPC分类号： H03K3/013 , H01L2924/0002 , H02M1/14 , H02M3/07 , Y10T307/50 , Y10T307/747 , H01L2924/00
摘要： There is provided a semiconductor device in which an influence of a power source noise is suppressed and the number of pins and the area of the semiconductor device are reduced. A power source line for a first internal circuit and a power source line for a second internal circuit are coupled to a common pin terminal. A ground line for the first internal circuit and a ground line for the second internal circuit are coupled to another common pin terminal. A power source noise generated on the power source line for the first internal circuit during an operation of the first internal circuit is absorbed by a P-channel MOS transistor and a capacitor. A power source noise generated on the ground line is absorbed by an N-channel MOS transistor and the capacitor.
摘要翻译： 提供了一种半导体器件，其中抑制了电源噪声的影响，并且减少了引脚数量和半导体器件的面积。 用于第一内部电路的电源线和用于第二内部电路的电源线耦合到公共引脚端子。 用于第一内部电路的接地线和用于第二内部电路的接地线耦合到另一个公共引脚端子。 在第一内部电路的操作期间，用于第一内部电路的电源线上产生的电源噪声被P沟道MOS晶体管和电容器吸收。 在地线上产生的电源噪声被N沟道MOS晶体管和电容器吸收。
-
公开(公告)号：US20150035565A1
公开(公告)日：2015-02-05
申请号：US14322108
申请日：2014-07-02
申请人： DENSO CORPORATION
发明人： Takahisa KOYASU
CPC分类号： H04L25/0272 , H03K5/1252 , H03K5/2418 , H04L12/40 , H04L12/40006 , H04L2012/40234
摘要： A communication circuit apparatus includes: multiple level shift circuits, each of which receives an input signal corresponding to a respective communication bus; an activation comparator for generating an activation signal when the input signal is input into one of the level shift circuits, and a level of the input signal exceeds a predetermined threshold; multiple input current voltage conversion circuits, each of which is arranged together with a respective level shift circuit, converts the input signal to a voltage signal, and outputs the voltage signal as an identification signal; and an identification circuit for identifying one of the communication busses based on the identification signal, which is output from one of the input current voltage conversion circuits. The one of the communication busses corresponds to the one of the level shift circuits, in which the input signal is input.
摘要翻译： 通信电路装置包括：多个电平移位电路，每个电平移位电路接收对应于各个通信总线的输入信号; 激活比较器，用于当所述输入信号被输入到所述电平移位电路之一时产生激活信号，并且所述输入信号的电平超过预定阈值; 多个输入电流电压转换电路，各自与各个电平移位电路一起布置，将输入信号转换为电压信号，并输出电压信号作为识别信号; 以及识别电路，用于基于从一个输入电流电压转换电路输出的识别信号来识别通信总线中的一个。 通信总线中的一个对应于输入信号被输入的电平移位电路之一。
-
-
-
-
-
-
-
-
-
搜索结果
651 条记录 (耗时 0.023 秒)
