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公开(公告)号：US20220368320A1
公开(公告)日：2022-11-17
申请号：US17516730
申请日：2021-11-02
发明人： Yi-Chen LU , Hsu-Chi LI , Yi-Jan CHEN , Boy-Yiing JAW , Chin-Tang CHUANG , Chung-Hung CHEN
IPC分类号： H03K5/02 , H03K19/0175
摘要： The disclosure provides a voltage adjust circuit. The voltage adjust circuit includes a buffer circuit, a bias circuit, a level shifter and a cross voltage limit circuit. The buffer circuit includes a plurality of pull-up transistors and a plurality of pull-down transistors. The pull-up transistors coupled in series between an output terminal of the circuit and a high voltage system terminal. The pull-down transistors coupled in series between the output terminal and a low voltage system terminal. The cross voltage limit circuit is configured to limit transient and static bias voltages across two terminals of the pull-up transistors or the pull-down transistors.
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公开(公告)号：US11502688B2
公开(公告)日：2022-11-15
申请号：US17289757
申请日：2019-03-29
发明人： Zhiyuan Deng , Chaoyang Zou
IPC分类号： H03K19/0175 , H03K19/14 , H03K5/01
摘要： The invention relates to a signal isolation and conversion circuit and a control apparatus. The signal isolation and conversion circuit comprises a pulse signal generating circuit and an optical coupling complementary isolation circuit connected with the pulse signal generating circuit; the pulse signal generating circuit is used for receiving an input signal and converting the input signal into a pulse signal; the optical coupling complementary isolation circuit comprises at least two photocouplers, and the at least two photocouplers are switched on or off according to the pulse signal so as to transmit the pulse signal to the output end of the signal isolation and conversion circuit. By arranging the optical coupling complementary isolation circuit, the problems of transmission delay, transmission signal distortion and light attenuation and temperature drift of the light-emitting diode in the optocoupler are effectively solved, the timeliness of isolation signal transmission is improved.
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公开(公告)号：US20220352892A1
公开(公告)日：2022-11-03
申请号：US17658395
申请日：2022-04-07
申请人： NXP USA, Inc.
发明人： YangTao Cheng , Kai Zhu
IPC分类号： H03K19/0175 , H04L25/02
摘要： In an optocoupler circuit, a first direction path, which transmits signals from a first to a second terminal, includes a first level shifter, a second level shifter, and a first optocoupler. The first level shifter receives a first input signal at the first terminal, and shifts a voltage level of the first input signal to a first shifted voltage level with respect to a first ground level in a first power domain, to provide a first shifted signal. The first optocoupler receives the first shifted signal, and generates a first optocoupler signal in response to the first shifted signal. The second level shifter receives the first optocoupler signal, and shifts a voltage level of the first optocoupler signal to a second shifted voltage level with respect to a second ground level in a second power domain, to provide a second shifted signal at the second terminal.
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44.发明申请公开(公告)号：US20220345131A1
公开(公告)日：2022-10-27
申请号：US17745435
申请日：2022-05-16
申请人： Rambus Inc.
发明人： Kyung Suk Oh , Ian P. Shaeffer
IPC分类号： H03K19/00 , G06F13/40 , G11C11/4093 , H03K19/0175 , G11C11/401 , G11C11/419 , G11C16/26 , G11C11/41 , G11C11/4063 , G11C11/413 , G11C11/417 , G11C16/06 , G11C16/32 , G06F3/06
摘要： In an integrated circuit component having a command interface to receive commands, a data interface to receive write data during a write-data reception interval, and first and second registers, control circuitry within the integrated circuit component responds to one or more of the commands by storing within the first register and the second register, respectively, a first control value that specifies a first termination to be applied to the data interface during the write-data reception interval, and a second control value that specifies a second termination to be applied to the data interface after the write-data reception interval transpires.
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公开(公告)号：US20220337247A1
公开(公告)日：2022-10-20
申请号：US17641115
申请日：2020-07-14
发明人： Manfred Huber
IPC分类号： H03K19/0175 , H03K19/0185
摘要： A device for synchronous serial data transmission over a differential data channel and a differential clock channel includes an interface controller having a clock generator, data controller, clock transmitter block and data receiver block. The clock generator generates a transmit clock signal which, during a data transmission cycle, includes a clock pulse train having a period. The clock generator is suitably configured such that, for data transmission cycles in a dynamic operating state in which a maximum occurring differential voltage of a differential clock signal is lower than a maximum differential voltage of the clock transmitter block, the clock generator sets a duration of a first clock phase of a first clock period of the clock pulse train to be longer than a first clock phase of following clock periods and shorter than a time duration required to reach the maximum differential voltage.
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公开(公告)号：US11476853B2
公开(公告)日：2022-10-18
申请号：US17291745
申请日：2019-11-06
IPC分类号： H03K19/0185 , G06F1/26 , H03K19/00 , H03K19/0175 , H03K19/0948
摘要： A level shift circuit includes an input section to which input signal of a first power supply system is input, a supply section that includes a pair of nodes, and a regulator. The supply section is connected to one of a pair of power supply lines serving as a second power supply system of which a voltage level is higher than a voltage level of the first power supply system, the supply section supplying a potential of the one of the pair of power supply lines to one of the pair of nodes according to the input signal. The regulator is connected to another of the pair of power supply lines, the regulator regulating current flowing between the one of the pair of nodes that is supplied with the potential of the one of the pair of power supply lines, and the other of the pair of power supply lines.
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公开(公告)号：US20220286154A1
公开(公告)日：2022-09-08
申请号：US17826469
申请日：2022-05-27
摘要： A method for measuring a received signal includes receiving a differential pair of signals by a differential pair of input nodes of a differential circuit. The method includes attempting to match a first current through a first node of the differential circuit corresponding to the differential pair of signals to a second current through a second node of the differential circuit corresponding to a feedback signal. The method includes generating an output measurement signal based on the first current and the second current. The output measurement signal has a level corresponding to an average amplitude of the differential pair of signals.
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公开(公告)号：US11437996B2
公开(公告)日：2022-09-06
申请号：US17408614
申请日：2021-08-23
发明人： WeiBing Shang , Sungsoo Chi , Ying Wang
IPC分类号： H03K19/0185 , H03K19/0175
摘要： The present disclosure relates to a dynamic control conversion circuit, which includes: a dynamic control unit configured to generate a dynamic control signal according to a received input signal; a first semiconductor switch, a control terminal of the first semiconductor switch is connected with a first signal output terminal of the dynamic control unit, and a first terminal of the first semiconductor switch is connected with a first voltage terminal; a second semiconductor switch, a control terminal of the second semiconductor switch is connected with a second signal output terminal of the dynamic control unit; and a circuit output unit having a first control terminal connected with a second terminal of the first semiconductor switch and a first terminal of the second semiconductor switch, and a second control terminal connected with a second terminal of the second semiconductor switch and a third signal output terminal of the dynamic control unit.
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公开(公告)号：US11431243B2
公开(公告)日：2022-08-30
申请号：US16804348
申请日：2020-02-28
发明人： Randall Sandusky , Neaz Farooqi
IPC分类号： H02M3/07 , H02M1/00 , H02M1/36 , H03K19/20 , H03K19/0175
摘要： A system may include a pre-charge stage and a voltage converter. The pre-charge stage may include a controller circuit configured to generate a control voltage and a current regulator electrically coupled to the controller circuit and configured to generate a first voltage, a second voltage, and a third voltage. The voltage converter may include a capacitor, a hold capacitor, and switches. The capacitor may include a first plate and a voltage on the first plate may be equal to the first voltage. The capacitor may include a second plate and a voltage on the second plate may be equal to the second voltage. The hold capacitor may include a plate and a voltage on the plate may be equal to the third voltage. The current regulator may be configured to regulate a current on the switches during accumulation of an initial charge on the capacitor and the hold capacitor.
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公开(公告)号：US11411559B2
公开(公告)日：2022-08-09
申请号：US17052737
申请日：2018-08-06
申请人： Intel Corporation
IPC分类号： H03K19/0175 , G06F1/10 , H03K17/687
摘要： Networks, methods, and circuitries are provided that propagate an actuator signal to a plurality of devices in a respective plurality of voltage domains. The network includes a first signal path disposed between an actuator signal source and a first device. The first signal path includes a first point at which the actuator signal is in a first voltage domain. A second signal path is disposed between the actuator signal source and a second device. The second signal path includes a second point at which the actuator signal is in a second voltage domain. The first voltage domain is different from, and has a fixed relationship to, the second voltage domain. A multi-domain coupling circuitry is connected to the first point and the second point. The multi-domain coupling circuitry is configured to maintain the fixed relationship between the actuator signal at the first point and the second point.
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