Partial Pixel Oversampling for High Dynamic Range Imaging

    公开(公告)号:US20250024170A1

    公开(公告)日:2025-01-16

    申请号:US18353085

    申请日:2023-07-16

    Applicant: APPLE INC.

    Abstract: An imaging device includes a pixel-circuit and a readout circuit. The pixel-circuit includes a photodetector. The readout circuit is configured to perform a series of iterations, each iteration including (i) accumulating an electrical charge in the photodetector during an integration time, (ii) transferring a portion of the electrical charge accumulated in the photodetector to a floating diffusion, the portion being less than all the electrical charge accumulated in the photodetector, and (iii) coupling a voltage of the floating diffusion to a storage capacitance, to subsequently, in a final iteration, transfer a remaining electrical charge from the photodetector, and to derive an output digital value, indicative of a total energy of the light incident on the photodetector over the series of iterations and the final iteration, from the voltage on the storage capacitance and from the remaining electrical charge transferred in the final iteration.

    METHOD FOR TRACKING REFERENCE SIGNAL (TRS) ENHANCEMENT

    公开(公告)号:US20250023685A1

    公开(公告)日:2025-01-16

    申请号:US18902231

    申请日:2024-09-30

    Applicant: Apple Inc.

    Abstract: Some embodiments include an apparatus, method, and computer program product for tracking reference signal (TRS) support of high speed use cases of 5G communications in a single frequency network (SFN), where a user equipment (UE) can measure a Doppler offset of a combined signal from two or more transmission reception points (TRPs) of the 5G communications system. A 5G node B (gNB) node can transmit a periodic, semi-persistent (SP), or aperiodic TRS with high measurement density that the UE uses to measure a Doppler offset of a combined signal. For example, the gNB can: trigger the aperiodic TRS based on a downlink assignment; and/or use lower layer signaling to arrange to transmit a semi-persistent TRS or a periodic TRS with a reduced periodicity. In some embodiments, the gNB can measure the Doppler offset based on an uplink signal, and transmit a TRS based on a pre-compensated Doppler frequency.

    Sharing Branch Predictor Resource for Instruction Cache and Trace Cache Predictions

    公开(公告)号:US20250021337A1

    公开(公告)日:2025-01-16

    申请号:US18352351

    申请日:2023-07-14

    Applicant: Apple Inc.

    Abstract: Disclosed techniques relate to branch prediction and trace caching. A processor may include both an instruction cache and a trace cache configured to store instructions. A branch predictor may include one or more prediction tables (e.g., tagged geometric length (TAGE) tables) configured to predict directions of conditional control transfer instructions. Rather than including a separate branch predictor for branches in the trace cache, the processor may share the prediction table(s) for instruction cache and trace cache predictions. In particular, the processor may include an additional trace prediction lane configured to access the prediction table to predict a direction of a final control transfer instruction in a trace cached by the trace cache circuitry. This may advantageously provide accurate predictions with limited impacts to circuit area and power consumption, e.g., relative to a separate predictor for the trace cache.

    Trace Cache Techniques Based on Biased Control Transfer Instructions

    公开(公告)号:US20250021332A1

    公开(公告)日:2025-01-16

    申请号:US18352309

    申请日:2023-07-14

    Applicant: Apple Inc.

    Abstract: Disclosed techniques relate to trace cache circuitry configured to identify and cache traces that satisfy certain criteria. Prediction circuitry may track directions of executed control transfer instructions, including a first category of control transfer instructions that meet a first threshold bias level toward a given direction (which may be referred to as “stable”) and a second category of control transfer instructions that do not meet the first threshold bias level (which may be referred to as “unstable”). Trace cache circuitry may identify traces of instructions that satisfy a set of criteria, including: only control transfer instructions of the first category are allowed as internal control transfer instructions and a control transfer instruction in the second category is allowed only at an end of a given trace. Disclosed techniques may advantageously provide performance and power advantages of trace caching with reduced complexity, relative to certain traditional trace caches.

    Voltage Regulator with Voltage Rail Switching

    公开(公告)号:US20250021121A1

    公开(公告)日:2025-01-16

    申请号:US18349792

    申请日:2023-07-10

    Applicant: Apple Inc.

    Abstract: Voltage regulator circuitry is provided that includes a pass transistor, an error amplifier for regulating the pass transistor, a high rail switch coupled between a first power supply line and the pass transistor, a big low rail switch coupled between a second power supply line and the pass transistor, a small low rail switch coupled between the second power supply line and the pass transistor, and a comparator for monitor a current flowing through or a voltage across the small low rail switch. The small low rail switch, the comparator, and a gating logic can be coupled in an analog feedback loop. The voltage regulator circuitry can include a sequencer for controlling the high rail switch, the big low rail switch, and the gating logic to perform fast seamless transitions between a low voltage rail mode and a high voltage rail mode without incurring large current glitches.

    Electronic Device Displays with Lenses and Color Filters

    公开(公告)号:US20250020941A1

    公开(公告)日:2025-01-16

    申请号:US18737653

    申请日:2024-06-07

    Applicant: Apple Inc.

    Abstract: An electronic device may include a stereoscopic display that is configured to display three-dimensional content for a viewer. The stereoscopic display may include a lenticular lens film with lenticular lenses that extend across the length of the display and may be referred to as a lenticular display. The lenticular display may have convex curvature. The lenticular display may include a color filter layer with color filters and an opaque masking layer. The color filter layer may be interposed between the lenticular lens film and an array of display pixels for the display. The color filter layer may mitigate ghost image artifacts and reflections of ambient light. Microlenses may be included between the lenticular lens film and the array of display pixels to improve the efficiency of the display. The display may include a Fresnel lens layer. The lenticular lens film may include lenticular lenses having different shapes.

    Head-Mounted Electronic Device
    510.
    发明申请

    公开(公告)号:US20250020937A1

    公开(公告)日:2025-01-16

    申请号:US18903931

    申请日:2024-10-01

    Applicant: Apple Inc.

    Abstract: A head-mounted device may have a head-mounted housing. The housing may include a chassis with left and right openings that overlap respective left and right optical modules that present images eye boxes. Each optical module may have a lens and display that presents an image through the lens. The chassis may have an inner frame and outer frame. A middle portion of the chassis may form a stiffened nose bridge structure. Components in the housing such as a display, a fan housing, a heat sink layer, optical module guide rods, and a rear cover may span the width of the housing and may be attached to edge portions of the chassis, thereby forming a box-shaped structure that provides rigidity and helps prevent housing deformation.

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