Interrupt handling in a virtual machine environment
    581.
    发明授权
    Interrupt handling in a virtual machine environment 有权
    虚拟机环境中的中断处理

    公开(公告)号:US08949498B2

    公开(公告)日:2015-02-03

    申请号:US13652493

    申请日:2012-10-16

    Inventor: Michael Kagan

    CPC classification number: G06F9/45558 G06F9/4812 G06F2009/45579

    Abstract: A method for computing includes running a plurality of virtual machines on a computer having one or more cores and a memory. Upon occurrence of an event pertaining to a given virtual machine during a period in which the given virtual machine is unable to receive an interrupt, an interrupt message is written to a pre-assigned interrupt address in the memory. When the given virtual machine is able to receive the interrupt, after writing of the interrupt message, a context of the given virtual machine is copied from the memory to a given core on which the given virtual machine is running, and a hardware interrupt is automatically raised on the given core responsively to the interrupt message in the memory.

    Abstract translation: 一种用于计算的方法包括在具有一个或多个核心和存储器的计算机上运行多个虚拟机。 在给定虚拟机不能接收到中断的期间发生与给定虚拟机有关的事件时,中断消息被写入存储器中预分配的中断地址。 当给定的虚拟机能够接收中断时,在写入中断消息之后,给定虚拟机的上下文从存储器复制到运行给定虚拟机的给定核心,并且硬件中断是自动的 响应于内存中的中断消息,给定核心上升。

    DIRECT MEMORY ACCESS TO STORAGE DEVICES
    582.
    发明申请
    DIRECT MEMORY ACCESS TO STORAGE DEVICES 有权
    直接存储访问存储设备

    公开(公告)号:US20150026368A1

    公开(公告)日:2015-01-22

    申请号:US13943809

    申请日:2013-07-17

    CPC classification number: G06F13/28

    Abstract: An interface device includes a first proxy interface configured to carry out first direct memory access (DMA) transactions initiated by an input/output (I/O) device and a second proxy interface configured to carry out second DMA transactions initiated by a storage drive. A buffer memory is coupled between the first and second proxy interfaces and configured to temporarily hold data transferred in the first and second DMA transactions. Control logic is configured to invoke the second DMA transactions in response to the first DMA transactions so as to cause the data to be transferred via the buffer between the I/O device and the storage drive.

    Abstract translation: 接口设备包括被配置为执行由输入/输出(I / O)设备发起的第一直接存储器访问(DMA)事务的第一代理接口和被配置为执行由存储驱动器发起的第二DMA事务的第二代理接口。 缓冲存储器耦合在第一和第二代理接口之间并被配置为临时保存在第一和第二DMA事务中传送的数据。 控制逻辑被配置为响应于第一DMA事务来调用第二DMA事务,以便使数据通过I / O设备和存储驱动器之间的缓冲器传送。

    POLYMER-BASED INTERCONNECTION BETWEEN SILICON PHOTONICS DEVICES AND OPTICAL FIBERS
    583.
    发明申请
    POLYMER-BASED INTERCONNECTION BETWEEN SILICON PHOTONICS DEVICES AND OPTICAL FIBERS 审中-公开
    硅光电器件与光纤之间的基于聚合物的互连

    公开(公告)号:US20150010268A1

    公开(公告)日:2015-01-08

    申请号:US13935515

    申请日:2013-07-04

    CPC classification number: G02B6/32 G02B6/30

    Abstract: An apparatus includes a Silicon Photonics (SiP) device and a ferrule. The SiP includes multiple optical waveguides. The ferrule includes multiple optical fibers for exchanging optical signals with the respective optical waveguides of the SiP device. In some embodiments, an array of micro-lenses is configured to couple the optical signals between the optical waveguides of the SiP device and the respective optical fibers of the ferrule. In some embodiments, a polymer layer is placed between the SiP device and the ferrule, and includes multiple polymer-based Spot-Size Converters (SSCs) that are configured to couple the optical signals between the optical waveguides of the SiP device and the respective optical fibers of the ferrule.

    Abstract translation: 一种装置包括硅光子学(SiP)器件和套圈。 SiP包括多个光波导。 套圈包括用于与SiP器件的各个光波导交换光信号的多个光纤。 在一些实施例中,微透镜阵列被配置为耦合SiP器件的光波导与套管的相应光纤之间的光信号。 在一些实施例中,聚合物层被放置在SiP器件和套圈之间,并且包括多个基于聚合物的点尺寸转换器(SSC),其被配置为将SiP器件的光波导与相应的光学器件 套管的纤维。

    OFFLOADING NODE CPU IN DISTRIBUTED REDUNDANT STORAGE SYSTEMS
    584.
    发明申请
    OFFLOADING NODE CPU IN DISTRIBUTED REDUNDANT STORAGE SYSTEMS 有权
    在分布式冗余存储系统中卸载节点CPU

    公开(公告)号:US20140379836A1

    公开(公告)日:2014-12-25

    申请号:US13925868

    申请日:2013-06-25

    CPC classification number: G06F11/1076 G06F2211/1028 H04L67/1097

    Abstract: A network interface includes a host interface for communicating with a node, and circuitry which is configured to communicate with one or more other nodes over a communication network so as to carry out, jointly with one or more other nodes, a redundant storage operation that includes a redundancy calculation, including performing the redundancy calculation on behalf of the node.

    Abstract translation: 网络接口包括用于与节点进行通信的主机接口,以及被配置为通过通信网络与一个或多个其他节点进行通信以便与一个或多个其他节点一起执行冗余存储操作的电路,所述冗余存储操作包括 冗余计算,包括代表节点执行冗余计算。

    TRANSCEIVER RECEPTACLE CAGE
    585.
    发明申请
    TRANSCEIVER RECEPTACLE CAGE 有权
    收发器插座

    公开(公告)号:US20140248794A1

    公开(公告)日:2014-09-04

    申请号:US14191550

    申请日:2014-02-27

    Abstract: A connector cage includes a bezel, having a plurality of slots formed therein, and a cage structure including upper and lower sides and multiple partitions extending between the upper and lower sides to define receptacles for receiving cable connectors. Multiple tabs protrude out of at least one of the sides in locations at which the tabs fit into the slots in the bezel, and are folded over the slots so as to secure the cage structure to the bezel. The cage may also include multiple snap-on spring subassemblies, each spring subassembly secured to a front end of a respective partition and comprising leaves that bow outward to contact the shells of the connectors that are inserted into the receptacles adjacent to the partition.

    Abstract translation: 连接器保持架包括:边框,其中形成有多个槽,以及包括上侧和下侧以及在上侧和下侧之间延伸的多个隔板的笼结构,以限定用于接收电缆连接器的插座。 多个翼片从突出部配合到挡板中的槽中的位置中的至少一个侧边突出,并且被折叠在狭槽上,以将保持架结构固定到挡板上。 保持架还可以包括多个卡扣弹簧组件,每个弹簧子组件固定到相应的隔板的前端,并且包括向外弯曲的叶片,以接合插入到隔板附近的插座中的连接器的壳体。

    CREDIT-BASED LOW-LATENCY ARBITRATION WITH DATA TRANSFER
    586.
    发明申请
    CREDIT-BASED LOW-LATENCY ARBITRATION WITH DATA TRANSFER 有权
    基于信用的低数据延迟与数据传输

    公开(公告)号:US20140229645A1

    公开(公告)日:2014-08-14

    申请号:US13763676

    申请日:2013-02-10

    CPC classification number: G06F13/364

    Abstract: An apparatus includes multiple data sources and arbitration circuitry. The data sources are configured to send to a common destination data items and respective arbitration requests, such that the data items are sent to the destination regardless of receiving any indication that the data items were served to the destination in response to the respective arbitration requests. The arbitration circuitry is configured to receive and buffer the data items, to perform arbitration on the buffered data items responsively to the arbitration requests, and to serve the buffered data items to the destination in accordance with the arbitration.

    Abstract translation: 一种装置包括多个数据源和仲裁电路。 数据源被配置为发送到公共目的地数据项和相应的仲裁请求,使得数据项被发送到目的地,而不管接收到响应于各自的仲裁请求将数据项提供给目的地的任何指示。 仲裁电路被配置为接收和缓冲数据项,以响应于仲裁请求对缓冲的数据项执行仲裁,并且根据仲裁将缓冲的数据项服务到目的地。

    SWITCH WITH DUAL-FUNCTION MANAGEMENT PORT
    587.
    发明申请
    SWITCH WITH DUAL-FUNCTION MANAGEMENT PORT 有权
    具有双功能管理端口的开关

    公开(公告)号:US20140211808A1

    公开(公告)日:2014-07-31

    申请号:US13755137

    申请日:2013-01-31

    CPC classification number: H04L41/00 H04L41/046 H04L49/30 H04L49/356 H04L67/26

    Abstract: Communication apparatus includes a switch, which includes switching logic, multiple ports for connection to a network, and a management port, and which is configured to assign both a first link-layer address and a second link-layer address to the management port. A host processor includes a memory and a central processing unit (CPU), which is configured to run software implementing a management agent for managing functions of the switch. A network interface controller (NIC) is connected to the management port and is configured to convey incoming management packets, which are directed by the switch to the first link-layer address, to the CPU for processing by the management agent, and to write directly to the memory data contained in incoming remote direct memory access (RDMA) packets, which are directed by the switch to the second link-layer address.

    Abstract translation: 通信装置包括交换机,其包括交换逻辑,用于连接到网络的多个端口和管理端口,并且被配置为向管理端口分配第一链路层地址和第二链路层地址。 主处理器包括存储器和中央处理单元(CPU),其被配置为运行实现用于管理交换机的功能的管理代理的软件。 网络接口控制器(NIC)连接到管理端口,并被配置为将由交换机引导的传入管理分组传送到第一链路层地址,以供管理代理处理,并直接写入 到由进入的远程直接存储器访问(RDMA)分组中包含的存储器数据,其由交换机指向第二链路层地址。

    ROUTING SUPPORT FOR LOSSLESS DATA TRAFFIC
    588.
    发明申请
    ROUTING SUPPORT FOR LOSSLESS DATA TRAFFIC 有权
    无线数据业务的路由支持

    公开(公告)号:US20140169169A1

    公开(公告)日:2014-06-19

    申请号:US13717733

    申请日:2012-12-18

    CPC classification number: H04L47/2441 H04L45/306 H04L47/32

    Abstract: A method for communication in a packet data network including at least first and second subnets interconnected by routers. The method includes defining at least first and second classes of link-layer traffic within the subnets, such that the link-layer traffic in the first class is transmitted among nodes in the network without loss of packets, while at least some of the packets in the second class are dropped in case of network congestion. The routers are configured by transmitting control traffic over the network in the packets of the second class. Data traffic is transmitted between the nodes in the first and second subnets via the configured routers in the packets of the first class.

    Abstract translation: 一种用于在分组数据网络中进行通信的方法,包括至少由路由器互连的第一和第二子网。 该方法包括在子网内至少定义第一类和第二类链路层业务,使得第一类中的链路层业务在网络中的节点之间传输而不丢失分组,而至少一些分组在 第二类在网络拥塞的情况下被丢弃。 通过在第二类的分组中的网络上发送控制流量来配置路由器。 经由第一类数据包中配置的路由器在第一和第二子网中的节点之间传输数据流量。

    Application-assisted handling of page faults in I/O operations
    589.
    发明申请
    Application-assisted handling of page faults in I/O operations 有权
    I / O操作中页面故障的应用辅助处理

    公开(公告)号:US20140089451A1

    公开(公告)日:2014-03-27

    申请号:US13628155

    申请日:2012-09-27

    CPC classification number: G06F12/08 G06F12/1081

    Abstract: A method for data transfer includes receiving in an operating system of a host computer an instruction initiated by a user application running on the host processor identifying a page of virtual memory of the host computer that is to be used in receiving data in a message that is to be transmitted over a network to the host computer but has not yet been received by the host computer. In response to the instruction, the page is loaded into the memory, and upon receiving the message, the data are written to the loaded page.

    Abstract translation: 一种用于数据传输的方法包括在主计算机的操作系统中接收由主机处理器上运行的用户应用程序发起的指令,该指令标识主计算机的虚拟存储器的页面,该页面将用于在消息中接收数据 通过网络传送到主计算机,但尚未被主计算机接收。 响应该指令,页面被加载到存储器中,并且在接收到消息时,数据被写入加载的页面。

    Look-Ahead Handling of Page Faults in I/O Operations
    590.
    发明申请
    Look-Ahead Handling of Page Faults in I/O Operations 有权
    在I / O操作中预先处理页面错误

    公开(公告)号:US20140089450A1

    公开(公告)日:2014-03-27

    申请号:US13628075

    申请日:2012-09-27

    CPC classification number: G06F3/067 G06F3/061 G06F3/0656 G06F3/0659

    Abstract: A method for data transfer includes receiving in an input/output (I/O) operation a first segment of data to be written to a specified virtual address in a host memory. Upon receiving the first segment of the data, it is detected that a first page that contains the specified virtual address is swapped out of the host memory. At least one second page of the host memory is identified, to which a second segment of the data is expected to be written. Responsively to detecting that the first page is swapped out and to identifying the at least one second page, at least the first and second pages are swapped into the host memory. After swapping at least the first and second pages into the host memory, the data are written to the first and second pages.

    Abstract translation: 一种用于数据传输的方法包括在输入/输出(I / O)操作中接收要写入主机存储器中的指定虚拟地址的第一数据段。 在接收到数据的第一段时,检测到包含指定虚拟地址的第一页被转换出主机存储器。 标识主机存储器的至少一个第二页,期望数据的第二段被写入到其上。 响应于检测到第一页面被换出并且识别至少一个第二页面,至少第一页面和第二页面被交换到主机存储器中。 至少将第一页和第二页交换到主机存储器之后,数据被写入第一页和第二页。

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