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    WAVEFRONT ENCODING WITH PARALLEL BIT STREAM ENCODING
    51.
    发明申请
    WAVEFRONT ENCODING WITH PARALLEL BIT STREAM ENCODING 有权
    WAVEFRONT编码与并行位流编码

    公开(公告)号：US20150091921A1

    公开(公告)日：2015-04-02

    申请号：US14039845

    申请日：2013-09-27

    Applicant: Apple Inc.

    Inventor： Guy Cote ,  Timothy John Millet ,  Joseph J. Cheng ,  Mark P. Rygh ,  Jim C. Chou

    IPC: G06T1/20

    CPC classification number: G06T1/20 ,  G06T1/60 ,  H04N19/176 ,  H04N19/40 ,  H04N19/423 ,  H04N19/436 ,  H04N19/91

    Abstract: In the video encoders described herein, blocks of pixels from a video frame may be encoded (e.g., using CAVLC encoding) in a block processing pipeline using wavefront ordering (e.g., in knight's order). Each of the encoded blocks may be written to a particular one of multiple DMA buffers such that the encoded blocks written to each of the buffers represent consecutive blocks of the video frame in scan order. A transcode pipeline may operate in parallel with (or at least overlapping) the operation of the block processing pipeline. The transcode pipeline may read encoded blocks from the buffers in scan order and merge them into a single bit stream (in scan order). A transcoder core of the transcode pipeline may decode the encoded blocks and encode them using a different encoding process (e.g., CABAC). In some cases, the transcoder may be bypassed.

    Abstract translation: 在本文描述的视频编码器中，来自视频帧的像素块可以使用波前排序（例如骑士顺序）在块处理流水线中进行编码（例如，使用CAVLC编码）。 每个编码块可以被写入多个DMA缓冲器中的特定一个，使得写入每个缓冲器的编码块以扫描顺序表示视频帧的连续块。 代码流水线可以与（或至少重叠）块处理流水线的操作并行操作。 代码流水线可以以扫描顺序从缓冲器读取编码块，并将它们合并成单个位流（按扫描顺序）。 代码转换流水线的代码转换器核心可以解码编码的块，并使用不同的编码过程（例如，CABAC）对它们进行编码。 在某些情况下，代码转换器可能被旁路。

    OPERATING A DEVICE TO CAPTURE HIGH DYNAMIC RANGE IMAGES
    52.
    发明申请
    OPERATING A DEVICE TO CAPTURE HIGH DYNAMIC RANGE IMAGES 审中-公开
    操作一个设备来捕获高动态范围的图像

    公开(公告)号：US20150062382A1

    公开(公告)日：2015-03-05

    申请号：US14537746

    申请日：2014-11-10

    Applicant: Apple Inc.

    Inventor： Guy Cote ,  Garrett M. Johnson ,  James Edmund Orr, IV

    IPC: H04N5/235

    CPC classification number: H04N5/2355 ,  G06T5/50 ,  G06T7/32 ,  G06T2207/10144 ,  G06T2207/10152 ,  G06T2207/20016 ,  G06T2207/20021 ,  G06T2207/20208 ,  H04N5/23216 ,  H04N5/23232 ,  H04N5/23245 ,  H04N5/23254 ,  H04N5/23258 ,  H04N5/2351 ,  H04N5/2352 ,  H04N5/2356 ,  H04N9/07

    Abstract: Some embodiments provide a method of operating a device to capture an image of a high dynamic range (HDR) scene. Upon the device entering an HDR mode, the method captures and stores multiple images at a first image exposure level. Upon receiving a command to capture the HDR scene, the method captures a first image at a second image exposure level. The method selects a second image from the captured plurality of images. The method composites the first and second images to produce a composite image that captures the HDR scene. In some embodiments, the method captures multiple images at multiple different exposure levels.

    Abstract translation: 一些实施例提供了一种操作设备以捕获高动态范围（HDR）场景的图像的方法。 当设备进入HDR模式时，该方法在第一图像曝光级别捕获并存储多个图像。 当接收到捕获HDR场景的命令时，该方法以第二图像曝光级别捕获第一图像。 该方法从所捕获的多个图像中选择第二图像。 该方法合成第一和第二图像以产生捕获HDR场景的合成图像。 在一些实施例中，该方法以多个不同的曝光水平捕获多个图像。

    Systems And Methods For Statistics Collection Using Pixel Mask
    53.
    发明申请
    Systems And Methods For Statistics Collection Using Pixel Mask 审中-公开
    使用像素掩码进行统计收集的系统和方法

    公开(公告)号：US20140133749A1

    公开(公告)日：2014-05-15

    申请号：US13963641

    申请日：2013-08-09

    Applicant: APPLE INC.

    Inventor： David Daming Kuo ,  Guy Cote

    IPC: G06T7/40

    CPC classification number: G06T7/408 ,  H04N5/213

    Abstract: Systems and methods are provided for collecting image statistics using a pixel mask. In one example, statistics collection logic of an image signal processor may include a pixel weighting mask and accumulation logic. The pixel weighting mask may receive a first representation of a pixel that includes a luma and chroma representation of the pixel. The pixel weighting mask may output a pixel weighting using first and second chroma components of the luma and chroma representation of the pixel. The accumulation logic may receive the first or a second representation of the pixel and the pixel weighting value. Using these, the accumulation logic may weight the second representation of the pixel or the first representation of the pixel using the pixel weighting value to obtain a weighted pixel value, adding the weighted pixel value to a statistics count.

    Abstract translation: 提供了使用像素掩码来收集图像统计信息的系统和方法。 在一个示例中，图像信号处理器的统计信息收集逻辑可以包括像素加权掩码和累加逻辑。 像素加权掩模可以接收包括像素的亮度和色度表示的像素的第一表示。 像素加权掩模可以使用像素的亮度和色度表示的第一和第二色度分量来输出像素加权。 累加逻辑可以接收像素的第一或第二表示和像素加权值。 使用这些，累积逻辑可以使用像素加权值来加权像素的第二表示或像素的第一表示，以获得加权像素值，将加权像素值加到统计计数。

    FOVEATED DISPLAY IMAGE ENHANCEMENT SYSTEMS AND METHODS
    54.
    发明申请
    FOVEATED DISPLAY IMAGE ENHANCEMENT SYSTEMS AND METHODS 有权

    公开(公告)号：US20240404009A1

    公开(公告)日：2024-12-05

    申请号：US18326630

    申请日：2023-05-31

    Applicant: Apple Inc.

    Inventor： Yun Gong ,  Jim C. Chou ,  Guy Cote ,  Haiyan He ,  Michael J. Rockwell

    IPC: G06T5/20 ,  G06F3/01 ,  G06T5/50 ,  G06T7/13 ,  G06T11/00 ,  G09G3/20

    Abstract: A system may include a display for displaying an image frame that is divided into regions having respective resolutions based on display image data. The system may also include image processing circuitry to generate the display image data based on multi-resolution image data of the image frame. Generating the display image data may include determining an enhancement to be applied to a portion of the multi-resolution image data and adjusting the determined enhancement to be applied to the portion of the multi-resolution image data based on boundary data associated with locations of boundaries between the regions.

    Raw Scaler With Chromatic Aberration Correction
    57.
    发明申请
    Raw Scaler With Chromatic Aberration Correction 审中-公开

    公开(公告)号：US20200351460A1

    公开(公告)日：2020-11-05

    申请号：US16907583

    申请日：2020-06-22

    Applicant: Apple Inc.

    Inventor： Guy Cote ,  Simon Wolfenden Butler ,  Joseph Anthony Petolino, JR. ,  Joseph P. Bratt

    IPC: H04N5/367 ,  H04N9/04 ,  H04N9/64 ,  H04N5/232 ,  H04N5/365 ,  H04N1/60 ,  G06T5/00 ,  H04N9/77

    Abstract: Systems and methods for down-scaling are provided. In one example, a method for processing image data includes determining a plurality of output pixel locations using a position value stored by a position register, using the current position value to select a center input pixel from the image data and selecting an index value, selecting a set of input pixels adjacent to the center input pixel, selecting a set of filtering coefficients from a filter coefficient lookup table using the index value, filtering the set of source input pixels to apply a respective one of the set of filtering coefficients to each of the set of source input pixels to determine an output value for the current output pixel at the current position value, and correcting chromatic aberrations in the set of source input pixels.

    Timestamp based display update mechanism
    58.
    发明授权
    Timestamp based display update mechanism 有权

    公开(公告)号：US10706825B2

    公开(公告)日：2020-07-07

    申请号：US14869148

    申请日：2015-09-29

    Applicant: Apple Inc.

    Inventor： Brijesh Tripathi ,  Arthur L. Spence ,  Joshua P. de Cesare ,  Ilie Garbacea ,  Guy Cote ,  Mahesh B. Chappalli ,  Malcolm D. Gray ,  Christopher P. Tann

    IPC: G09G5/39 ,  G09G5/395 ,  G06F3/14 ,  G06F3/147

    Abstract: Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.

    Video encoder with context switching
    60.
    发明授权
    Video encoder with context switching 有权

    公开(公告)号：US10313683B2

    公开(公告)日：2019-06-04

    申请号：US14474114

    申请日：2014-08-30

    Applicant: Apple Inc.

    Inventor： Joseph J. Cheng ,  Timothy J. Millet ,  Shun Wai Go ,  Guy Cote

    IPC: H04N19/172 ,  H04N19/176 ,  H04N19/46 ,  G06F9/46 ,  G06F9/48 ,  H04N19/129 ,  H04N19/127 ,  H04N19/174 ,  H04N19/42 ,  H04N19/40 ,  H04N19/182

    Abstract: A context switching method for video encoders that enables higher priority video streams to interrupt lower priority video streams. A high priority frame may be received for processing while another frame is being processed. The pipeline may be signaled to perform a context stop for the current frame. The pipeline stops processing the current frame at an appropriate place, and propagates the stop through the stages of the pipeline and to a transcoder through DMA. The stopping location is recorded. The video encoder may then process the higher-priority frame. When done, a context restart is performed and the pipeline resumes processing the lower-priority frame beginning at the recorded location. The transcoder may process data for the interrupted frame while the higher-priority frame is being processed in the pipeline, and similarly the pipeline may begin processing the lower-priority frame after the context restart while the transcoder completes processing the higher-priority frame.

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