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公开(公告)号：US20210056927A1
公开(公告)日：2021-02-25
申请号：US16545955
申请日：2019-08-20
Applicant: Apple Inc.
Inventor： Peter F. Holland , Malcolm D. Gray , Mahesh B. Chappalli
Abstract: A method for operating a display pipe having a first bit depth and implemented in an electronic device may include determining a second bit depth of a display. The method may also include compressing first image data to the second bit depth, where the first image data corresponds to a first image to be presented via the display. The method may also include including buffer data with the first image data to generate processed image data and outputting the processed image data as output image data to cause presentation of the first image.
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公开(公告)号：US10706825B2
公开(公告)日：2020-07-07
申请号：US14869148
申请日：2015-09-29
Applicant: Apple Inc.
Inventor： Brijesh Tripathi , Arthur L. Spence , Joshua P. de Cesare , Ilie Garbacea , Guy Cote , Mahesh B. Chappalli , Malcolm D. Gray , Christopher P. Tann
Abstract: Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.
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公开(公告)号：US20170092236A1
公开(公告)日：2017-03-30
申请号：US14869148
申请日：2015-09-29
Applicant: Apple Inc.
Inventor： Brijesh Tripathi , Arthur L. Spence , Joshua P. de Cesare , Ilie Garbacea , Guy Cote , Mahesh B. Chappalli , Malcolm D. Gray
IPC: G09G5/395
CPC classification number: G09G5/395 , G06F3/1407 , G06F3/147 , G09G2310/08 , G09G2340/0407 , G09G2340/0464 , G09G2360/127
Abstract: Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.
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公开(公告)号：US11211036B2
公开(公告)日：2021-12-28
申请号：US16919495
申请日：2020-07-02
Applicant: Apple Inc.
Inventor： Brijesh Tripathi , Arthur L. Spence , Joshua P. de Cesare , Ilie Garbacea , Guy Cote , Mahesh B. Chappalli , Malcolm D. Gray , Christopher P. Tann
Abstract: Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.
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Patent Agency Ranking
公开(公告)号：US20200064902A1
公开(公告)日：2020-02-27
申请号：US16110953
申请日：2018-08-23
Applicant: Apple Inc.
Inventor： Peter F. Holland , Christopher P. Tann , Malcolm D. Gray , Hari Ganesh R. Thirunageswaram , Kristan Jon Monsen
Abstract: The configuration buffer may be divided into partitions that may effectively function as multiple linked configuration buffers. The linked partitions may each be associated with a portion of the display pipeline (e.g., an image process block) and may each be responsible for loading configuration entries into the programmable register(s) of a portion of the display pipeline. In this manner, the partitions may load the associated programmable register(s) of the display pipeline substantially simultaneously, reducing the time used to configure the entire display pipeline. Since configuration of the display pipeline may occur during the blanking period, a reduction in display pipeline configuration time may reduce the blanking period and increase the time for driving pixels of the display, thereby improving perceived image quality (e.g., pixel yield of the display panel).
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公开(公告)号：US10983583B2
公开(公告)日：2021-04-20
申请号：US16110953
申请日：2018-08-23
Applicant: Apple Inc.
Inventor： Peter F. Holland , Christopher P. Tann , Malcolm D. Gray , Hari Ganesh R. Thirunageswaram , Kristan Jon Monsen
IPC: G09G5/36 , G06F1/32 , G06T1/60 , G09G5/00 , G06F1/3234 , G06F1/3296 , G06T15/00 , G06T1/20
Abstract: The configuration buffer may be divided into partitions that may effectively function as multiple linked configuration buffers. The linked partitions may each be associated with a portion of the display pipeline (e.g., an image process block) and may each be responsible for loading configuration entries into the programmable register(s) of a portion of the display pipeline. In this manner, the partitions may load the associated programmable register(s) of the display pipeline substantially simultaneously, reducing the time used to configure the entire display pipeline. Since configuration of the display pipeline may occur during the blanking period, a reduction in display pipeline configuration time may reduce the blanking period and increase the time for driving pixels of the display, thereby improving perceived image quality (e.g., pixel yield of the display panel).
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公开(公告)号：US10937385B1
公开(公告)日：2021-03-02
申请号：US16545955
申请日：2019-08-20
Applicant: Apple Inc.
Inventor： Peter F. Holland , Malcolm D. Gray , Mahesh B. Chappalli
Abstract: A method for operating a display pipe having a first bit depth and implemented in an electronic device may include determining a second bit depth of a display. The method may also include compressing first image data to the second bit depth, where the first image data corresponds to a first image to be presented via the display. The method may also include including buffer data with the first image data to generate processed image data and outputting the processed image data as output image data to cause presentation of the first image.
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公开(公告)号：US10261632B2
公开(公告)日：2019-04-16
申请号：US15655560
申请日：2017-07-20
Applicant: Apple Inc.
Inventor： Peter F. Holland , Christopher P. Tann , Malcolm D. Gray
Abstract: One embodiment describes an electronic display that includes display driver circuitry that displays at least a first image frame and a second image frame on the electronic device using a first display pixel and a second display pixel. A timing controller of the electronic display determines at least a first insertion time for a first intra-frame pause for the first image frame and a second insertion time for a second intra-frame pause for the second image frame, which pause rendering of image data to allow the touch sensing circuitry to detect user interaction. The insertion times for the first and second intra-frame pauses are varied from one another by a determined step size.
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公开(公告)号：US20180081491A1
公开(公告)日：2018-03-22
申请号：US15655560
申请日：2017-07-20
Applicant: Apple Inc.
Inventor： Peter F. Holland , Christopher P. Tann , Malcolm D. Gray
CPC classification number: G06F3/0418 , G06F3/0416 , G09G3/2011 , G09G3/3648 , G09G5/12 , G09G5/363 , G09G2310/08 , G09G2320/0233 , G09G2354/00 , G09G2360/12
Abstract: One embodiment describes an electronic display that includes display driver circuitry that displays at least a first image frame and a second image frame on the electronic device using a first display pixel and a second display pixel. A timing controller of the electronic display determines at least a first insertion time for a first intra-frame pause for the first image frame and a second insertion time for a second intra-frame pause for the second image frame, which pause rendering of image data to allow the touch sensing circuitry to detect user interaction. The insertion times for the first and second intra-frame pauses are varied from one another by a determined step size.
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