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    SEMICONDUCTOR WITH A DYNAMIC GATE-DRAIN CAPACITANCE
    51.
    发明申请
    SEMICONDUCTOR WITH A DYNAMIC GATE-DRAIN CAPACITANCE 有权
    具有动态栅极电容的半导体

    公开(公告)号：US20110244646A1

    公开(公告)日：2011-10-06

    申请号：US13161050

    申请日：2011-06-15

    申请人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    发明人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    IPC分类号： H01L21/336

    CPC分类号： H01L27/0808 ,  H01L21/26513 ,  H01L27/0811 ,  H01L27/088 ,  H01L29/7836

    摘要： A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a field effect transistor structure including a source region, a first body region, a drain region, a gate electrode structure and a gate insulating layer. The gate insulating layer is arranged between the gate electrode structure and the body region. The gate electrode structure and the drain region partially form a capacitor structure including a gate-drain capacitance configured to dynamically change with varying reverse voltages applied between the source and drain regions. The gate-drain capacitance includes at least one local maximum at a given threshold or a plateau-like course at given reverse voltage.

    摘要翻译： 具有动态栅极漏极电容的半导体器件。 一个实施例提供一种半导体器件。 该器件包括半导体衬底，场效应晶体管结构，其包括源区，第一体区，漏区，栅电极结构和栅极绝缘层。 栅极绝缘层设置在栅电极结构和体区之间。 栅极电极结构和漏极区域部分地形成电容器结构，其包括栅极 - 漏极电容，该栅极 - 漏极电容被配置为随着施加在源极和漏极区域之间的变化的反向电压而动态地 栅极 - 漏极电容在给定的阈值下包括至少一个局部最大值，或者在给定的反向电压下包括平台状过程。

    Semiconductor device with a dynamic gate-drain capacitance
    53.
    发明授权
    Semiconductor device with a dynamic gate-drain capacitance 有权
    具有动态栅极 - 漏极电容的半导体器件

    公开(公告)号：US07982253B2

    公开(公告)日：2011-07-19

    申请号：US12184819

    申请日：2008-08-01

    申请人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    发明人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    IPC分类号： H01L29/94

    CPC分类号： H01L27/0808 ,  H01L21/26513 ,  H01L27/0811 ,  H01L27/088 ,  H01L29/7836

    摘要： A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a field effect transistor structure including a source region, a first body region, a drain region, a gate electrode structure and a gate insulating layer. The gate insulating layer is arranged between the gate electrode structure and the body region. The gate electrode structure and the drain region partially form a capacitor structure including a gate-drain capacitance configured to dynamically change with varying reverse voltages applied between the source and drain regions. The gate-drain capacitance includes at least one local maximum at a given threshold or a plateau-like course at given reverse voltage.

    摘要翻译： 具有动态栅极漏极电容的半导体器件。 一个实施例提供一种半导体器件。 该器件包括半导体衬底，场效应晶体管结构，其包括源区，第一体区，漏区，栅电极结构和栅极绝缘层。 栅极绝缘层设置在栅电极结构和体区之间。 栅极电极结构和漏极区域部分地形成电容器结构，其包括栅极 - 漏极电容，该栅极 - 漏极电容被配置为随着施加在源极和漏极区域之间的变化的反向电压而动态地改变。 栅极 - 漏极电容在给定的阈值下包括至少一个局部最大值，或者在给定的反向电压下包括平台状过程。

    Semiconductor device and method for producing a semiconductor device
    54.
    发明授权
    Semiconductor device and method for producing a semiconductor device 有权
    半导体装置及其制造方法

    公开(公告)号：US07939850B2

    公开(公告)日：2011-05-10

    申请号：US12403100

    申请日：2009-03-12

    申请人： Anton Mauder ,  Giulliano Aloise

    发明人： Anton Mauder ,  Giulliano Aloise

    IPC分类号： H01L29/74

    CPC分类号： H01L29/861 ,  H01L29/0634

    摘要： A semiconductor device has a semiconductor body with a semiconductor device structure including at least a first electrode and a second electrode. Between the two electrodes, a drift region is arranged, the drift region including charge compensation zones and drift zones arranged substantially parallel to one another. At least one charge carrier storage region which is at least partially free of charge compensation zones is arranged in the semiconductor body.

    摘要翻译： 半导体器件具有半导体器件结构，半导体器件结构至少包括第一电极和第二电极。 在两个电极之间布置漂移区域，漂移区域包括电荷补偿区域和漂移区域彼此基本平行布置。 至少部分没有电荷补偿区域的至少一个电荷载体存储区域被布置在半导体本体中。

    Soft switching semiconductor component with high robustness and low switching losses
    57.
    发明授权
    Soft switching semiconductor component with high robustness and low switching losses 有权
    软开关半导体元件具有高鲁棒性和低开关损耗

    公开(公告)号：US07812427B2

    公开(公告)日：2010-10-12

    申请号：US11757451

    申请日：2007-06-04

    申请人： Anton Mauder ,  Hans-Peter Felsl ,  Manfred Pfaffenlehner ,  Hans-Joachim Schulze

    发明人： Anton Mauder ,  Hans-Peter Felsl ,  Manfred Pfaffenlehner ,  Hans-Joachim Schulze

    IPC分类号： H01L29/06

    CPC分类号： H01L29/861 ,  H01L21/263 ,  H01L29/063 ,  H01L29/7395 ,  H01L29/74

    摘要： A semiconductor component includes a semiconductor body and a second semiconductor zone of a first conductivity type that serves as a rear side emitter. The second semiconductor zone is preceded by a plurality of third semiconductor zones of a second conductivity type that is opposite to the first conductivity type. The third semiconductor zones are spaced apart from one another in a lateral direction. In addition, provided within the semiconductor body is a field stop zone spaced apart from the second semiconductor zone, thereby reducing an electric field in the direction toward the second semiconductor zone.

    摘要翻译： 半导体部件包括半导体主体和用作后侧发射极的第一导电类型的第二半导体区。 第二半导体区域之前是与第一导电类型相反的多个第二导电类型的第三半导体区域。 第三半导体区域在横向彼此间隔开。 此外，设置在半导体本体内的是与第二半导体区间隔开的场阻挡区域，从而减小朝向第二半导体区域的方向的电场。

    IGBT device and related device having robustness under extreme conditions
    58.
    发明授权
    IGBT device and related device having robustness under extreme conditions 有权
    IGBT器件及相关器件在极端条件下具有鲁棒性

    公开(公告)号：US07696600B2

    公开(公告)日：2010-04-13

    申请号：US11713226

    申请日：2007-03-02

    申请人： Anton Mauder ,  Hans-Joachim Schulze ,  Frank Pfirsch ,  Elmar Falck ,  Josef Lutz

    发明人： Anton Mauder ,  Hans-Joachim Schulze ,  Frank Pfirsch ,  Elmar Falck ,  Josef Lutz

    IPC分类号： H01L29/10 ,  H01L29/72

    CPC分类号： H01L29/0834 ,  H01L29/7395 ,  H01L29/861

    摘要： A semiconductor device in the form of an IGBT has a front side contact, a rear side contact, and a semiconductor volume disposed between the front side contact and the rear side contact. The semiconductor volume includes a field stop layer for spatially delimiting an electric field that can be formed in the semiconductor volume. The semiconductor volume further includes a plurality of semiconductor zones, the plurality of semiconductor zones spaced apart from each other and each inversely doped with respect to adjacent areas. The plurality of semiconductor zones are located within the field stop layer.

    摘要翻译： IGBT形式的半导体器件具有前侧触点，后侧触点和设置在前侧触点和后侧触点之间的半导体体。 半导体体积包括用于空间地限定可以形成在半导体体积中的电场的场停止层。 半导体体积还包括多个半导体区域，多个半导体区域彼此间隔开并且相对于相邻区域反向掺杂。 多个半导体区域位于场停止层内。

    SEMICONDUCTOR DEVICE WITH INHERENT CAPACITANCES AND METHOD FOR ITS PRODUCTION
    60.
    发明申请
    SEMICONDUCTOR DEVICE WITH INHERENT CAPACITANCES AND METHOD FOR ITS PRODUCTION 有权
    具有固有电容的半导体器件及其制造方法

    公开(公告)号：US20090224302A1

    公开(公告)日：2009-09-10

    申请号：US12043429

    申请日：2008-03-06

    申请人： Armin Willmeroth ,  Winfried Kaindl ,  Carolin Tolksdorf ,  Anton Mauder ,  Holger Kapels ,  Gerald Deboy ,  Franz Hirler

    发明人： Armin Willmeroth ,  Winfried Kaindl ,  Carolin Tolksdorf ,  Anton Mauder ,  Holger Kapels ,  Gerald Deboy ,  Franz Hirler

    IPC分类号： H01L29/94 ,  H01L21/8238

    CPC分类号： H01L27/0733 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A semiconductor device with inherent capacitances and method for its production. The semiconductor device has an inherent feedback capacitance between a control electrode and a first electrode. In addition, the semiconductor device has an inherent drain-source capacitance between the first electrode and a second electrode. At least one monolithically integrated additional capacitance is connected in parallel to the inherent feedback capacitance or in parallel to the inherent drain-source capacitance. The additional capacitance comprises a first capacitor surface and a second capacitor surface opposite the first capacitor surface. The capacitor surfaces are structured conductive layers of the semiconductor device on a front side of the semiconductor body, between which a dielectric layer is located and which form at least one additional capacitor.

    摘要翻译： 具有固有电容的半导体器件及其制造方法。 半导体器件在控制电极和第一电极之间具有固有的反馈电容。 此外，半导体器件在第一电极和第二电极之间具有固有的漏极 - 源极电容。 至少一个单片集成附加电容与固有反馈电容并联连接，或与固有漏 - 源电容并联连接。 附加电容包括与第一电容器表面相对的第一电容器表面和第二电容器表面。 电容器表面是半导体器件的前侧上的半导体器件的结构化导电层，介电层位于其之间，并形成至少一个附加电容器。