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    SEMICONDUCTOR DEVICE WITH A DYNAMIC GATE-DRAIN CAPACITANCE
    1.
    发明申请
    SEMICONDUCTOR DEVICE WITH A DYNAMIC GATE-DRAIN CAPACITANCE 有权
    具有动态栅极导通电容的半导体器件

    公开(公告)号：US20130009227A1

    公开(公告)日：2013-01-10

    申请号：US13614479

    申请日：2012-09-13

    申请人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    发明人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    IPC分类号： H01L27/07 ,  H01L21/8234

    CPC分类号： H01L27/0808 ,  H01L21/26513 ,  H01L27/0811 ,  H01L27/088 ,  H01L29/7836

    摘要： A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a field effect transistor structure including a source region, a first body region, a drain region, a gate electrode structure and a gate insulating layer. The gate insulating layer is arranged between the gate electrode structure and the body region. The gate electrode structure and the drain region partially form a capacitor structure including a gate-drain capacitance configured to dynamically change with varying reverse voltages applied between the source and drain regions. The gate-drain capacitance includes at least one local maximum at a given threshold or a plateau-like course at given reverse voltage.

    摘要翻译： 具有动态栅极漏极电容的半导体器件。 一个实施例提供一种半导体器件。 该器件包括半导体衬底，场效应晶体管结构，其包括源区，第一体区，漏区，栅电极结构和栅极绝缘层。 栅极绝缘层设置在栅电极结构和体区之间。 栅极电极结构和漏极区域部分地形成电容器结构，其包括栅极 - 漏极电容，该栅极 - 漏极电容被配置为随着施加在源极和漏极区域之间的变化的反向电压而动态地 栅极 - 漏极电容在给定的阈值下包括至少一个局部最大值，或者在给定的反向电压下包括平台状过程。

    Semiconductor component and method for producing it
    3.
    发明授权
    Semiconductor component and method for producing it 有权
    半导体元件及其制造方法

    公开(公告)号：US07973362B2

    公开(公告)日：2011-07-05

    申请号：US11866662

    申请日：2007-10-03

    申请人： Armin Willmeroth ,  Michael Rueb ,  Carolin Tolksdorf ,  Markus Schmitt

    发明人： Armin Willmeroth ,  Michael Rueb ,  Carolin Tolksdorf ,  Markus Schmitt

    IPC分类号： H01L29/66 ,  H01L27/088

    CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/402

    摘要： A semiconductor component includes a semiconductor body having an edge with an edge zone of a first conductivity type. Charge compensation regions of a second conductivity type are embedded into the edge zone, with the charge compensation regions extending from a top side of the semiconductor component vertically into the semiconductor body. For the number Ns of charge carriers present in a volume Vs between two charge compensation regions that are adjacent in a direction perpendicular to the edge, and for the number Np of charge carriers present in a volume Vp between two charge compensation regions that are adjacent in a direction parallel to the edge, Np>Ns holds true.

    摘要翻译： 半导体部件包括具有边缘的第一导电类型的边缘区域的半导体本体。 第二导电类型的电荷补偿区域被嵌入到边缘区域中，电荷补偿区域从半导体组件的顶侧垂直延伸到半导体本体中。 对于在垂直于边缘的方向上相邻的两个电荷补偿区域之间存在的体积Vs中的电荷载流子数Ns以及存在于相邻的两个电荷补偿区域之间的体积Vp中的载流子数Np 与边缘平行的方向，Np> Ns成立。

    Lateral MISFET and method for fabricating it
    4.
    发明授权
    Lateral MISFET and method for fabricating it 有权
    侧面MISFET及其制造方法

    公开(公告)号：US07821064B2

    公开(公告)日：2010-10-26

    申请号：US11276782

    申请日：2006-03-14

    申请人： Michael Rueb ,  Markus Schmitt ,  Carolin Tolksdorf ,  Uwe Wahl ,  Armin Willmeroth

    发明人： Michael Rueb ,  Markus Schmitt ,  Carolin Tolksdorf ,  Uwe Wahl ,  Armin Willmeroth

    IPC分类号： H01L29/00

    CPC分类号： H01L29/782 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/7825

    摘要： A lateral MISFET having a semiconductor body has a doped semiconductor substrate of a first conduction type and an epitaxial layer of a second conduction type, which is complementary to the first conduction type, the epitaxial layer being provided on the semiconductor substrate. This MISFET has, on the top side of the semiconductor body, a drain, a source, and a gate electrode with gate insulator. A semiconductor zone of the first conduction type is embedded in the epitaxial layer in a manner adjoining the gate insulator, a drift zone of the second conduction type being arranged between the semiconductor zone and the drain electrode in the epitaxial layer. The drift zone has pillar-type regions which are arranged in rows and columns and whose boundary layers have a metal layer which in each case forms a Schottky contact with the material of the drift zone.

    摘要翻译： 具有半导体本体的横向MISFET具有第一导电类型的掺杂半导体衬底和与第一导电类型互补的第二导电类型的外延层，外延层设置在半导体衬底上。 该MISFET在半导体本体的顶侧具有漏极，源极和具有栅极绝缘体的栅电极。 第一导电类型的半导体区域以与栅极绝缘体相邻的方式嵌入在外延层中，第二导电类型的漂移区被布置在外延层中的半导体区域和漏极之间。 漂移区具有排列成行和列的柱状区域，其边界层具有金属层，其在每种情况下与漂移区的材料形成肖特基接触。

    INTEGRATED CIRCUIT DEVICE AND METHOD FOR ITS PRODUCTION
    7.
    发明申请
    INTEGRATED CIRCUIT DEVICE AND METHOD FOR ITS PRODUCTION 有权
    集成电路设备及其生产方法

    公开(公告)号：US20110241104A1

    公开(公告)日：2011-10-06

    申请号：US13161130

    申请日：2011-06-15

    申请人： Armin Willmeroth ,  Winfried Kaindl ,  Carolin Tolksdorf ,  Michael Rueb

    发明人： Armin Willmeroth ,  Winfried Kaindl ,  Carolin Tolksdorf ,  Michael Rueb

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0839 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/7396

    摘要： An integrated circuit device includes a semiconductor body fitted with a first electrode and a second electrode on opposite surfaces. A control electrode on an insulating layer controls channel regions of body zones for a current flow between the two electrodes. A drift section adjoining the channel regions comprises drift zones and charge compensation zones. A part of the charge compensation zones includes conductively connected charge compensation zones electrically connected to the first electrode. Another part includes nearly-floating charge compensation zones, so that an increased control electrode surface has a monolithically integrated additional capacitance CZGD in a cell region of the semiconductor device.

    摘要翻译： 集成电路器件包括在相对表面上装配有第一电极和第二电极的半导体本体。 绝缘层上的控制电极控制两个电极之间电流的体区的通道区域。 与沟道区相邻的漂移区包括漂移区和电荷补偿区。 电荷补偿区域的一部分包括与第一电极电连接的导电连接的电荷补偿区。 另一部分包括几乎浮动的电荷补偿区，使得增加的控制电极表面在半导体器件的单元区域中具有单片集成的附加电容CZGD。

    SEMICONDUCTOR DEVICE WITH A DYNAMIC GATE-DRAIN CAPACITANCE
    9.
    发明申请
    SEMICONDUCTOR DEVICE WITH A DYNAMIC GATE-DRAIN CAPACITANCE 有权
    具有动态栅极导通电容的半导体器件

    公开(公告)号：US20100025748A1

    公开(公告)日：2010-02-04

    申请号：US12184819

    申请日：2008-08-01

    申请人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    发明人： Anton Mauder ,  Hans-Joachim Schulze ,  Carolin Tolksdorf ,  Winfried Kaindl ,  Armin Willmeroth

    IPC分类号： H01L29/94 ,  H01L21/8234

    CPC分类号： H01L27/0808 ,  H01L21/26513 ,  H01L27/0811 ,  H01L27/088 ,  H01L29/7836

    摘要： A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a field effect transistor structure including a source region, a first body region, a drain region, a gate electrode structure and a gate insulating layer. The gate insulating layer is arranged between the gate electrode structure and the body region. The gate electrode structure and the drain region partially form a capacitor structure including a gate-drain capacitance configured to dynamically change with varying reverse voltages applied between the source and drain regions. The gate-drain capacitance includes at least one local maximum at a given threshold or a plateau-like course at given reverse voltage.

    摘要翻译： 具有动态栅极漏极电容的半导体器件。 一个实施例提供一种半导体器件。 该器件包括半导体衬底，场效应晶体管结构，其包括源区，第一体区，漏区，栅电极结构和栅极绝缘层。 栅极绝缘层设置在栅电极结构和体区之间。 栅极电极结构和漏极区域部分地形成电容器结构，其包括栅极 - 漏极电容，该栅极 - 漏极电容被配置为随着施加在源极和漏极区域之间的变化的反向电压而动态地 栅极 - 漏极电容在给定的阈值下包括至少一个局部最大值，或者在给定的反向电压下包括平台状过程。