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    ARRAY SUBSTRATE, METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE
    51.
    发明申请
    ARRAY SUBSTRATE, METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE 有权
    阵列基板，其制造方法和显示装置

    公开(公告)号：US20160004134A1

    公开(公告)日：2016-01-07

    申请号：US14429830

    申请日：2014-07-10

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Feng ZHANG ,  Zhanfeng CAO ,  Qi YAO

    IPC: G02F1/1362 ,  G02F1/1335 ,  G02F1/1333 ,  G02F1/1343 ,  H01L27/12 ,  H01L21/28

    CPC classification number: G02F1/136286 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/134363 ,  G02F1/13439 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L21/28 ,  H01L27/124 ,  H01L27/1259

    Abstract: An array substrate, a method for fabricating the same and a display device comprising the array substrate are disclosed. The array substrate includes: a base substrate; a plurality of gate lines (s1, s2, s3) and a plurality of data lines (d1, d2, d3) disposed on the base substrate as intersecting with each other to define a plurality of pixel regions (A, B, C, D); a first transparent electrode disposed in each of the pixel regions (A, B, C, D). The array substrate further includes: an insulation element, wherein the insulation element is disposed between two adjacent first transparent electrodes, a top surface of the insulation element is higher than a top surface of the first transparent electrode, and a bottom surface of the insulation element is lower than the top surface of the first transparent electrode. The array substrate may reduce the electric field interference between adjacent first transparent electrodes.

    Abstract translation: 公开了阵列基板，其制造方法和包括阵列基板的显示装置。 阵列基板包括：基底; 多个栅极线（s1，s2，s3）和多个数据线（d1，d2，d3），设置在基底基板上彼此相交以限定多个像素区域（A，B，C，D ）; 设置在每个像素区域（A，B，C，D）中的第一透明电极。 阵列基板还包括：绝缘元件，其中所述绝缘元件设置在两个相邻的第一透明电极之间，所述绝缘元件的顶表面高于所述第一透明电极的顶表面，并且所述绝缘元件的底表面 低于第一透明电极的顶表面。 阵列基板可以减小相邻的第一透明电极之间的电场干扰。

    PHASE SHIFTER, MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE
    53.
    发明公开
    PHASE SHIFTER, MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20240297426A1

    公开(公告)日：2024-09-05

    申请号：US18028012

    申请日：2022-04-26

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Zhao CUI ,  Feng ZHANG ,  Liwen DONG ,  Dongfei HOU ,  Yuqiao LI ,  Wenqu LIU ,  Zhijun LV ,  Detian MENG ,  Qi YAO ,  Liuqing LI ,  Yong MA ,  Mengya SONG

    IPC: H01P1/18 ,  H01Q3/36

    CPC classification number: H01P1/18 ,  H01Q3/36

    Abstract: A phase shifter, a manufacturing method thereof and an electronic device are provided. The phase shifter includes opposite first and second substrates, and a tunable dielectric layer and first isolation components therebetween. The first substrate includes a first dielectric substrate and a first electrode on a side of the first dielectric substrate close to the tunable dielectric layer; the second substrate includes a second dielectric substrate and a second electrode on a side of the second dielectric substrate close to the tunable dielectric layer; the phase shifter includes a phase shift region and a peripheral region; the phase shift region includes overlapping regions; the first electrode and the second electrode are both in the phase shift region, and orthographic projections of the first electrode and the second electrode on the first dielectric substrate at least partly overlap with each other in the overlapping regions, to form overlapping capacitors.

    Display Substrate and Preparation Method Thereof, and Display Apparatus
    55.
    发明申请
    Display Substrate and Preparation Method Thereof, and Display Apparatus 有权

    公开(公告)号：US20220223674A1

    公开(公告)日：2022-07-14

    申请号：US17359675

    申请日：2021-06-28

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Wenqu LIU ,  Qi YAO ,  Detian MENG ,  Feng ZHANG ,  Zhao CUI ,  Liwen DONG ,  Xiaoxin SONG ,  Dongfei HOU ,  Libo WANG ,  Zhijun LV

    IPC: H01L27/32 ,  H01L29/786 ,  H01L51/56

    Abstract: Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate, an active structure layer disposed on the substrate, a first source-drain structure layer disposed on a side of the active structure layer away from the substrate, and a second source-drain structure layer disposed on a side of the first source-drain structure layer away from the substrate. The active structure layer includes a first active layer and a second active layer. The first source-drain structure layer includes a first active via and a first source-drain electrode, and the first source-drain electrode is connected to the first active layer through the first active via; and the second source-drain structure layer includes a second active via and a second source-drain electrode, and the second source-drain electrode is connected to the second active layer through the second active via.

    ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE
    57.
    发明申请
    ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE 有权

    公开(公告)号：US20210343757A1

    公开(公告)日：2021-11-04

    申请号：US17283425

    申请日：2020-06-19

    Applicant: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Ning LIU ,  Wei SONG ,  Yingbin HU ,  Qinghe WANG ,  Feng ZHANG ,  Chongchong LIU ,  Bin ZHOU

    IPC: H01L27/12

    Abstract: An array substrate includes gate lines, data lines and an insulating layer. The data lines all extend in a first direction, and the gate lines all extend in a second direction, the first direction intersecting the second direction. A data line includes first line segments and second line segments that all extend in the first direction and are arranged alternately. The second line segments are disposed at a side of the gate lines proximate to the base, and the first line segments are disposed at a side of the gate lines away from the base. There is no overlap among orthographic projections of the first line segments on the base and orthographic projections of the gate lines on the base. The insulating layer includes first vias. In the first direction, any two adjacent first line segments are electrically connected to a second fine segment through at least two first vias.

    FINGERPRINT IDENTIFICATION MODULE, MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE
    58.
    发明申请
    FINGERPRINT IDENTIFICATION MODULE, MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE 有权

    公开(公告)号：US20210200985A1

    公开(公告)日：2021-07-01

    申请号：US16966394

    申请日：2020-01-17

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Wenqu LIU ,  Xiufeng LI ,  Qi YAO ,  Feng ZHANG ,  Liwen DONG ,  Zhao CUI ,  Chuanxiang XU ,  Detian MENG ,  Xiaoxin SONG ,  Libo WANG ,  Yang YUE ,  Dongfei HOU ,  Zhijun LV

    IPC: G06K9/00 ,  G06F3/041 ,  G06F3/044

    Abstract: A fingerprint identification module, a manufacturing method thereof and an electronic device are disclosed. The fingerprint identification module includes a substrate, a piezoelectric material layer, an auxiliary structure and a plurality of first driving electrodes; the piezoelectric material layer is on the substrate, the auxiliary structure is at least partially located on the substrate, and the plurality of first driving electrodes are on a side, away from the substrate, of the piezoelectric material and the auxiliary structure; each first driving electrode extends along a first direction and exceeds a first edge of the piezoelectric material layer in the first direction; the plurality of first driving electrodes are arranged at intervals along a second direction; the auxiliary structure is at least in contact with the first edge; the auxiliary structure includes a slope portion; and a thickness of the slope portion in a direction perpendicular to the functional substrate gradually decreases in a direction from the first edge to a position away from a center of the piezoelectric material layer. The fingerprint identification module can avoid the problems of wire disconnection and conductive material residue in the process of forming the plurality of first driving electrodes on the piezoelectric material layer, thereby improving the yield of products.

    DRIVING BACKPLANE, DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    59.
    发明申请
    DRIVING BACKPLANE, DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权

    公开(公告)号：US20210110761A1

    公开(公告)日：2021-04-15

    申请号：US17070338

    申请日：2020-10-14

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Wenqu LIU ,  Qi YAO ,  Feng ZHANG ,  Zhijun LV ,  Liwen DONG ,  Zhao CUI ,  Xiaoxin SONG ,  Detian MENG ,  Libo WANG

    IPC: G09G3/32 ,  H01L27/15 ,  H01L33/62 ,  H01L33/38

    Abstract: A driving backplane includes a base, and a pixel driving circuit, a first electrode and a first piezoelectric block that are disposed in the sub-pixel region. The pixel driving circuit is disposed on the base. The first electrode is disposed at a side of the pixel driving circuit away from the base. The first electrode includes a first sub-electrode pattern and a second sub-electrode pattern that are in a same layer and are spaced apart to be insulated from each other, and the first sub-electrode pattern is electrically connected to the pixel driving circuit. The first piezoelectric block is disposed between the pixel driving circuit and the first electrode, and the first sub-electrode pattern and the second sub-electrode pattern are in contact with the first piezoelectric block.

    SLEEP INTERVENTION EQUIPMENT, SYSTEM AND METHOD
    60.
    发明申请
    SLEEP INTERVENTION EQUIPMENT, SYSTEM AND METHOD 有权

    公开(公告)号：US20210008333A1

    公开(公告)日：2021-01-14

    申请号：US16916505

    申请日：2020-06-30

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Yao CHEN ,  Yi LI ,  Bao FU ,  Feng ZHANG

    IPC: A61M21/02 ,  G16H40/67 ,  G16H50/30 ,  G16H20/30 ,  G16H70/20 ,  G16H50/70 ,  A61B5/00 ,  A61N1/36 ,  A61B5/05 ,  A61B5/0205

    Abstract: A sleep intervention equipment, system and method are provided. The sleep intervention equipment includes a physical sign detection device, a first processor, and a sleep intervention device. The first processor is communicatively connected to the physical sign detection device and the sleep intervention device, respectively. The physical sign detection device is configured to detect a user's physical information without touching the user, and send the physical information to the first processor. The first processor is configured to determine a sleep stage and/or breath state of the user according to the physical information, and send a corresponding control instruction to the sleep intervention device according to the sleep stage and/or breath state of the user. The sleep intervention device is configured to perform a corresponding sleep intervention behavior in response to the control instruction. The sleep stage includes a waking state, an approaching waking state, or a sleep state.

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