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公开(公告)号：US20190189077A1
公开(公告)日：2019-06-20
申请号：US16322202
申请日：2018-04-12
Inventor： Yu ZHAO , Yue LI , Yanchen LI , Jinyu LI , Dong WANG , Shaojun HOU , Mingyang LV , Dawei FENG , Wang GUO
IPC: G09G3/36 , H01L27/12 , G02F1/1362
Abstract: A pixel driving circuit includes a pixel unit including a blue sub-pixel connected to a data line to receive a data voltage, and a limit circuit connected between the data line and a reference voltage line configured to transfer a fixed DC voltage, the limit circuit being configured to limit the received data voltage when the received data voltage exceeds a voltage threshold.
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公开(公告)号：US20190094681A1
公开(公告)日：2019-03-28
申请号：US15533456
申请日：2017-01-11
Inventor： Zhenhua LV , Xi CHEN , Shijun WANG , Zhiying BAO , Yong ZHANG , Yue LI , Wenjun XIAO , Yanna XUE , Wenbo JIANG
IPC: G03F1/40
CPC classification number: G03F1/40 , H01L27/1288
Abstract: The present disclosure provides a photoetching mask plate, a method for manufacturing the photoetching mask plate, and a photoetching method using the photoetching mask plate. The photoetching mask plate includes a base substrate, a mask pattern arranged on a surface of the base substrate, and a conductive connection pattern arranged on the surface of the base substrate. The conductive connection pattern is configured to electrically connect separate portions of the mask pattern to each other.
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公开(公告)号：US20190080646A1
公开(公告)日：2019-03-14
申请号：US15772500
申请日：2017-09-29
Inventor： Xingyou LUO , Yue LI , Xi CHEN
IPC: G09G3/3225 , G09G3/36 , G02F1/1335
Abstract: A display substrate provided in the embodiments of the present disclosure includes a plurality of display groups repeatedly arranged along a row direction. Each of the plurality of display groups includes n columns of pixel units of different views. For each pixel unit of the n columns of pixel units of different views, a ratio of a length along the row direction to a length along a column direction is 1/n, where n≥2, and n is a positive integer.
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公开(公告)号：US20180081245A1
公开(公告)日：2018-03-22
申请号：US15525930
申请日：2016-10-31
Inventor： Wenjun XIAO , Shijun WANG , Xi CHEN , Xue DONG , Zhifu LI , Wenbo JIANG , Yanna XUE , Yue LI , Zhiying BAO , Zhenhua LV , Yong ZHANG , Lei MI , Yue GENG
IPC: G02F1/1343 , G02F1/1335 , G02F1/1362
Abstract: Embodiments of the present disclosure disclose an array substrate, a liquid crystal display panel and a display device. A strip shaped transparent and electrically conductive shielding electrode is arranged above a gate line, and an outer contour of a projection of the shielding electrode on a base substrate surrounds a projection of the gate line on the base substrate, and the shielding electrode is insulated from both a pixel electrode and the gate line. The shielding electrode can shield the electrical field above the gate line.
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公开(公告)号：US20170176800A1
公开(公告)日：2017-06-22
申请号：US15124960
申请日：2015-11-05
Inventor： Xiaochuan CHEN , Shijun WANG , Lei WANG , Wenbo JIANG , Yanna XUE , Yue LI , Zhiying BAO , Wenjun XIAO , Zhenhua LV , Yong ZHANG
IPC: G02F1/13363 , G02F1/1343 , G02F1/1368 , G02F1/1335
CPC classification number: G02F1/13363 , G02F1/133512 , G02F1/134309 , G02F1/13439 , G02F1/136209 , G02F1/1368 , G02F2001/133388 , G02F2001/133565 , G02F2201/121 , G02F2201/123 , G02F2203/62 , G02F2413/01
Abstract: A display panel and a manufacturing method thereof and a display device are provided. The display panel includes an array substrate and an opposed substrate that are opposite to each other, and a liquid crystal layer located between the array substrate and the opposed substrate. The display panel includes a display area and a non-display area, a phase shift layer is disposed at the non-display area of the array substrate, and the phase shift layer is configured to shift a phase of light passing through the phase shift layer. The display panel is used to solve color cast problem when a TFT-LCD displays a pure color, which is caused by cross color when the display panel is viewed at a side angle.
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Patent Agency Ranking
公开(公告)号：US20170038011A1
公开(公告)日：2017-02-09
申请号：US14908794
申请日：2015-09-21
Inventor： Pingping HUANG , Hao SU , Yue LI
CPC classification number: F21K9/272 , F21K9/278 , F21S2/00 , F21S8/04 , F21V7/005 , F21V7/10 , F21V7/22 , F21V7/28 , F21V17/16 , F21V19/008 , F21V21/10 , F21V23/02 , F21Y2103/00 , F21Y2113/00 , F21Y2115/10
Abstract: A lampholder and a luminaire are provided. The lampholder includes a recess, a base of which has a luminous unit installing side; and a reflecting flank, extending from the recess and having a reflecting face facing the luminous unit installing side. The luminaire includes the lampholder. With the lampholder and the luminaire, conventionally discrete lampholder and light reflecting shade are made into an integral lampholder, so that structure is more simple, and the connecting step of a light emitting shade and a lampholder is cut down. In addition, the recess configuration of the lampholder is usable for accommodating an externally arranged power supply of a luminous unit, thereby saving the storage space, and reducing the warehousing and logistics costs.
Abstract translation: 提供灯座和灯具。 灯座包括凹部，其底部具有发光单元安装侧; 以及从凹部延伸并具有面向发光单元安装侧的反射面的反射侧面。 灯具包括灯座。 通过灯座和灯具，将传统的分立式灯座和光反射罩制成一个整体的灯座，使结构更加简单，并且减少了发光罩和灯座的连接步骤。 此外，灯座的凹部构造可用于容纳发光单元的外部布置的电源，从而节省存储空间，并且降低了仓储和物流成本。
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公开(公告)号：US20250029938A1
公开(公告)日：2025-01-23
申请号：US18280978
申请日：2022-12-16
Inventor： Yifan WU , Yue LI , Yuelei XIAO , Qichang AN , Yulin FENG , Xue CAO , Kidong HAN , Huiying LI , Jingshu ZHANG , Xiaodong LI , Biqi LI
Abstract: The present disclosure provides a functional substrate and a preparation method thereof, and belongs to the technical field of passive devices. A functional substrate of the present disclosure has a central region and a peripheral region surrounding the central region; the functional substrate includes: a dielectric substrate including a first surface and a second surface opposite to each other in a thickness direction thereof; the dielectric substrate includes functional holes and anchor holes each at least penetrating through the first surface; wherein the functional holes are located in the central region and the anchor holes are located in the peripheral region; the first connection structure is in the functional hole, the second connection structure is in the anchor hole, and the first connection structure and the second connection structure are made of the same material.
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公开(公告)号：US20250006615A1
公开(公告)日：2025-01-02
申请号：US18276476
申请日：2022-07-14
Inventor： Yifan WU , Yue LI , Yuelei XIAO , Xiaodong LI , Jingshu ZHANG , Kidong HAN , Yulin FENG , Qichang AN , Yingwei LIU , Zijian WANG , Rui MA , Quanyue LI , Song CHEN , Qianyu GUO , Biqi LI
IPC: H01L23/498 , H01L21/48 , H01L23/00 , H01L23/15 , H05K1/18
Abstract: A composite substrate, a method for manufacturing a composite substrate, and an electronic device are provided. The composite substrate includes a package substrate and an interposer which are stacked; the interposer includes: a first dielectric substrate including a first connection via penetrating therethrough, and a first surface and a second surface opposite to each other; a first connection electrode in the first connection via; and a first connection structure and a second connection structure respectively on the first surface and the second surface and both connected to the first connection electrode; the package substrate includes: a second dielectric substrate on a side of the second connection structure away from the first dielectric substrate; a third connection structure and a fourth connection structure which are on the second dielectric substrate and electrically connected; the third connection structure being electrically connected to the first connection electrode through the second connection structure.
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公开(公告)号：US20250006509A1
公开(公告)日：2025-01-02
申请号：US18580096
申请日：2022-08-26
Inventor： Jingshu ZHANG , Yifan WU , Shuai XU , Yue LI , Yuelei XIAO , Bin ZHAO , Kidong HAN , Yulin FENG , Qichang AN , Zijian WANG
IPC: H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498
Abstract: An encapsulation substrate and a manufacturing method therefor, and a functional substrate and a manufacturing method therefor are provided. The method for manufacturing an encapsulation substrate includes providing an initial substrate having first and second surfaces oppositely arranged along a thickness direction thereof; processing the initial substrate to form a blind hole extending through a part of the initial substrate in the thickness direction; forming a first connection electrode in the blind hole, and forming a first signal trace on the first surface; thinning the initial substrate from a side of the second surface to form a dielectric substrate and expose the first connection electrode; forming a second signal trace on a side of the dielectric substrate away from the first signal trace such that one of the first and second signal traces is electrically connected to the chip; the other one is electrically connected to the printed circuit board.
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公开(公告)号：US20240359972A1
公开(公告)日：2024-10-31
申请号：US18766713
申请日：2024-07-09
Applicant: Beijing BOE Sensor Technology Co., Ltd. , BOE Technology Group Co., Ltd. , Beijing BOE Technology Development Co., Ltd.
Inventor： Lihui WANG , Yue LI , Qiuxu WEI , Weilong GUO , Wenbo CHANG , Taonan ZHANG , Jie SUN , Nana HE , Yanfei REN , Feng QU
IPC: B81B7/00
CPC classification number: B81B7/0045 , B81B2201/0264 , B81B2207/096 , B81B2207/11
Abstract: Provided is a package structure, including: an insulating dielectric layer having a first surface and a second surface opposite to each other, wherein at least one first accommodation space running from the first surface to the second surface is formed in the insulating dielectric layer; and at least one conductive post in one-to-one correspondence with the at least one first accommodation space, wherein the conductive post is within the corresponding first accommodation space, a material of the conductive post comprises a non-metallic conductive material, and an absolute value of a difference between a thermal expansion coefficient of the conductive post and a thermal expansion coefficient of the insulating dielectric layer is less than or equal to 8×10−6/° C.; wherein the at least one conductive post comprises at least one first conductive post, two end faces of the first conductive post are flush with the first surface and the second surface, respectively.
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