公开(公告)号：US20130173946A1

公开(公告)日：2013-07-04

申请号：US13340433

申请日：2011-12-29

申请人： Efraim Rotem ,  Avinash N. Ananthakrishnan ,  Doron Rajwan ,  Eliezer Weissmann ,  Alon Naveh ,  James G. Hermerding, II ,  Riad Durr ,  Hisham Abu Salah

发明人： Efraim Rotem ,  Avinash N. Ananthakrishnan ,  Doron Rajwan ,  Eliezer Weissmann ,  Alon Naveh ,  James G. Hermerding, II ,  Riad Durr ,  Hisham Abu Salah

IPC分类号： G06F1/26

CPC分类号： G06F1/3206 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/171

摘要： Methods and apparatus relating to controlling power consumption through multiple power limits over multiple time intervals are described. In one embodiment, the level of power consumption by a computing device component (e.g., a processor or one of its processor cores) is modified based on a determined power limit value. The power limit value may be determined based on rolling power consumption averages over multiple time intervals and their comparison against multiple corresponding power limits. Other embodiments are also disclosed and claimed.

摘要翻译： 描述了通过多个时间间隔通过多个功率限制来控制功耗的方法和装置。 在一个实施例中，基于所确定的功率限制值来修改计算设备组件（例如，处理器或其处理器核心之一）的功率消耗水平。 功率极限值可以基于多个时间间隔上的滚动功率消耗平均值和它们与多个对应功率限制的比较来确定。 还公开并要求保护其他实施例。

公开(公告)号：US20130111236A1

公开(公告)日：2013-05-02

申请号：US13282947

申请日：2011-10-27

申请人： Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Doron Rajwan ,  Jeremy J. Shrall ,  Eric C. Samson ,  Eliezer Wiessman ,  Ryan Wells

发明人： Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Doron Rajwan ,  Jeremy J. Shrall ,  Eric C. Samson ,  Eliezer Wiessman ,  Ryan Wells

IPC分类号： G06F1/32

CPC分类号： G06F1/324 ,  G06F1/26 ,  G06F1/30 ,  G06F1/3203 ,  G06F1/3234 ,  G06F1/3243 ,  G06F13/14 ,  Y02D10/126

摘要： In one embodiment, the present invention includes a method for determining that a non-core domain of a multi-domain processor is not operating at a frequency requested by the non-core domain, sending a request from the non-core domain to a power controller to reduce a frequency of a core domain of the multi-domain processor, and responsive to the request, reducing the core domain frequency. Other embodiments are described and claimed.

公开(公告)号：US20130111226A1

公开(公告)日：2013-05-02

申请号：US13285414

申请日：2011-10-31

申请人： Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Doron Rajwan ,  Eliezer Wiessman ,  Ryan Wells ,  Nadav Shulman

发明人： Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Doron Rajwan ,  Eliezer Wiessman ,  Ryan Wells ,  Nadav Shulman

IPC分类号： G06F1/00

CPC分类号： G06F1/3206 ,  G06F1/26 ,  G06F1/324 ,  G06F1/3243 ,  G06F1/3287 ,  G06F9/3885 ,  Y02D10/126 ,  Y02D10/152 ,  Y02D10/171

摘要： In one embodiment, the present invention includes a multicore processor with a power controller to control a frequency at which the processor operates. More specifically, the power controller can limit a maximum operating frequency of the processor to less than a configured maximum operating frequency to enable a reduction in a number of frequency transitions occurring responsive to power state events, thus avoiding the overhead of operations performed in handling such transitions. Other embodiments are described and claimed.

公开(公告)号：US20130111121A1

公开(公告)日：2013-05-02

申请号：US13285465

申请日：2011-10-31

申请人： Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Eliezer Wiessman ,  Doron Rajwan ,  Nadav Shulman ,  Alon Naveh ,  Hisham Abu-Salah

发明人： Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Eliezer Wiessman ,  Doron Rajwan ,  Nadav Shulman ,  Alon Naveh ,  Hisham Abu-Salah

IPC分类号： G06F12/08 ,  G06F12/00

CPC分类号： G06F1/3275 ,  G06F1/28 ,  G06F1/3287 ,  G06F12/0802 ,  G06F12/084 ,  G06F12/0848 ,  G06F12/0864 ,  G06F2212/1028 ,  G06F2212/282 ,  G06F2212/502 ,  G06F2212/621 ,  Y02D10/13

摘要： In one embodiment, the present invention is directed to a processor having a plurality of cores and a cache memory coupled to the cores and including a plurality of partitions. The processor can further include a logic to dynamically vary a size of the cache memory based on a memory boundedness of a workload executed on at least one of the cores. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，本发明涉及具有多个核心的处理器和耦合到核心并且包括多个分区的高速缓冲存储器。 处理器还可以包括基于在至少一个核上执行的工作负载的存储器有界性来动态地改变高速缓存存储器的大小的逻辑。 描述和要求保护其他实施例。

公开(公告)号：US20120254641A1

公开(公告)日：2012-10-04

申请号：US13077618

申请日：2011-03-31

申请人： Efraim Rotem ,  Avinash N. Ananthakrishnan ,  Doron Rajwan ,  Kosta Luria ,  Ronny Korner

发明人： Efraim Rotem ,  Avinash N. Ananthakrishnan ,  Doron Rajwan ,  Kosta Luria ,  Ronny Korner

IPC分类号： G06F1/32

CPC分类号： G06F1/30 ,  G06F1/28 ,  G06F1/3243 ,  G06F11/004 ,  G06F11/3024 ,  G06F11/3058 ,  G06F11/348 ,  G06F2201/81 ,  G06F2201/86 ,  Y02D10/152

摘要： An apparatus may comprise one or more processor cores of a processor and a set of current limiters. Each current limiter may be coupled to a respective processor core and arranged to monitor processor activity in the processor, to compare the processor activity to one or more current limits of multiple current limits; and to initiate a current-limiting action when the one or more current limits is exceeded.

摘要翻译： 设备可以包括处理器的一个或多个处理器核心和一组限流器。 每个限流器可以耦合到相应的处理器核心并且被布置成监视处理器中的处理器活动，以将处理器活动与多个电流限制的一个或多个电流限制进行比较; 并且当超过一个或多个电流限制时启动限流动作。

公开(公告)号：US20100083009A1

公开(公告)日：2010-04-01

申请号：US12242000

申请日：2008-09-30

申请人： Efraim Rotem ,  Dan Baum ,  Doron Rajwan ,  Omer Vikinski ,  Ronny Korner ,  Kosta Luria

发明人： Efraim Rotem ,  Dan Baum ,  Doron Rajwan ,  Omer Vikinski ,  Ronny Korner ,  Kosta Luria

IPC分类号： G06F1/00

CPC分类号： G06F1/3203

摘要： Methods, apparatuses, and systems for managing power of a processing unit are described herein. Some embodiments include determining a voltage variation of a subset of current components of a current consumed by a processing unit. Other embodiments include detecting architectural events on a processing core of the processing unit and instituting various actions to reduce an input rate of instructions to the core. Other embodiments may be described and claimed.

摘要翻译： 本文描述了用于管理处理单元的功率的方法，装置和系统。 一些实施例包括确定由处理单元消耗的电流的当前分量的子集的电压变化。 其他实施例包括检测处理单元的处理核心上的架构事件并且建立各种动作以减少对核心的指令的输入速率。 可以描述和要求保护其他实施例。