公开(公告)号：US07755945B2

公开(公告)日：2010-07-13

申请号：US12182245

申请日：2008-07-30

申请人： Wen-Chiao Ho ,  Chin-Hung Chang ,  Kuen-Long Chang ,  Chun-Hsiung Hung

发明人： Wen-Chiao Ho ,  Chin-Hung Chang ,  Kuen-Long Chang ,  Chun-Hsiung Hung

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C11/5642 ,  G11C2211/5621 ,  G11C2211/5646 ,  G11C2216/14

摘要： A page buffer and method of programming and reading a memory are provided. The page buffer includes a first latch, a second latch, a data change unit and a program control unit. The first latch includes a first terminal for loading data of the lower page and the upper page. The second latch includes a first terminal for storing the data of the lower page and the upper page from the first latch. The data change unit is coupled to a second terminal of the first latch for changing a voltage of the second terminal of the first latch to a low level. The program control unit is coupled to the first terminal of the second latch and the cells, and controlled by the voltage of the first terminal of the first latch for respectively programming the data of the lower page and the upper page to a target cell.

摘要翻译： 提供了一种页面缓冲器和编程和读取存储器的方法。 页面缓冲器包括第一锁存器，第二锁存器，数据改变单元和程序控制单元。 第一锁存器包括用于加载下页和上页的数据的第一终端。 第二锁存器包括用于存储来自第一锁存器的下页数据和上页数据的第一终端。 数据改变单元耦合到第一锁存器的第二端子，用于将第一锁存器的第二端子的电压改变到低电平。 程序控制单元耦合到第二锁存器和单元的第一端子，并且由第一锁存器的第一端子的电压控制，以分别将下页数据和上部页面的数据编程到目标单元。

公开(公告)号：US20100122043A1

公开(公告)日：2010-05-13

申请号：US12270722

申请日：2008-11-13

申请人： Chun-Hsiung Hung ,  Wen-Chiao Ho

发明人： Chun-Hsiung Hung ,  Wen-Chiao Ho

IPC分类号： G06F12/00

CPC分类号： G11C16/102

摘要： A memory and a method applied in one program command for the memory are provided. The memory includes a buffer and at least one program unit. The method includes the following steps. First, enter the program command to the memory. Next, enter user data to the buffer. Read the data of the program unit. Determine whether the user data fill the buffer. Fill the part of the buffer unoccupied by the user data with the data of the program unit if the user data do not fill the buffer. Erase the program unit if the program unit is not empty. Finally, program the data of the buffer into the program unit.

摘要翻译： 提供了在存储器的一个程序命令中应用的存储器和方法。 存储器包括缓冲器和至少一个程序单元。 该方法包括以下步骤。 首先，将程序命令输入到内存中。 接下来，输入用户数据到缓冲区。 读取程序单元的数据。 确定用户数据是否填充缓冲区。 如果用户数据没有填充缓冲区，则将用户数据中未占用的缓冲区的一部分填入程序单元的数据。 如果程序单元不为空，则擦除程序单元。 最后，将缓冲区的数据编程到程序单元中。

公开(公告)号：US20090003054A1

公开(公告)日：2009-01-01

申请号：US11771310

申请日：2007-06-29

申请人： Chun-Hsiung Hung ,  Wen-Chiao Ho ,  Kuen-Long Chang

发明人： Chun-Hsiung Hung ,  Wen-Chiao Ho ,  Kuen-Long Chang

IPC分类号： G11C11/34

CPC分类号： G11C11/5671 ,  G11C16/0475 ,  G11C16/0491 ,  G11C16/3454 ,  G11C2211/5621

摘要： A method for double programming of multi-level-cell (MLC) programming in a multi-bit-cell (MBC) of a charge trapping memory that includes a plurality of charge trapping memory cells is provided. The double programming method is conducted in two phrases, a pre-program phase and a post-program phase, and applied to a word line (a segment in a word line, a page in a word line, a program unit or a memory unit) of the charge trapping memory. A program unit can be defined by input data in a wide variety of ranges. For example, a program unit can be defined as a portion (such as a page, a group, or a segment) in one word line in which each group is selected for pre-program and pre-program-verify, either sequentially or in parallel with other groups in the same word line.

公开(公告)号：US20080186769A1

公开(公告)日：2008-08-07

申请号：US11703115

申请日：2007-02-07

申请人： Wen-Chiao Ho ,  Kuen-Long Chang ,  Chun-Hsiung Hung

发明人： Wen-Chiao Ho ,  Kuen-Long Chang ,  Chun-Hsiung Hung

IPC分类号： G11C11/34

CPC分类号： G11C7/18 ,  G11C7/02

摘要： A method for metal bit line arrangement is applied to a virtual ground array memory having memory cell blocks. Each memory cell block has memory cells and m metal bit lines, wherein m is a positive integer. The method includes the following steps. First, one of the memory cells is selected as a target memory cell. When the target memory cell is being read, the metal bit line electrically connected to a drain of the target memory cell is a drain metal bit line, and the metal bit line electrically connected to a source is a source metal bit line. Next, a classification of whether the other metal bit lines are charged up when the target memory cell is being read is made. Thereafter, the m metal bit lines are arranged such that charged up metal bit lines are not adjacent to the source metal bit line.

摘要翻译： 一种用于金属位线布置的方法被应用于具有存储单元块的虚拟地阵列存储器。 每个存储单元块具有存储单元和m个金属位线，其中m是正整数。 该方法包括以下步骤。 首先，选择一个存储单元作为目标存储器单元。 当读出目标存储单元时，与目标存储单元的漏极电连接的金属位线是漏极金属位线，与源极电连接的金属位线是源极金属位线。 接着，对目标存储单元进行读取时，分类其他金属位线是否被充电。 此后，m个金属位线布置成使得带电的金属位线不与源极金属位线相邻。

公开(公告)号：US20080123406A1

公开(公告)日：2008-05-29

申请号：US11555849

申请日：2006-11-02

申请人： Wen-Chiao Ho ,  Chin-Hung Chang ,  Kuen-Long Chang ,  Chun-Hsiung Hung

发明人： Wen-Chiao Ho ,  Chin-Hung Chang ,  Kuen-Long Chang ,  Chun-Hsiung Hung

IPC分类号： G11C16/04

CPC分类号： G11C11/5628 ,  G11C11/5642 ,  G11C16/3454 ,  G11C2211/5621

摘要： A method for operating a multi-level cell (“MLC”) memory array of an integrated circuit (“IC”) programs first data into a first plurality of MLCs in the MLC memory array at a first programming level. Threshold voltages for the first plurality of MLCs are sensed, and an adjust code is set according to the threshold voltages. Second data is programmed into a second plurality of MLCs in the MLC memory array at a second programming level, the second plurality of MLCs having a program-verify value set according to the adjust code. In a further embodiment, a reference voltage for reading the second plurality of MLCs is set according to the adjust code.

摘要翻译： 用于操作集成电路（“IC”）的多级单元（“MLC”）存储器阵列的方法在第一编程级将第一数据编程到MLC存储器阵列中的第一多个MLC中。 感测第一多个MLC的阈值电压，并且根据阈值电压设置调整代码。 第二数据在第二编程级别被编程到MLC存储器阵列中的第二多个MLC中，第二多个MLC具有根据调整代码设置的程序验证值。 在另一实施例中，根据调整代码来设置用于读取第二多个MLC的参考电压。

公开(公告)号：US08347185B2

公开(公告)日：2013-01-01

申请号：US13456870

申请日：2012-04-26

申请人： Wen-Chiao Ho ,  Chin-Hung Chang ,  Chun-Hsiung Hung ,  Kuen-Long Chang

发明人： Wen-Chiao Ho ,  Chin-Hung Chang ,  Chun-Hsiung Hung ,  Kuen-Long Chang

IPC分类号： G11C29/00 ,  G06F7/02 ,  H03M13/00

CPC分类号： H03M13/13 ,  G06F11/1068 ,  H03M13/03 ,  H03M13/3776

摘要： A method for checking reading errors of a memory includes the following steps. A first data fragment is received. A first count index according to the first data fragment is generated, wherein the first count index is corresponding to a quantity of one kind of binary value in the first data fragment. The first data fragment is written into the memory. The first data fragment is read from the memory as a second data fragment. A second count index is generated according to the second data fragment. The first count index is compared with the second count index.

摘要翻译： 用于检查存储器的读取错误的方法包括以下步骤。 接收到第一个数据片段。 产生根据第一数据片段的第一计数索引，其中第一计数索引对应于第一数据片段中的一种二进制值的数量。 第一个数据片段被写入存储器。 第一数据片段作为第二数据片段从存储器读取。 根据第二数据片段生成第二计数索引。 将第一计数指数与第二计数指数进行比较。

公开(公告)号：US20120300562A1

公开(公告)日：2012-11-29

申请号：US13564189

申请日：2012-08-01

申请人： Chun-Hsiung Hung ,  Wen-Chiao Ho ,  Kuen-Long Chang

发明人： Chun-Hsiung Hung ,  Wen-Chiao Ho ,  Kuen-Long Chang

IPC分类号： G11C7/00

CPC分类号： G11C29/10 ,  G11C29/12005

摘要： A method and circuit for testing a multi-chip package is provided. The multi-chip package includes at least a memory chip, and the memory chip includes a number of memory cells. The method includes performing a normal read operation on the memory cells to check if data read from the memory cells is the same with preset data in the memory cells; and performing a special read operation on the memory cells to check if data read from the memory cells is the same with an expected value, wherein the expected value is independent from data stored in the memory cells.

摘要翻译： 提供了一种用于测试多芯片封装的方法和电路。 多芯片封装至少包括存储器芯片，并且存储器芯片包括多个存储器单元。 该方法包括对存储器单元执行正常读取操作，以检查从存储器单元读取的数据是否与存储器单元中的预置数据相同; 以及对所述存储器单元执行特殊读取操作，以检查从所述存储器单元读取的数据是否与期望值相同，其中所述期望值与存储在所述存储器单元中的数据无关。

公开(公告)号：US07975111B2

公开(公告)日：2011-07-05

申请号：US12270722

申请日：2008-11-13

申请人： Chun-Hsiung Hung ,  Wen-Chiao Ho

发明人： Chun-Hsiung Hung ,  Wen-Chiao Ho

IPC分类号： G06F13/00

CPC分类号： G11C16/102

摘要： A memory and a method applied in one program command for the memory are provided. The memory includes a buffer and at least one program unit. The method includes the following steps. First, enter the program command to the memory. Next, enter user data to the buffer. Read the data of the program unit. Determine whether the user data fill the buffer. Fill the part of the buffer unoccupied by the user data with the data of the program unit if the user data do not fill the buffer. Erase the program unit if the program unit is not empty. Finally, program the data of the buffer into the program unit.

摘要翻译： 提供了在存储器的一个程序命令中应用的存储器和方法。 存储器包括缓冲器和至少一个程序单元。 该方法包括以下步骤。 首先，将程序命令输入到内存中。 接下来，输入用户数据到缓冲区。 读取程序单元的数据。 确定用户数据是否填充缓冲区。 如果用户数据没有填充缓冲区，则将用户数据中未占用的缓冲区的一部分填入程序单元的数据。 如果程序单元不为空，则擦除程序单元。 最后，将缓冲区的数据编程到程序单元中。

公开(公告)号：US20110149675A1

公开(公告)日：2011-06-23

申请号：US12785297

申请日：2010-05-21

申请人： Chin-Hung Chang ,  Wen-Chiao Ho ,  Chun-Hsiung Hung

发明人： Chin-Hung Chang ,  Wen-Chiao Ho ,  Chun-Hsiung Hung

IPC分类号： G11C8/08

CPC分类号： G11C8/08

摘要： A two transistor word line driver is disclosed. An example disclosed word line driver is simplified with common signals on the gates of the p-type and the n-type transistors. An example disclosed word line driver consumes less power by applying a negative voltage to a word line driver selected from multiple word line drivers.

摘要翻译： 公开了一种双晶体管字线驱动器。 所公开的公开的字线驱动器的示例通过p型和n型晶体管的栅极上的公共信号来简化。 所公开的字线驱动器的示例通过对从多个字线驱动器中选择的字线驱动器施加负电压而消耗较少的功率。

公开(公告)号：US20110128786A1

公开(公告)日：2011-06-02

申请号：US12628710

申请日：2009-12-01

申请人： Wen-Chiao Ho ,  Chin-Hung Chang ,  Shuo-Nan Hung ,  Chun-Hsiung Hung

发明人： Wen-Chiao Ho ,  Chin-Hung Chang ,  Shuo-Nan Hung ,  Chun-Hsiung Hung

IPC分类号： G11C16/14 ,  G11C16/04 ,  G11C16/06

CPC分类号： G11C16/16

摘要： A memory device includes a memory sector including a memory sector, a row of select transistors and a number of drivers. The memory sector includes a plurality of word lines each couples to a plurality of memory cells. The row of select transistors select the memory sector and separate the memory sector from an immediately adjacent memory sector in the memory device. Each of the number of drivers is coupled to one of the plurality of word lines, wherein a first one of the drivers is coupled to a first one of the word lines to receive a first control signal to conduct the first word line and a voltage source, and a second one of the drivers is coupled to a second one of the word lines to receive a second control signal to disconnect the second word line from the voltage source.

摘要翻译： 存储器件包括存储器扇区，其包括存储器扇区，一行选择晶体管和多个驱动器。 存储器扇区包括多个字线，每个字线耦合到多个存储器单元。 选择晶体管行选择存储器扇区，并将存储器扇区与存储器件中紧邻的存储器扇区分开。 多个驱动器中的每一个耦合到多个字线中的一个，其中驱动器中的第一个耦合到字线中的第一个，以接收第一控制信号以传导第一字线和电压源 并且驱动器中的第二个耦合到第二个字线以接收第二控制信号以将第二字线与电压源断开。