公开(公告)号：US08804410B2

公开(公告)日：2014-08-12

申请号：US13586976

申请日：2012-08-16

申请人： Hyung-Rok Oh ,  Se-Chung Oh

发明人： Hyung-Rok Oh ,  Se-Chung Oh

IPC分类号： G11C11/00 ,  G11C11/16 ,  H01L27/22

CPC分类号： G11C11/16 ,  G11C11/1653 ,  G11C11/1659 ,  H01L25/0657 ,  H01L25/18 ,  H01L27/0688 ,  H01L27/1052 ,  H01L27/11286 ,  H01L27/224 ,  H01L27/228 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is a stacked magnetic random access memory (MRAM) in which memory cell arrays having various characteristics or functions are included in memory cell layers. The stacked MRAM device includes a semiconductor substrate and at least one memory cell layers. The semiconductor substrate includes a first memory cell array. Each of the memory cell layers includes a memory cell array having a different function from the first memory cell array and is stacked on the first memory cell array. As a result, the stacked MRAM device has high density, high performance, and high reliability.

摘要翻译： 提供了一种堆叠磁性随机存取存储器（MRAM），其中具有各种特性或功能的存储单元阵列被包括在存储单元层中。 层叠MRAM器件包括半导体衬底和至少一个存储单元层。 半导体衬底包括第一存储单元阵列。 每个存储单元层包括具有与第一存储单元阵列不同的功能并且堆叠在第一存储单元阵列上的存储单元阵列。 结果，堆叠MRAM器件具有高密度，高性能和高可靠性。

公开(公告)号：US08619458B2

公开(公告)日：2013-12-31

申请号：US13349167

申请日：2012-01-12

申请人： In-Gyu Baek ,  Hyung-Rok Oh ,  Hong-Sun Hwang

发明人： In-Gyu Baek ,  Hyung-Rok Oh ,  Hong-Sun Hwang

IPC分类号： G11C13/00

CPC分类号： G11C13/004 ,  G11C8/10 ,  G11C11/16 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0004 ,  G11C13/0007

摘要： A memory device includes a memory cell array including a plurality of memory cells, each including a bidirectional variable resistance element and an input/output circuit configured to determine a polarity for a read voltage to be applied to a selected memory cell among the plurality of memory cells and to apply the read voltage with the determined polarity to the selected memory cell. The input/output circuit may include a polarity determination circuit configured to determine the polarity responsive to a determination mode signal and a driver circuit configured to apply the read voltage with the determined polarity to the selected memory cell.

摘要翻译： 存储器件包括存储单元阵列，其包括多个存储器单元，每个存储器单元包括双向可变电阻元件和输入/输出电路，该输入/输出电路被配置为确定要施加到多个存储器中的选定存储单元的读取电压的极性 并将所确定的极性的读取电压施加到所选存储单元。 输入/输出电路可以包括极性确定电路，其被配置为响应于确定模式信号确定极性，并且驱动器电路被配置为将所确定的极性的读取电压施加到所选存储单元。

公开(公告)号：US07656694B2

公开(公告)日：2010-02-02

申请号：US11564751

申请日：2006-11-29

申请人： Chang-Wook Jeong ,  Jun-Hyok Kong ,  Hyung-Rok Oh

发明人： Chang-Wook Jeong ,  Jun-Hyok Kong ,  Hyung-Rok Oh

IPC分类号： G11C17/00

CPC分类号： G11C17/16 ,  G11C13/0004 ,  G11C17/165

摘要： A method of programming a one-time programmable device is provided. A switching device disposed in a substrate is turned on and a program current is applied to a fuse electrically connected to the switching device, thereby cutting the fuse. The fuse includes a first electrode electrically connected to the switching device, a second electrode spaced apart from the first electrode, and a chalcogenide pattern disposed between the first and second electrodes. Related one-time programmable devices, phase change memory devices and electronic systems are also disclosed.

摘要翻译： 提供了一种编程一次性可编程器件的方法。 设置在基板中的开关装置导通，并且将编程电流施加到与开关装置电连接的保险丝，从而切断保险丝。 保险丝包括电连接到开关装置的第一电极，与第一电极间隔开的第二电极和设置在第一和第二电极之间的硫族化物图案。 还公开了相关的一次性可编程器件，相变存储器件和电子系统。