公开(公告)号：US10187710B2

公开(公告)日：2019-01-22

申请号：US15670729

申请日：2017-08-07

Applicant: INPHI CORPORATION

Inventor： Radhakrishnan L. Nagarajan

IPC: H04Q11/00 ,  H04B10/516 ,  H04B10/80 ,  H04J14/02 ,  G02B6/122 ,  G02B6/12

Abstract: In an example, the present invention includes an integrated system on chip device. The device has a data input/output interface provided on the substrate member and configured for a predefined data rate and protocol. In an example, the data input/output interface is configured for number of lanes numbered from four to one hundred and fifty. In an example, the SerDes block is configured to convert a first data stream of N into a second data stream of M such that each of the first data stream having a first predefined data rate at a first clock rate and each of the second data stream having a second predefined data rate at a second clock rate.

公开(公告)号：US10142032B2

公开(公告)日：2018-11-27

申请号：US15890616

申请日：2018-02-07

Applicant: INPHI CORPORATION

Inventor： Masaki Kato ,  Radhakrishnan L. Nagarajan

IPC: H04B10/2507 ,  H04B10/67 ,  H04J14/02 ,  H04B10/69 ,  G02B6/12 ,  G02B6/28 ,  G02B6/293

Abstract: A silicon photonics based temperature-insensitive delay line interferometer (DLI). The DLI includes a first arm comprising a first length of a first material characterized by a first group index corresponding to a first phase delay to transfer a first light wave with a first peak frequency and a second arm comprising a second length of a second material characterized by a second group index corresponding to a second phase to transfer a second light wave with a second peak frequency with a time-delay difference relative to the first light wave. The first phase delay and the second phase delay are configured to change equally upon a change of temperature. The time-delay difference between the first light wave and the second light wave is set to be inversed value of a free spectral range (FSR) to align at least the first peak frequency to a channel of a designated frequency grid.

公开(公告)号：US10128955B2

公开(公告)日：2018-11-13

申请号：US15990003

申请日：2018-05-25

Applicant: INPHI CORPORATION

Inventor： Todd Rope ,  Radhakrishnan L. Nagarajan ,  Jamal Riani ,  Pulkit Khandelwal

IPC: H04B10/40 ,  H04B10/073 ,  H04B10/524 ,  H04B10/079

Abstract: A Pulse Amplitude Modulated (PAM) optical device utilizing multiple wavelengths, features a communications interface having enhanced diagnostics capability. New registers are created to house additional diagnostic information, such as error rates. The diagnostic information may be stored in raw form, or as processed on-chip utilizing local resources.

公开(公告)号：US10120825B2

公开(公告)日：2018-11-06

申请号：US15730451

申请日：2017-10-11

Applicant: INPHI CORPORATION

Inventor： Siddharth Sheth ,  Radhakrishnan L. Nagarajan

IPC: G06F13/24 ,  H04B10/80 ,  H04B10/40 ,  H04B10/556 ,  H04B10/54 ,  H04B10/516 ,  H04B10/69 ,  H04B14/02 ,  G06F13/42 ,  G06F13/364 ,  G06F13/40 ,  G06F15/78 ,  H04L1/00 ,  H04L25/03 ,  H04L27/34

Abstract: The present invention provides an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. The device further includes a driver interface and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.

公开(公告)号：US10107961B2

公开(公告)日：2018-10-23

申请号：US15855655

申请日：2017-12-27

Applicant: INPHI CORPORATION

Inventor： Liang Ding ,  Radhakrishnan L. Nagarajan

IPC: H01L21/76 ,  G02B6/132 ,  G02B6/125 ,  G02B6/136 ,  G02B6/122 ,  G02B6/12

Abstract: An silicon photonics device of hybrid waveguides having a coupling interlayer with an accurately controlled thickness and a method of making the same. The device includes a first plurality of Si waveguides formed in a SOI substrate and a first layer of SiO2 overlying the first plurality of Si waveguides and a second plurality of Si3N4 waveguides formed on the first layer of SiO2. At least one Si3N4 waveguide is disposed partially overlapping with at least one of the first plurality Si waveguides in vertical direction separated by the first layer of SiO2 with a thickness controlled no greater than 90 nm. The device includes a second layer of SiO2 overlying the second plurality of Si3N4 waveguides. The method of accurately controlling the coupling interlayer SiO2 thickness includes a multilayer SiO2/Si3N4/SiO2 hard mask process for SiO2 etching and polishing as stopping and buffering layer as well as Si waveguide etching mask.

公开(公告)号：US10056733B1

公开(公告)日：2018-08-21

申请号：US15453618

申请日：2017-03-08

Applicant: INPHI CORPORATION

Inventor： Brian Taylor ,  Radhakrishnan L. Nagarajan ,  Masaki Kato

IPC: H04J14/02 ,  H01S5/0687 ,  G02B6/28 ,  G02B6/42 ,  H01S5/12 ,  G02B6/125 ,  H04B10/50 ,  G02B6/12

CPC classification number: H01S5/0687 ,  G02B6/125 ,  G02B6/2813 ,  G02B6/2861 ,  G02B6/4286 ,  G02B2006/12135 ,  G02B2006/1215 ,  H01S5/005 ,  H01S5/021 ,  H01S5/12 ,  H04B10/5057 ,  H04J14/02

Abstract: A wavelength locker integrated with a silicon photonics transmission system comprising a silicon-on-insulator (SOI) substrate and an input via a power tap coupler to receive a fraction of a transmission signal with one or more frequencies from a primary output path of the silicon photonics transmission system. The wavelength locker further includes a splitter configured to split the input to a first signal in a first path and a second signal in a second path and a first delay-line-interferometer (DLI) coupled to the second path to receive the second signal and configured to generate an interference spectrum and output at least two sub-spectrums tunable to keep quadrature points of the sub-spectrums at respective one or more target frequencies. The wavelength locker is configured to generate an error signal fed back to the silicon photonics transmission system for locking the one or more frequencies at the one or more target frequencies.

公开(公告)号：US10050736B2

公开(公告)日：2018-08-14

申请号：US15694472

申请日：2017-09-01

Applicant: INPHI CORPORATION

Inventor： Radhakrishnan L. Nagarajan

IPC: H04J14/02 ,  H04B10/40

Abstract: An integrated apparatus with optical/electrical interfaces and protocol converter on a single silicon substrate. The apparatus includes an optical module comprising one or more modulators respectively coupled with one or more laser devices for producing a first optical signal to an optical interface and one or more photodetectors for detecting a second optical signal from the optical interface to generate a current signal. Additionally, the apparatus includes a transmit lane module coupled between the optical module and an electrical interface to receive a first electric signal from the electrical interface and provide a framing protocol for driving the one or more modulators. Furthermore, the apparatus includes a receive lane module coupled between the optical module and the electrical interface to process the current signal to send a second electric signal to the electrical interface.

公开(公告)号：US10025046B2

公开(公告)日：2018-07-17

申请号：US15672693

申请日：2017-08-09

Applicant: INPHI CORPORATION

Inventor： Radhakrishnan L. Nagarajan ,  Peng-Chih Li ,  Masaki Kato

IPC: H04B10/00 ,  G02B6/42 ,  H04B10/40

Abstract: A photonic transceiver apparatus in QSFP package. The apparatus includes a case having a base member, two partial side members, and a lid member to provide a spatial volume with an opening at a back end of the base member. Additionally, the apparatus includes a PCB, installed inside the spatial volume over the base member having a pluggable electrical connector at the back end. Further, the apparatus includes multiple optical transmitting devices in mini-transmit-optical-sub-assembly package, each being mounted on a common support structure and having a laser output port in reversed orientation toward the back end. Furthermore, the apparatus includes a silicon photonics chip, including a fiber-to-silicon attachment module, mounted on the PCB and coupled to a modulation driver module and a trans-impedance amplifier module. Moreover, the apparatus includes a pair of optical input/output ports being back connected to the fiber-to-silicon attachment module.

公开(公告)号：US10014950B2

公开(公告)日：2018-07-03

申请号：US15647188

申请日：2017-07-11

Applicant: INPHI CORPORATION

Inventor： Radhakrishnan L. Nagarajan

IPC: H04B10/50 ,  H04B10/516

CPC classification number: H04B10/524 ,  G02F1/0123 ,  G02F1/2255 ,  G02F1/2257 ,  G02F2001/212 ,  H03M1/682 ,  H04B10/5161 ,  H04B10/541

Abstract: A PAM4 driver with at least 56 Gbps speed for driving a Mach-Zehnder modulator. The PAM4 driver is configured as 2-bit CMOS digital-to-analog convertor including a drive control module for receiving a pair of incoming differential digital data and generating a first processed reference signal and a second processed reference signal. The PAM4 driver further includes a mirrored buffer circuit to produce two sets of four voltage levels. Furthermore, the PAM4 driver includes a decoder module controlled by a switch bias control module configured to decode each of the two sets of four voltage levels for generating a first output signal and a complementary second out signal with 4 independently adjustable analog levels for driving the Mach-Zehnder modulator with close ended termination resistor.

公开(公告)号：US10014936B1

公开(公告)日：2018-07-03

申请号：US15903910

申请日：2018-02-23

Applicant: INPHI CORPORATION

Inventor： Radhakrishnan L. Nagarajan

IPC: H04B10/071 ,  H04L12/26 ,  H04L12/933 ,  H04Q11/00 ,  H04B10/40

Abstract: In an example, the present invention includes an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.