公开(公告)号：US11049882B2

公开(公告)日：2021-06-29

申请号：US16743080

申请日：2020-01-15

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Kazufumi Watabe ,  Yoshinori Ishii ,  Hidekazu Miyake ,  Yohei Yamaguchi

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/786 ,  H01L29/51 ,  H01L29/24 ,  G02F1/1368 ,  G02F1/133 ,  G02F1/1362 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49

Abstract: The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.

公开(公告)号：US20180364509A1

公开(公告)日：2018-12-20

申请号：US16109834

申请日：2018-08-23

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1343 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786 ,  H01L29/423

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  G02F2001/136218 ,  G02F2001/13685 ,  G02F2202/10 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/7869

Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.

公开(公告)号：US10088728B2

公开(公告)日：2018-10-02

申请号：US15662385

申请日：2017-07-28

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1343 ,  H01L29/423

Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.

公开(公告)号：US10026754B2

公开(公告)日：2018-07-17

申请号：US15585401

申请日：2017-05-03

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Kazufumi Watabe ,  Yoshinori Ishii ,  Hidekazu Miyake ,  Yohei Yamaguchi

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/51 ,  H01L29/24 ,  G02F1/1368 ,  G02F1/133 ,  G02F1/1362 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L27/32

Abstract: The object of the present invention is to make it possible to form an LIPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.

公开(公告)号：US09964824B2

公开(公告)日：2018-05-08

申请号：US14793106

申请日：2015-07-07

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Arichika Ishida ,  Norihiro Uemura ,  Hidekazu Miyake ,  Hiroto Miyake ,  Yohei Yamaguchi

IPC: G09G3/36 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/1368 ,  G02F1/133345 ,  G02F1/136227 ,  H01L27/1288

Abstract: According to one embodiment, a display device includes a TFT on an insulating substrate. The TFT includes a gate electrode, an insulating layer on the gate electrode, a semiconductor layer on the insulating layer, and a source electrode and a drain electrode each provided in contact with at least a part of the semiconductor layer. The source and drain electrodes have a laminated structure including a lower layer, an intermediate layer and an upper layer. The source and drain electrodes include sidewalls each including a first tapered portion on the upper layer side, a second tapered portion on the lower layer side and a sidewall protective film attached to the second tapered portion. The taper angle of the first tapered portion is smaller than that of the second tapered portion.

公开(公告)号：US09391213B2

公开(公告)日：2016-07-12

申请号：US14245102

申请日：2014-04-04

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Norihiro Uemura ,  Takeshi Noda ,  Hidekazu Miyake ,  Yohei Yamaguchi

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78696 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/1368 ,  G02F2001/133357 ,  H01L27/1225 ,  H01L27/1285 ,  H01L29/24 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78633 ,  H01L29/7869 ,  H01L29/78693

Abstract: In a bottom gate thin film transistor using a first oxide semiconductor layer as a channel layer, the first oxide semiconductor layer and second semiconductor layers include In and O. An (O/In) ratio of the second oxide semiconductor layers is equal to or larger than that of the first oxide semiconductor layer, and a film thickness thereof is thicker than that of the first oxide semiconductor layer.

Abstract translation: 在使用第一氧化物半导体层作为沟道层的底栅极薄膜晶体管中，第一氧化物半导体层和第二半导体层包括In和O.第二氧化物半导体层的（O / In）比等于或大于 比第一氧化物半导体层的厚度厚，其厚度比第一氧化物半导体层厚。