Fast translation indicator to reduce secondary address table checks in a memory device
    52.
    发明授权
    Fast translation indicator to reduce secondary address table checks in a memory device 有权
    快速翻译指示符,以减少存储设备中的辅助地址表检查

    公开(公告)号:US09104327B2

    公开(公告)日:2015-08-11

    申请号:US13464426

    申请日:2012-05-04

    摘要: A system and method for reducing the need to check both a secondary address table and a primary address table for logical to physical translation tasks is disclosed. The method may include generating a fast translation indicator, such as a logical group bitmap, indicating whether there is an entry in the secondary address table that contains desired information pertaining to a particular logical address. Upon a host request relating to the particular logical address, the storage device may check the bitmap to determine if retrieval and parsing of the secondary table is necessary. The system may include a storage device having RAM cache storage, flash storage and a controller configured to generate and maintain at least one fast translation indicator to reduce the need to check both secondary and primary address tables during logical to physical address translation operations of the storage device.

    摘要翻译: 公开了一种用于减少检查辅助地址表和用于逻辑到物理转换任务的主地址表的需要的系统和方法。 该方法可以包括生成快速转换指示符,例如逻辑组位图,指示辅助地址表中是否存在包含与特定逻辑地址相关的期望信息的条目。 在与特定逻辑地址相关的主机请求时,存储设备可以检查位图以确定是否需要检索和解析辅助表。 该系统可以包括具有RAM高速缓存存储器,闪存存储器和被配置为生成和维护至少一个快速转换指示符的存储设备,以减少在存储器的逻辑到物理地址转换操作期间检查辅助和主地址表的需要 设备。

    Non-volatile memory and method with phased program failure handling
    53.
    发明授权
    Non-volatile memory and method with phased program failure handling 有权
    非易失性存储器和分阶段程序故障处理方法

    公开(公告)号:US08621177B2

    公开(公告)日:2013-12-31

    申请号:US13102261

    申请日:2011-05-06

    IPC分类号: G06F12/02

    摘要: In a memory with block management system, program failure in a block during a time-critical memory operation is handled by continuing the programming operation in a breakout block. Later, at a less critical time, the data recorded in the failed block prior to the interruption is transferred to another block, which could also be the breakout block. The failed block can then be discarded. In this way, when a defective block is encountered during programming, it can be handled without loss of data and without exceeding a specified time limit by having to transfer the stored data in the defective block on the spot. This error handling is especially critical for a garbage collection operation so that the entire operation need not be repeated on a fresh block during a critical time. Subsequently, at an opportune time, the data from the defective block can be salvaged by relocation to another block.

    摘要翻译: 在具有块管理系统的存储器中,通过在分组块中继续编程操作来处理在时间紧急的存储器操作期间块中的程序故障。 之后,在不太关键的时刻,在中断之前记录在故障块中的数据被传送到另一个块,也可以是分组块。 然后可以丢弃失败的块。 以这种方式,当在编程期间遇到有缺陷的块时,可以在不丢失数据的情况下处理而不超过指定的时间限制,因为必须现场将存储的数据传送到缺陷块中。 这种错误处理对于垃圾收集操作尤其重要,因此在关键时刻不需要在新块上重复整个操作。 随后,在适当的时间,来自缺陷块的数据可以通过重新定位到另一个块来进行抢救。

    Metablock Size Reduction Using on Chip Page Swapping Between Planes
    54.
    发明申请
    Metablock Size Reduction Using on Chip Page Swapping Between Planes 有权
    使用片上页面交换平面之间的元块大小缩小

    公开(公告)号:US20130173847A1

    公开(公告)日:2013-07-04

    申请号:US13341543

    申请日:2011-12-30

    IPC分类号: G06F12/00

    摘要: Methods and systems are disclosed herein for storing data in a memory device. Data for multiple pages is written in parallel using plane interleaving. For example, in a four plane write, a first set of four pages are written in the following sequence: 0, 1, 2, 3. A second set of four pages, after plane interleaving, are written in the following sequent: 7, 4, 5, 6. After writing the data, the pages of written data are read, page swapped if necessary, and then written into another portion of memory (such as MLC).

    摘要翻译: 本文公开了用于将数据存储在存储器件中的方法和系统。 使用平面交错并行写入多页数据。 例如,在四平面写入中,按照以下顺序写入第一组四页:0,1,2,3。在平面交织之后的第二组四页被写入随后的后续步骤:7, 写入数据后,读取写入数据的页面,如果需要,页面交换,然后写入存储器的另一部分(如MLC)。

    Synchronized maintenance operations in a multi-bank storage system
    55.
    发明授权
    Synchronized maintenance operations in a multi-bank storage system 有权
    在多银行存储系统中进行同步维护操作

    公开(公告)号:US08452911B2

    公开(公告)日:2013-05-28

    申请号:US12895383

    申请日:2010-09-30

    IPC分类号: G06F12/00 G06F12/02

    CPC分类号: G06F12/0246 G06F2212/7205

    摘要: A method and system for managing maintenance operations in a multi-bank non-volatile storage device is disclosed. The method includes receiving a data write command and associated data from a host system for storage in the non-volatile storage device and directing a head of the data write command to a first bank in the and a tail of the data write command to a second bank, where the head of the data write command only includes data having logical block addresses preceding logical block addresses of data in the tail of the data write command. When a status of the first bank delays execution of the data write command the controller executes a second bank maintenance procedure in the second bank while the data write command directed to the first and second banks is pending. The system includes a plurality of banks, where each bank may be associated with the same or different controllers, and the one or more controllers are adapted to execute the method noted above.

    摘要翻译: 公开了一种用于管理多库非易失性存储装置中的维护操作的方法和系统。 该方法包括从主机系统接收数据写入命令和相关联的数据以存储在非易失性存储设备中,并将数据写入命令的头部指向数据写入命令的尾部中的第一个存储体, 其中数据写入命令的头部仅包括具有在数据写入命令的尾部中的数据的逻辑块地址之前的逻辑块地址的数据。 当第一行的状态延迟数据写入命令的执行时,控制器执行第二存储体中的第二存储体维护过程,同时指向第一和第二存储体的数据写入命令正在等待。 该系统包括多个银行,其中每个银行可以与相同或不同的控制器相关联,并且一个或多个控制器适于执行上述方法。

    Methods for forcing an update block to remain sequential
    57.
    发明授权
    Methods for forcing an update block to remain sequential 有权
    强制更新块保持顺序的方法

    公开(公告)号:US08275953B2

    公开(公告)日:2012-09-25

    申请号:US11725720

    申请日:2007-03-19

    IPC分类号: G06F12/06

    CPC分类号: G06F12/0246 G06F2212/7202

    摘要: A method for operating a memory system is provided. In this method, a sequential update block and preexisting data associated with the sequential update block are provided. Here, an option to convert the sequential update block to a chaotic update block also is provided. A write command is received to write data following a previous write command, where the write command and the previous write command have a discontinuity in logical addresses. If a logical address of the write command is different from logical addresses of the preexisting data, then the data are written to the sequential update block. If the logical address of the write command matches one of the logical addresses of the preexisting data, then the sequential update block is converted to a chaotic update block.

    摘要翻译: 提供了一种用于操作存储器系统的方法。 在该方法中,提供顺序更新块和与顺序更新块相关联的预先存在的数据。 这里,还提供将顺序更新块转换为混沌更新块的选项。 接收写入命令以在先前的写入命令之后写入数据,其中写入命令和先前的写入命令在逻辑地址中具有不连续性。 如果写命令的逻辑地址与预先存在的数据的逻辑地址不同,则将数据写入顺序更新块。 如果写入命令的逻辑地址与预先存在的数据的逻辑地址之一匹配,则将顺序更新块转换为混沌更新块。

    Wear Leveling for Non-Volatile Memories: Maintenance of Experience Count and Passive Techniques
    58.
    发明申请
    Wear Leveling for Non-Volatile Memories: Maintenance of Experience Count and Passive Techniques 审中-公开
    非易失性记忆的磨损调平:经验计数和被动技术的维护

    公开(公告)号:US20120191927A1

    公开(公告)日:2012-07-26

    申请号:US13433584

    申请日:2012-03-29

    IPC分类号: G06F12/00

    摘要: Wear leveling techniques for re-programmable non-volatile memory systems, such as a flash EEPROM system, are described. One set of techniques uses “passive” arrangements, where, when a blocks are selected for writing, blocks with relatively low experience count are selected. This can be done by ordering the list of available free blocks based on experience count, with the “coldest” blocks placed at the front of the list, or by searching the free blocks to find a block that is “cold enough”. In another, complementary set of techniques, usable for more standard wear leveling operations as well as for “passive” techniques and other applications where the experience count is needed, the experience count of a block or meta-block is maintained as a block's attribute along its address in the data management structures, such as address tables.

    摘要翻译: 描述了用于可重新编程的非易失性存储器系统(例如闪存EEPROM系统)的磨损均衡技术。 一组技术使用“被动”布置,其中当选择块用于写入时,选择具有相对较低经验计数的块。 这可以通过根据经验计数排序可用空闲块的列表,放置在列表前面的“最冷”块,或通过搜索空闲块来查找“足够冷”的块。 在另一种可用于更标准的磨损均衡操作以及需要经验计数的“被动”技术和其他应用程序的技术的补充技术中,块或元块的体验计数被保持为块的属性 其地址在数据管理结构中,如地址表。

    SYNCHRONIZED MAINTENANCE OPERATIONS IN A MULTI-BANK STORAGE SYSTEM
    59.
    发明申请
    SYNCHRONIZED MAINTENANCE OPERATIONS IN A MULTI-BANK STORAGE SYSTEM 有权
    多银行存储系统中的同步维护操作

    公开(公告)号:US20120084489A1

    公开(公告)日:2012-04-05

    申请号:US12895383

    申请日:2010-09-30

    IPC分类号: G06F12/00 G06F12/02

    CPC分类号: G06F12/0246 G06F2212/7205

    摘要: A method and system for managing maintenance operations in a multi-bank non-volatile storage device is disclosed. The method includes receiving a data write command and associated data from a host system for storage in the non-volatile storage device and directing a head of the data write command to a first bank in the and a tail of the data write command to a second bank, where the head of the data write command only includes data having logical block addresses preceding logical block addresses of data in the tail of the data write command. When a status of the first bank delays execution of the data write command the controller executes a second bank maintenance procedure in the second bank while the data write command directed to the first and second banks is pending. The system includes a plurality of banks, where each bank may be associated with the same or different controllers, and the one or more controllers are adapted to execute the method noted above.

    摘要翻译: 公开了一种用于管理多库非易失性存储装置中的维护操作的方法和系统。 该方法包括从主机系统接收数据写入命令和相关联的数据以存储在非易失性存储设备中,并将数据写入命令的头指向数据写入命令的尾部中的第一个存储体, 其中数据写入命令的头部仅包括具有在数据写入命令的尾部中的数据的逻辑块地址之前的逻辑块地址的数据。 当第一行的状态延迟数据写入命令的执行时,控制器执行第二存储体中的第二存储体维护过程,同时指向第一和第二存储体的数据写入命令正在等待。 该系统包括多个银行,其中每个银行可以与相同或不同的控制器相关联,并且一个或多个控制器适于执行上述方法。

    Non-volatile memory and method with non-sequential update block management
    60.
    发明授权
    Non-volatile memory and method with non-sequential update block management 有权
    非易失性存储器和非顺序更新块管理方法

    公开(公告)号:US08103841B2

    公开(公告)日:2012-01-24

    申请号:US12239489

    申请日:2008-09-26

    IPC分类号: G06F12/16

    摘要: In a nonvolatile memory with block management system that supports update blocks with non-sequential logical units, an index of the logical units in a non-sequential update block is buffered in RAM and stored periodically into the nonvolatile memory. In one embodiment, the index is stored in a block dedicated for storing indices. In another embodiment, the index is stored in the update block itself. In yet another embodiment, the index is stored in the header of each logical unit. In another aspect, the logical units written after the last index update but before the next have their indexing information stored in the header of each logical unit. In this way, after a power outage, the location of recently written logical units can be determined without having to perform a scanning during initialization. In yet another aspect, a block is managed as partially sequential and partially non-sequential, directed to more than one logical subgroup.

    摘要翻译: 在具有支持具有非顺序逻辑单元的更新块的块管理系统的非易失性存储器中,非顺序更新块中的逻辑单元的索引被缓冲在RAM中并被周期性地存储到非易失性存储器中。 在一个实施例中,索引被存储在专用于存储索引的块中。 在另一个实施例中,索引被存储在更新块本身中。 在另一个实施例中,索引被存储在每个逻辑单元的标题中。 在另一方面,在最后一个索引更新之后但在下一个之前写入的逻辑单元将其索引信息存储在每个逻辑单元的标题中。 以这种方式,在断电之后,可以确定最近写入的逻辑单元的位置,而不必在初始化期间执行扫描。 在另一方面,块被部署顺序地且部分地非顺序地管理,定向到多于一个的逻辑子组。