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公开(公告)号：US08780017B2
公开(公告)日：2014-07-15
申请号：US13377723
申请日：2010-02-24
IPC分类号： G09G3/30
CPC分类号： G09G3/3655 , G09G3/3614 , G09G3/3677 , G09G2300/0852 , G09G2300/0876
摘要： A display driving circuit which carries out CC driving is configured such that a polarity of a data signal to be supplied to a source line is reversed every two horizontal scanning periods and a signal electric potential written from the source line to a pixel electrode changes in a different direction every two adjacent rows. In at least one example embodiment, this allows, in a display device which carries out CC driving, enhancement of a display quality by removing lateral stripes that are produced in a display video while n-line reversal driving is being carried out.
摘要翻译： 执行CC驱动的显示驱动电路被配置为使得每两个水平扫描周期提供给源极线的数据信号的极性反转，并且从源极线写入像素电极的信号电位在 不同方向每两个相邻的行。 在至少一个示例性实施例中，这允许在执行CC驱动的显示设备中，通过去除正在进行n线反转驱动的显示视频中产生的横向条纹来提高显示质量。
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52.发明申请公开(公告)号：US20130156148A1
公开(公告)日：2013-06-20
申请号：US13819046
申请日：2011-08-31
CPC分类号： H03K3/02 , G09G3/3677 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A flip-flop of the present invention includes: an input terminal; an output terminal; a first control signal terminal and a second control signal terminal; a first output section including a bootstrap capacitor, the first output section being connected to the first control signal terminal and the output terminal; a second output section connected to a first output section source and the output terminal; a first input section connected to the input terminal, the first input section charging the bootstrap capacitor; a discharge section discharging the bootstrap capacitor; a second input section connected to the input terminal, the second input section being also connected to the second output section; a reset section controlling the discharge section and the second output section, the reset section being connected to the second control signal terminal; a first initialization section controlling the first output section; a second initialization section controlling the first input section; and a third initialization section controlling the discharge section and the second output section. This makes it possible to realize a shift register capable of performing an all-ON operation regardless of clock signals.
摘要翻译： 本发明的触发器包括：输入端子; 输出端子; 第一控制信号端和第二控制信号端; 第一输出部分，包括自举电容器，第一输出部分连接到第一控制信号端子和输出端子; 连接到第一输出部分源和输出端的第二输出部分; 连接到所述输入端子的第一输入部分，所述第一输入部分对所述自举电容器充电; 放电部，使自举电容器放电; 连接到所述输入端子的第二输入部分，所述第二输入部分也连接到所述第二输出部分; 控制所述放电部和所述第二输出部的复位部，所述复位部与所述第二控制信号端子连接; 控制所述第一输出部的第一初始化部; 控制所述第一输入部的第二初始化部; 以及控制排出部和第二输出部的第三初始化部。 这使得可以实现无论时钟信号如何执行全导通操作的移位寄存器。
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53.发明申请SIGNAL OUTPUT CIRCUIT, SHIFT REGISTER, OUTPUT SIGNAL GENERATING METHOD, DISPLAY DEVICE DRIVING CIRCUIT, AND DISPLAY DEVICE 有权信号输出电路，移位寄存器，输出信号生成方法，显示装置驱动电路和显示装置公开(公告)号：US20130069920A1
公开(公告)日：2013-03-21
申请号：US13674541
申请日：2012-11-12
摘要： A signal output circuit of the present invention is provided in a unit stage of a shift register. The signal output circuit includes a set-reset flip-flop, and a signal generation circuit for generating an output signal by loading or blocking a clock signal in accordance with a signal inputted thereto. The signal output circuit is arranged such that: the signal generation circuit receives a signal outputted from the flip-flop and the output signal fed back to the signal generating circuit; and the output signal is fed back to a reset input of the flip-flop. This makes it possible to achieve a reduction in the area of the circuit and a simplification of the circuit.
摘要翻译： 本发明的信号输出电路设置在移位寄存器的单元级中。 信号输出电路包括设置复位触发器和信号产生电路，用于根据输入的信号通过加载或阻塞时钟信号来产生输出信号。 信号输出电路被布置为：信号发生电路接收从触发器输出的信号和反馈到信号发生电路的输出信号; 并将输出信号反馈到触发器的复位输入。 这使得可以实现电路面积的减小和电路的简化。
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公开(公告)号：US20120092317A1
公开(公告)日：2012-04-19
申请号：US13377723
申请日：2010-02-24
IPC分类号： G09G5/00
CPC分类号： G09G3/3655 , G09G3/3614 , G09G3/3677 , G09G2300/0852 , G09G2300/0876
摘要： A display driving circuit which carries out CC driving is configured such that a polarity of a data signal to be supplied to a source line is reversed every two horizontal scanning periods and a signal electric potential written from the source line to a pixel electrode changes in a different direction every two adjacent rows. In at least one example embodiment, this allows, in a display device which carries out CC driving, enhancement of a display quality by removing lateral stripes that are produced in a display video while n-line reversal driving is being carried out.
摘要翻译： 执行CC驱动的显示驱动电路被配置为使得每两个水平扫描周期提供给源极线的数据信号的极性反转，并且从源极线写入像素电极的信号电位在 不同方向每两个相邻的行。 在至少一个示例性实施例中，这允许在执行CC驱动的显示设备中，通过去除正在进行n线反转驱动的显示视频中产生的横向条纹来提高显示质量。
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公开(公告)号：US09218775B2
公开(公告)日：2015-12-22
申请号：US13501174
申请日：2010-06-04
CPC分类号： G09G3/3614 , G09G3/3655 , G09G2310/0267
摘要： A display device employing CC driving switches from (i) a first mode in which to carry out a display by converting resolution of a video signal by a factor of 2 in a column-wise direction to (ii) a second mode in which to carry out a display at the resolution of the video signal. During the first mode, signal potentials having the same polarity and the same gray scale are supplied to pixel electrodes included in respective two pixels that correspond to two adjacent scanning signal lines and that are adjacent to each other in the column-wise direction, and a direction of change in the signal potentials written to the pixel electrodes varies every two adjacent rows (2-line inversion driving). During the second mode, the direction of change in the signal potentials written to the pixel electrodes lines varies every single row (1-line inversion driving).
摘要翻译： 一种采用CC驱动开关的显示装置，其从（i）第一模式，其中通过将视频信号的分辨率在列方向上转换为因子2来执行显示，以（ii）携带的第二模式 以视频信号的分辨率输出显示。 在第一模式中，具有相同极性和相同灰度的信号电位被提供给包括在相应于两个相邻扫描信号线并且在列方向上彼此相邻的两个像素中的像素电极，并且 写入像素电极的信号电位的变化方向每两个相邻行（2行反转驱动）变化。 在第二模式中，写入像素电极线的信号电位的变化方向每一行变化（1行反转驱动）。
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56.发明授权Transistor circuit, flip-flop, signal processing circuit, driver circuit, and display device 有权晶体管电路，触发器，信号处理电路，驱动电路和显示装置公开(公告)号：US09030237B2
公开(公告)日：2015-05-12
申请号：US13818693
申请日：2011-09-01
IPC分类号： H03B1/00 , H03K3/00 , H03K17/687 , G09G3/36 , H03K19/017 , H01L27/12 , H03K3/356
CPC分类号： H03K17/687 , G09G3/3677 , G09G2300/0426 , G09G2310/0286 , H01L27/124 , H01L27/1255 , H03K3/356008 , H03K3/356026 , H03K19/01714
摘要： A transistor circuit includes at least one transistor, wherein at least part of a connecting portion that connects the transistor (Tr1) and a power supply line (33) is formed from a material of which a channel of the transistor (Tr1) is made. This configuration reduces a circuit area of the transistor circuit.
摘要翻译： 晶体管电路包括至少一个晶体管，其中连接晶体管（Tr1）和电源线（33）的连接部分的至少一部分由形成晶体管（Tr1）的沟道的材料形成。 该配置减小了晶体管电路的电路面积。
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公开(公告)号：US08923472B2
公开(公告)日：2014-12-30
申请号：US13819046
申请日：2011-08-31
CPC分类号： H03K3/02 , G09G3/3677 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： A flip-flop of the present invention includes: an input terminal; an output terminal; a first control signal terminal and a second control signal terminal; a first output section including a bootstrap capacitor, the first output section being connected to the first control signal terminal and the output terminal; a second output section connected to a first output section source and the output terminal; a first input section connected to the input terminal, the first input section charging the bootstrap capacitor; a discharge section discharging the bootstrap capacitor; a second input section connected to the input terminal, the second input section being also connected to the second output section; a reset section controlling the discharge section and the second output section, the reset section being connected to the second control signal terminal; a first initialization section controlling the first output section; a second initialization section controlling the first input section; and a third initialization section controlling the discharge section and the second output section. This makes it possible to realize a shift register capable of performing an all-ON operation regardless of clock signals.
摘要翻译： 本发明的触发器包括：输入端子; 输出端子; 第一控制信号端和第二控制信号端; 第一输出部分，包括自举电容器，第一输出部分连接到第一控制信号端子和输出端子; 连接到第一输出部分源和输出端的第二输出部分; 连接到所述输入端子的第一输入部分，所述第一输入部分对所述自举电容器充电; 放电部，使自举电容器放电; 连接到所述输入端子的第二输入部分，所述第二输入部分也连接到所述第二输出部分; 控制所述放电部和所述第二输出部的复位部，所述复位部与所述第二控制信号端子连接; 控制所述第一输出部的第一初始化部; 控制所述第一输入部的第二初始化部; 以及控制排出部和第二输出部的第三初始化部。 这使得可以实现无论时钟信号如何执行全导通操作的移位寄存器。
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公开(公告)号：US20130155044A1
公开(公告)日：2013-06-20
申请号：US13818462
申请日：2011-08-30
IPC分类号： G11C19/28
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/0286
摘要： A unit circuit (11) includes: a transistor (T2) having its drain terminal to be supplied with a clock signal (CK) and its source terminal connected to an output terminal (OUT); a transistor (T9) which, when supplied with an active all-on control signal (AON), outputs an ON voltage to the output terminal (OUT), and which, when supplied with a nonactive all-on control signal (AONB), stops outputting the ON voltage; a transistor (T1) which supplies the ON voltage to a control terminal of the transistor (T2) in accordance with an input signal (IN); a transistor (T4) which, when supplied with the active all-on control signal (AON), supplies an OFF voltage to a control terminal of the transistor (T2). This makes it possible to provide a shift register of a simple structure that can prevent a malfunction from occurring after all-on operation, and to provide a display device.
摘要翻译： 单元电路（11）包括：晶体管（T2），其漏极端子被提供有时钟信号（CK），其源极端子连接到输出端子（OUT）; 当提供有源全通控制信号（AON）时，将晶体管（T9）输出到输出端（OUT）的导通电压，并且当被提供有非活动全通控制信号（AONB）时， 停止输出ON电压; 晶体管（T1），其根据输入信号（IN）将导通电压提供给晶体管（T2）的控制端子; 当提供有源全通控制信号（AON）时，晶体管（T4）向晶体管（T2）的控制端提供OFF电压。 这使得可以提供能够防止在全部操作之后发生故障的简单结构的移位寄存器，并且提供显示装置。
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59.发明申请TRANSISTOR CIRCUIT, FLIP-FLOP, SIGNAL PROCESSING CIRCUIT, DRIVER CIRCUIT, AND DISPLAY DEVICE 有权晶体管电路，FLOP-FLOP，信号处理电路，驱动电路和显示装置公开(公告)号：US20130147524A1
公开(公告)日：2013-06-13
申请号：US13818693
申请日：2011-09-01
IPC分类号： H03K17/687
CPC分类号： H03K17/687 , G09G3/3677 , G09G2300/0426 , G09G2310/0286 , H01L27/124 , H01L27/1255 , H03K3/356008 , H03K3/356026 , H03K19/01714
摘要： A transistor circuit includes at least one transistor, wherein at least part of a connecting portion that connects the transistor (Tr1) and a power supply line (33) is formed from a material of which a channel of the transistor (Tr1) is made. This configuration reduces a circuit area of the transistor circuit.
摘要翻译： 晶体管电路包括至少一个晶体管，其中连接晶体管（Tr1）和电源线（33）的连接部分的至少一部分由形成晶体管（Tr1）的沟道的材料形成。 该配置减小了晶体管电路的电路面积。
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公开(公告)号：US08427206B2
公开(公告)日：2013-04-23
申请号：US12734691
申请日：2008-08-19
IPC分类号： H03K3/00
CPC分类号： G09G3/3677 , G09G2310/0291 , G09G2330/021 , H03K19/0013 , H03K19/01714 , H03K19/018507 , H03K19/09441
摘要： A single-phase input including transistors all of which have only a single type of channel polarity, which buffer includes: a buffer section 32, including a first series circuit formed by two n-channel transistors connected to each other in series, a second series circuit formed by two n-channel transistors connected to each other in series at a connection point OUT, and a capacitor; and an inverted-signal generating section for generating an inverted-signal from an input signal, the inverted-signal generating section including n-channel transistors but no p-channel transistor, the input signal being inputted to respective gates of the transistors, the inverted-signal being inputted to a gate of the transistor 4, and an output signal being outputted via the connection point OUT. With the buffer, it is possible that a consumption current be reduced and a current drive for a load is enhanced.
摘要翻译： 包括晶体管的单相输入，所述晶体管仅具有单一类型的沟道极性，该缓冲器包括：缓冲器部分32，包括由串联连接的两个n沟道晶体管构成的第一串联电路，第二系列 由在连接点OUT处彼此串联连接的两个n沟道晶体管形成的电路，以及电容器; 以及反相信号生成部，用于从输入信号产生反相信号，所述反相信号生成部包括n沟道晶体管，但不包括p沟道晶体管，所述输入信号被输入到所述晶体管的各个栅极，所述反相信号生成部 信号被输入到晶体管4的栅极，并且输出信号经由连接点OUT输出。 使用缓冲器，可以减少消耗电流并且增加用于负载的电流驱动。
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