公开(公告)号：US09294654B2

公开(公告)日：2016-03-22

申请号：US12446760

申请日：2007-09-26

申请人： Masayuki Tanaka ,  Masatoshi Okutomi

发明人： Masayuki Tanaka ,  Masatoshi Okutomi

IPC分类号： G06K9/32 ,  H04N1/387 ,  G06T1/00 ,  G06T3/40

CPC分类号： H04N1/3871 ,  G06T1/0007 ,  G06T3/4069

摘要： The present invention provides a high-resolution image generation method which is capable of generating a high-resolution image from multiple low-resolution images having displacements without using an iterative computation.A high-resolution image generation method for generating a high-resolution image from multiple low-resolution images having displacements, comprises a first step of performing a registration processing of multiple low-resolution images; a second step of generating an average image having the undefined pixels and a weighted image based on the displacement information obtained by the registration processing and multiple low-resolution images; and a third step of generating the high-resolution image by estimating pixel values of the undefined pixels included in the average image.

摘要翻译： 本发明提供一种高分辨率图像生成方法，其能够从具有位移的多个低分辨率图像生成高分辨率图像，而不使用迭代计算。 一种用于从具有位移的多个低分辨率图像生成高分辨率图像的高分辨率图像生成方法，包括执行多个低分辨率图像的注册处理的第一步骤; 基于通过登记处理和多个低分辨率图像获得的位移信息，生成具有未定义像素的平均图像和加权图像的第二步骤; 以及第三步骤，通过估计包括在平均图像中的未定义像素的像素值来产生高分辨率图像。

公开(公告)号：US09117665B2

公开(公告)日：2015-08-25

申请号：US13601266

申请日：2012-08-31

申请人： Masayuki Tanaka

发明人： Masayuki Tanaka

IPC分类号： H01L29/792 ,  H01L21/02 ,  H01L21/28 ,  H01L27/115

CPC分类号： H01L21/02329 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/792

摘要： In accordance with an embodiment, a nonvolatile semiconductor memory device includes a substrate including a semiconductor layer including an active region, a first insulating film on the active region, a charge storage layer on the first insulating film, an element isolation insulating film defining the active region, a second insulating film, and a control electrode on the second insulating film. The top surface of the element isolation insulating film is placed at a height between the top surface and the bottom surface of the charge storage layer, thereby forming a step constituted of the charge storage layer and the element isolation insulating film. The second insulating film covers the step and the charge storage layer. The second insulating film includes a first silicon oxide film and a first silicon nitride film on the first silicon oxide film. Nitrogen concentration in the first silicon nitride film is non-uniform.

摘要翻译： 根据一个实施例，一种非易失性半导体存储器件包括：衬底，该衬底包括具有有源区的半导体层，有源区上的第一绝缘膜，第一绝缘膜上的电荷存储层，限定有源区的元件隔离绝缘膜 区域，第二绝缘膜和第二绝缘膜上的控制电极。 元件隔离绝缘膜的上表面被放置在电荷存储层的顶表面和底表面之间的高度处，从而形成由电荷存储层和元件隔离绝缘膜构成的步骤。 第二绝缘膜覆盖步骤和电荷存储层。 第二绝缘膜包括在第一氧化硅膜上的第一氧化硅膜和第一氮化硅膜。 第一氮化硅膜中的氮浓度不均匀。

公开(公告)号：US08952445B2

公开(公告)日：2015-02-10

申请号：US13601372

申请日：2012-08-31

申请人： Masayuki Tanaka ,  Kazuhiro Matsuo

发明人： Masayuki Tanaka ,  Kazuhiro Matsuo

IPC分类号： H01L29/792 ,  H01L21/28 ,  H01L27/115

CPC分类号： H01L29/792 ,  H01L21/28273 ,  H01L27/11521

摘要： According to one embodiment, a nonvolatile semiconductor memory device has a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge storage film formed on the first insulating film, a second insulating film formed on the charge storage film, and a control electrode formed on the second insulating film. In the nonvolatile semiconductor memory device, the second insulating film has a laminated structure that has a first silicon oxide film, a first silicon nitride film, and a second silicon oxide film, a first atom is provided at an interface between the first silicon oxide film and the first silicon nitride film, and/or at an interface between the second silicon oxide film and the first silicon nitride film, and the first atom is selected from the group consisting of aluminum, boron, and alkaline earth metals.

摘要翻译： 根据一个实施例，非易失性半导体存储器件具有半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的电荷存储膜，形成在电荷存储膜上的第二绝缘膜，以及控制 电极形成在第二绝缘膜上。 在非易失性半导体存储器件中，第二绝缘膜具有层叠结构，该叠层结构具有第一氧化硅膜，第一氮化硅膜和第二氧化硅膜，第一原子设置在第一氧化硅膜 和/或在第二氧化硅膜和第一氮化硅膜之间的界面处，并且第一原子选自铝，硼和碱土金属。

公开(公告)号：US08941168B2

公开(公告)日：2015-01-27

申请号：US13423633

申请日：2012-03-19

申请人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

发明人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Hirofumi Iikawa

IPC分类号： H01L29/788 ,  H01L29/423 ,  H01L21/28 ,  H01L27/115 ,  H01L29/66 ,  H01L21/762

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L21/76232 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/7881

摘要： A semiconductor device includes an element isolation region having an element isolation insulating film therein; an active region delineated by the element isolation region; agate insulating film formed in the active region; a charge storage layer above the gate insulating film; and an interelectrode insulating film. The interelectrode insulating film is formed in a first region above an upper surface of the element isolation insulating film, a second region along a sidewall of the charge storage layer, and a third region above an upper surface of the charge storage layer. The interelectrode insulating film includes a stack of a first silicon oxide film, a first silicon nitride film, a second silicon oxide film, and a second silicon nitride film. A control electrode layer is formed above the interelectrode insulating film. The second silicon oxide film is thinner in the first region than in the third region.

摘要翻译： 半导体器件包括其中具有元件隔离绝缘膜的元件隔离区域; 由元件隔离区域划定的活动区域; 形成在活性区域中的玛瑙绝缘膜; 栅极绝缘膜上方的电荷存储层; 和电极间绝缘膜。 电极间绝缘膜形成在元件隔离绝缘膜的上表面上方的第一区域，沿着电荷存储层的侧壁的第二区域和电荷存储层的上表面上方的第三区域。 电极间绝缘膜包括第一氧化硅膜，第一氮化硅膜，第二氧化硅膜和第二氮化硅膜的堆叠。 在电极间绝缘膜的上方形成控制电极层。 第二氧化硅膜在第一区域比在第三区域薄。

公开(公告)号：US08823286B2

公开(公告)日：2014-09-02

申请号：US13614232

申请日：2012-09-13

申请人： Toshihiko Sasai ,  Hirokazu Otake ,  Katsuyuki Kobayashi ,  Masayuki Tanaka

发明人： Toshihiko Sasai ,  Hirokazu Otake ,  Katsuyuki Kobayashi ,  Masayuki Tanaka

IPC分类号： H05B37/02

CPC分类号： H05B33/0815

摘要： According to one embodiment, a control section receives supply of control power from a control power supply section through a capacitive element and divides, a period of each half cycle of an alternating-current voltage into a first section, a second section, and a third section. In the first section, the control section subjects a switch section to conduction control to supply electric power to a load and stops a converting action of the control power supply section. In the second section, the control section subjects the switch section to non-conduction control to interrupt the power supply to the load and stops the converting action of the control power supply section. In the third section, the control section subjects the switch section to the non-conduction control to interrupt the power supply to the load and causes the converting action of the control power supply to operate.

摘要翻译： 根据一个实施例，控制部分通过电容元件接收来自控制电源部分的控制电力供应，并将交流电压的每个半周期的周期划分成第一部分，第二部分和第三部分 部分。 在第一部分中，控制部使开关部进行导通控制以向负载供电，并停止控制电源部的转换动作。 在第二部分中，控制部分使开关部分进行非导通控制以中断对负载的电源，并停止控制电源部分的转换动作。 在第三部分中，控制部分使开关部分对非导通控制进行中断对负载的电源，并使控制电源的转换动作起作用。

公开(公告)号：US08648097B2

公开(公告)日：2014-02-11

申请号：US12922028

申请日：2009-03-12

申请人： Ryo Iwamura ,  Masayuki Tanaka ,  Tetsushi Katsube ,  Manabu Shigetomi ,  Eiji Okanari ,  Yasunori Tokunaga ,  Hiroshi Fujiwara

发明人： Ryo Iwamura ,  Masayuki Tanaka ,  Tetsushi Katsube ,  Manabu Shigetomi ,  Eiji Okanari ,  Yasunori Tokunaga ,  Hiroshi Fujiwara

IPC分类号： A61K31/4439 ,  C07D401/14

CPC分类号： C07D417/14 ,  A61K9/0053 ,  A61K9/2018 ,  A61K9/4858 ,  C07D213/74 ,  C07D401/14 ,  C07D405/14 ,  C07D409/14 ,  C07D417/12

摘要： The present invention provides a novel pyridylaminoacetic acid compound represented by the following formula (1): (wherein R1, R2, R3, Y and Z are as defined in the description and claims), or a pharmacologically acceptable salt thereof. The pyridylaminoacetic acid compound has EP2 agonistic action and is therefore useful as a therapeutic and/or prophylactic agent for respiratory diseases such as asthma or chronic obstructive pulmonary disease.

摘要翻译： 本发明提供由下式（1）表示的新颖的吡啶基氨基乙酸化合物或其药学上可接受的盐，其中R1，R2，R3，Y和Z如说明书和权利要求中所定义。 吡啶基氨基乙酸化合物具有EP2激动作用，因此可用作呼吸系统疾病如哮喘或慢性阻塞性肺疾病的治疗和/或预防剂。

公开(公告)号：US08466022B2

公开(公告)日：2013-06-18

申请号：US13052456

申请日：2011-03-21

申请人： Masayuki Tanaka

发明人： Masayuki Tanaka

IPC分类号： H01L21/336 ,  H01L29/792

CPC分类号： H01L29/7881 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66825

摘要： According to one embodiment, a semiconductor memory device includes a semiconductor substrate, a tunnel insulating film, a first electrode, an interelectrode insulating film and a second electrode. The tunnel insulating film is provided on the semiconductor substrate. The first electrode is provided on the tunnel insulating film. The interelectrode insulating film is provided on the first electrode. The second electrode is provided on the interelectrode insulating film. The interelectrode insulating film includes a stacked insulating layer, a charge storage layer and a block insulating layer. The charge storage layer is provided on the stacked insulating layer. The block insulating layer is provided on the charge storage layer. The stacked insulating layer includes a first insulating layer, a quantum effect layer and a second insulating layer. The quantum effect layer is provided on the first insulating layer. The second insulating layer is provided on the quantum effect layer.

摘要翻译： 根据一个实施例，半导体存储器件包括半导体衬底，隧道绝缘膜，第一电极，电极间绝缘膜和第二电极。 隧道绝缘膜设置在半导体衬底上。 第一电极设置在隧道绝缘膜上。 电极间绝缘膜设置在第一电极上。 第二电极设置在电极间绝缘膜上。 电极间绝缘膜包括堆叠绝缘层，电荷存储层和块绝缘层。 电荷存储层设置在堆叠绝缘层上。 块绝缘层设置在电荷存储层上。 层叠绝缘层包括第一绝缘层，量子效应层和第二绝缘层。 量子效应层设置在第一绝缘层上。 第二绝缘层设置在量子效应层上。

公开(公告)号：US20130094781A1

公开(公告)日：2013-04-18

申请号：US13578537

申请日：2011-02-10

申请人： Shunichi Koga ,  Masayuki Tanaka ,  Masatoshi Okutomi

发明人： Shunichi Koga ,  Masayuki Tanaka ,  Masatoshi Okutomi

IPC分类号： G06T3/40

CPC分类号： G06T3/4007 ,  G06T3/4053 ,  H04N1/3871 ,  H04N1/40068 ,  H04N1/4092 ,  H04N5/23235

摘要： [Problem]An object of the present invention is to provide an image processing apparatus used for acquisition aid of optimal low-resolution image set for super-resolution processing.[Means for solving the problem]The image processing apparatus of the present invention comprises a processing unit for computing displacement amounts between a basis image and each reference image, a processing unit for generating a plurality of deformed images based on the displacement amounts, the basis image and a plurality of reference images, a processing unit for setting a threshold of a parameter used at the time of image information selection, a processing unit for selecting image information used in the super-resolution processing from the reference image by using the threshold of the parameter, a processing unit for generating composed images and weighted images based on the basis image, the displacement amounts and the image information, a processing unit for generating high-resolution grid images by dividing the composed image by the weighted image, a processing unit for generating simplified interpolation images based on high-resolution grid images, a processing unit for generating an image characteristic amount, a processing unit for displaying the image characteristic amount, and a control unit that respectively controls a processing concerning the image input, a processing concerning the basis image selection, a processing concerning the reference image selection and a processing concerning the threshold setting of the parameter as necessary.

摘要翻译： 本发明的目的是提供一种用于超分辨率处理的最佳低分辨率图像集的获取辅助的图像处理装置。 解决问题的手段本发明的图像处理装置包括：处理单元，用于计算基础图像和每个参考图像之间的位移量;处理单元，用于基于位移量产生多个变形图像;基础 图像和多个参考图像，用于设置在图像信息选择时使用的参数的阈值的处理单元，用于从参考图像中选择用于超分辨率处理的图像信息的处理单元， 所述参数，用于基于所述基础图像生成合成图像和加权图像的处理单元，所述位移量和所述图像信息，用于通过将所述合成图像除以所述加权图像来生成高分辨率网格图像的处理单元，处理单元 用于生成基于高分辨率网格图像的简化插值图像的处理单元 产生图像特征量，用于显示图像特征量的处理单元，以及分别控制与图像输入有关的处理的控制单元，关于基础图像选择的处理，关于参考图像选择的处理以及关于图像特征量的处理 根据需要设定参数的阈值。

公开(公告)号：US20130053217A1

公开(公告)日：2013-02-28

申请号：US13586264

申请日：2012-08-15

申请人： Masayuki Tanaka ,  Takeshige Miyazaki

发明人： Masayuki Tanaka ,  Takeshige Miyazaki

IPC分类号： B60W10/02

CPC分类号： F16D48/06 ,  F16D2021/0615 ,  F16D2021/0646 ,  F16D2500/1086 ,  F16D2500/50684 ,  F16D2500/508 ,  F16D2500/7044 ,  Y10T477/75

摘要： The clutch control apparatus includes a first reference value setting portion for setting a first engagement amount reference value of the first and the second clutches and to obtain a target transmitting torque by calculating a target inertia torque by multiplying a target rotation speed change rate of the engine at a speed change operation by an inertia of the engine and subtracting the target inertia torque from the current output torque of the engine to be the target transmitting torque of the first and the second clutches and a second reference value setting portion for setting a second engagement amount reference value by correcting the first engagement amount reference value based on the vehicle speed and the turning radius.

摘要翻译： 离合器控制装置包括第一基准值设定部，用于设定第一和第二离合器的第一接合量基准值，并且通过将发动机的目标转速变化率乘以目标惯性转矩来计算目标惯性转矩，从而获得目标传递转矩 在通过发动机的惯性的变速操作中，从目前的发动机的输出转矩减去目标惯性转矩，作为第一和第二离合器的目标传递转矩，以及第二基准值设定部分，用于设定第二接合 通过基于车速和转弯半径校正第一接合量参考值来量化参考值。

公开(公告)号：US20110298039A1

公开(公告)日：2011-12-08

申请号：US13207149

申请日：2011-08-10

申请人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Takeo Furuhata ,  Koji Nakahara

发明人： Kazuhiro Matsuo ,  Masayuki Tanaka ,  Takeo Furuhata ,  Koji Nakahara

IPC分类号： H01L29/792 ,  H01L29/78

CPC分类号： H01L29/792 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/7881

摘要： A nonvolatile semiconductor memory device includes a semiconductor substrate, a first insulation layer formed on the semiconductor substrate, a charge storage layer formed on the first insulation layer, a second insulation layer formed on the charge storage layer, and a control electrode formed on the second insulation layer. The second insulation layer includes a first silicon oxide film formed above the charge storage layer, a silicon nitride film formed on the first silicon oxide film, a metal oxide film formed on the silicon nitride film, and a nitride film formed on the metal oxide film. The metal oxide film has a relative permittivity of not less than 7.

摘要翻译： 非易失性半导体存储器件包括半导体衬底，形成在半导体衬底上的第一绝缘层，形成在第一绝缘层上的电荷存储层，形成在电荷存储层上的第二绝缘层和形成在第二绝缘层上的控制电极 绝缘层。 第二绝缘层包括在电荷存储层上形成的第一氧化硅膜，形成在第一氧化硅膜上的氮化硅膜，形成在氮化硅膜上的金属氧化物膜，以及形成在金属氧化物膜上的氮化物膜 。 金属氧化物膜的相对介电常数不小于7。