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公开(公告)号：US07913032B1
公开(公告)日：2011-03-22
申请号：US11739816
申请日：2007-04-25
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G06F12/0253 , G06F2212/1016 , G06F2212/7211
摘要： Systems and processes may use a host and an external host. The host may be a portable device that includes a memory, a memory controller, and a communication interface for communication with the external host. The portable device may receive a command signal from the external host and initiate a predetermined amount of wear leveling in response to the command signal.
摘要翻译： 系统和进程可以使用主机和外部主机。 主机可以是包括存储器，存储器控制器和用于与外部主机通信的通信接口的便携式设备。 便携式设备可以从外部主机接收命令信号，并响应于命令信号启动预定量的磨损均衡。
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52.发明授权Reducing connection time for mass storage class peripheral by internally prefetching file data into local cache in response to connection to host 有权通过将文件数据内部预取到本地缓存中以响应与主机的连接，减少大容量存储类外围设备的连接时间公开(公告)号：US07912994B2
公开(公告)日：2011-03-22
申请号：US11342126
申请日：2006-01-27
CPC分类号： G06F3/0679 , G06F3/0611 , G06F3/0655 , G06F17/30132
摘要： Techniques for reducing mount time for a peripheral device connected to an external host device are presented. In some implementations, when a connection is detected, file system data is pre-fetched before a request for such data is sent by the external host device. This allows faster access to the file system data used for initiating read/write communications. In other implementations, in response to a data access command from the external host device, a reply message is delayed from the peripheral device to prevent data access command failures. This delayed response prevents the external host device from pausing before attempting subsequent communication requests.
摘要翻译： 介绍了减少连接到外部主机设备的外设的安装时间的技术。 在一些实现中，当检测到连接时，在由外部主机设备发送对这样的数据的请求之前，预取文件系统数据。 这允许更快地访问用于启动读/写通信的文件系统数据。 在其他实现中，响应于来自外部主机设备的数据访问命令，从外围设备延迟回复消息以防止数据访问命令失败。 该延迟响应防止外部主机设备在尝试后续通信请求之前暂停。
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公开(公告)号：US07861122B2
公开(公告)日：2010-12-28
申请号：US11341359
申请日：2006-01-27
IPC分类号： G06F11/00
CPC分类号： G06F11/0766 , G06F11/073 , G06F11/076 , G06F11/1068 , G11C29/56 , G11C2029/0409
摘要： A host processor is coupled to a memory controller and configurable to retrieve from the memory controller information indicative of the health of a non-volatile memory device operatively coupled to the memory controller. A host system uses the information to monitor the health of the non-volatile memory device.
摘要翻译： 主机处理器耦合到存储器控制器并且可配置为从存储器控制器检索指示可操作地耦合到存储器控制器的非易失性存储器设备的健康状况的信息。 主机系统使用该信息来监视非易失性存储器设备的运行状况。
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公开(公告)号：US20100228909A1
公开(公告)日：2010-09-09
申请号：US12786115
申请日：2010-05-24
CPC分类号： G06F12/0888
摘要： A method for managing data storage is described. The method includes receiving data from an external host at a peripheral storage device, detecting a file system type of the external host, and adapting a caching policy for transmitting the data to a memory accessible by the storage device, wherein the caching policy is based on the detected file system type. The detection of the file system type can be based on the received data. The detection bases can include a size of the received data. In some implementations, the detection of the file system type can be based on accessing the memory for file system type indicators that are associated with a unique file system type. Adapting the caching policy can reduce a number of data transmissions to the memory. The detected file system type can be a file allocation table (FAT) system type.
摘要翻译： 描述用于管理数据存储的方法。 该方法包括在外围存储设备处从外部主机接收数据，检测外部主机的文件系统类型，以及调整缓存策略以将数据发送到由存储设备可访问的存储器，其中缓存策略基于 检测到的文件系统类型。 文件系统类型的检测可以基于接收到的数据。 检测基底可以包括接收数据的大小。 在一些实现中，文件系统类型的检测可以基于访问与唯一文件系统类型相关联的文件系统类型指示符的存储器。 适应缓存策略可以减少对存储器的数据传输。 检测到的文件系统类型可以是文件分配表（FAT）系统类型。
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公开(公告)号：US07793059B2
公开(公告)日：2010-09-07
申请号：US11334293
申请日：2006-01-18
CPC分类号： G06F12/0607 , G06F2212/1028 , G06F2212/2022 , Y02D10/13
摘要： Articles and associated methods and systems relate to selecting read interleaving policies independently of selecting write interleaving policies. In various implementations, the selection may be static or dynamic during operation. In implementations that dynamically select read interleaving policies and write interleaving policies, the selection may be based on various operating conditions, such as temperature, power source, battery voltage, and operating mode. Examples of operating modes may include (1) reading or writing to flash memory when connected to an external power source, (2) reading from flash memory when powered by portable power source (e.g., battery), and (3) writing to flash memory when powered by a portable power source.
摘要翻译： 文章和相关联的方法和系统涉及独立于选择写交错策略来选择读交错策略。 在各种实现中，在操作期间选择可以是静态的或动态的。 在动态地选择读交错策略和写入交错策略的实现中，该选择可以基于各种操作条件，例如温度，电源，电池电压和操作模式。 操作模式的例子可以包括：（1）当连接到外部电源时读取或写入闪存，（2）当由便携式电源（例如，电池）供电时从闪存读取，以及（3）写入闪存 当由便携式电源供电时。
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56.发明申请公开(公告)号：US20100157674A1
公开(公告)日：2010-06-24
申请号：US12715979
申请日：2010-03-02
CPC分类号： G11C5/145 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/30 , G11C2211/5641
摘要： Systems and methods involve the use of a flash memory device having multiple flash memory cells. A first interface is adapted to receive power for selectively programming each flash memory cell. A second interface is adapted to receive power supplied to logic level circuitry to perform the selection of flash memory cells to be supplied with power from the first input during a write operation.
摘要翻译： 系统和方法涉及使用具有多个闪存单元的快闪存储器件。 第一接口适于接收用于选择性地编程每个闪存单元的功率。 第二接口适于接收提供给逻辑电平电路的电力，以在写入操作期间执行从第一输入端被供电的闪存单元的选择。
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57.发明授权Two levels of voltage regulation supplied for logic and data programming voltage of a memory device 有权为存储器件的逻辑和数据编程电压提供两级电压调节公开(公告)号：US07701797B2
公开(公告)日：2010-04-20
申请号：US11694763
申请日：2007-03-30
IPC分类号： G11C5/14
CPC分类号： G11C5/145 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/30 , G11C2211/5641
摘要： Systems and methods involve the use of a flash memory device having multiple flash memory cells. A first interface is adapted to receive power for selectively programming each flash memory cell. A second interface is adapted to receive power supplied to logic level circuitry to perform the selection of flash memory cells to be supplied with power from the first input during a write operation.
摘要翻译： 系统和方法涉及使用具有多个闪存单元的快闪存储器件。 第一接口适于接收用于选择性地编程每个闪存单元的功率。 第二接口适于接收提供给逻辑电平电路的电力，以在写入操作期间执行从第一输入端被供电的闪存单元的选择。
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公开(公告)号：US20100070801A1
公开(公告)日：2010-03-18
申请号：US12624157
申请日：2009-11-23
CPC分类号： G11C16/26 , G11C11/5628 , G11C11/5642 , G11C16/30 , G11C16/3418 , G11C16/3431 , G11C16/349 , G11C29/00 , G11C2211/5641
摘要： Systems and methods, including computer software, for reading data from a flash memory cell involve detecting voltages from a group of memory cells. The group of memory cells have associated metadata for error detection, and each memory cell stores a voltage representing a data value selected from a plurality of possible data values. Each possible data value corresponds to one range of multiple non-overlapping ranges of analog voltages. Memory cells having uncertain data values are identified based on the detected voltages. Alternative data values for the memory cells having the uncertain data values are determined. A combination of alternative data values is selected, and an error detection test is performed using the metadata associated with the memory cells and the selected combination of alternative data values.
摘要翻译： 包括用于从闪存单元读取数据的计算机软件的系统和方法涉及检测来自一组存储器单元的电压。 存储器单元组具有用于错误检测的相关联的元数据，并且每个存储器单元存储表示从多个可能数据值中选择的数据值的电压。 每个可能的数据值对应于模拟电压的多个非重叠范围的一个范围。 基于检测到的电压来识别具有不确定数据值的存储单元。 确定具有不确定数据值的存储单元的替代数据值。 选择替代数据值的组合，并且使用与存储器单元相关联的元数据和所选择的备选数据值的组合来执行错误检测测试。
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公开(公告)号：US07639531B2
公开(公告)日：2009-12-29
申请号：US11694712
申请日：2007-03-30
IPC分类号： G11C11/34
CPC分类号： G11C29/42 , G11C11/5628 , G11C11/5642 , G11C16/04 , G11C16/0483 , G11C16/349 , G11C29/00 , G11C29/028 , G11C29/50 , G11C29/50004 , G11C2211/5641
摘要： A system and method, including computer software, is used to write to a flash memory device that includes multiple memory cells. One or more of the memory cells are written at a first resolution corresponding to a first number of bits of data. A signal to write at a second resolution corresponding to a second number of bits of data is received. One or more of the memory cells are written at the second resolution.
摘要翻译： 使用包括计算机软件的系统和方法来写入包括多个存储器单元的闪存设备。 以与第一数据位数相对应的第一分辨率写入一个或多个存储器单元。 接收以对应于第二数量位数据的第二分辨率写入的信号。 以第二分辨率写入一个或多个存储器单元。
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公开(公告)号：US20070263454A1
公开(公告)日：2007-11-15
申请号：US11694739
申请日：2007-03-30
IPC分类号： G11C16/04
CPC分类号： G11C16/26 , G11C11/5628 , G11C11/5642 , G11C16/30 , G11C16/3418 , G11C16/3431 , G11C16/349 , G11C29/00 , G11C2211/5641
摘要： Systems and methods, including computer software, for reading data from a flash memory cell involve detecting voltages from a group of memory cells. The group of memory cells have associated metadata for error detection, and each memory cell stores a voltage representing a data value selected from a plurality of possible data values. Each possible data value corresponds to one range of multiple non-overlapping ranges of analog voltages. Memory cells having uncertain data values are identified based on the detected voltages. Alternative data values for the memory cells having the uncertain data values are determined. A combination of alternative data values is selected, and an error detection test is performed using the metadata associated with the memory cells and the selected combination of alternative data values.
摘要翻译： 包括用于从闪存单元读取数据的计算机软件的系统和方法涉及检测来自一组存储器单元的电压。 存储器单元组具有用于错误检测的相关联的元数据，并且每个存储器单元存储表示从多个可能数据值中选择的数据值的电压。 每个可能的数据值对应于模拟电压的多个非重叠范围的一个范围。 基于检测到的电压来识别具有不确定数据值的存储单元。 确定具有不确定数据值的存储单元的替代数据值。 选择替代数据值的组合，并且使用与存储器单元相关联的元数据和所选择的备选数据值的组合来执行错误检测测试。
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