公开(公告)号：US20250069929A1

公开(公告)日：2025-02-27

申请号：US18583974

申请日：2024-02-22

Applicant: NGK INSULATORS, LTD.

Inventor： Seiya INOUE ,  Tatsuya KUNO ,  Tomoyuki MINAMI

IPC: H01L21/683 ,  H01J37/32

Abstract: A member for semiconductor manufacturing apparatus includes a ceramic plate having a wafer placement surface on an upper surface, an electrostatic electrode embedded in the ceramic plate, an electrode lead-out portion embedded in the ceramic plate and extending downward from the electrostatic electrode, a terminal hole extending from a lower surface of the ceramic plate to the electrode lead-out portion, a terminal in the terminal hole, a conductive bonding portion located between the terminal and the electrode lead-out portion and bonding the terminal and the electrode lead-out portion together. The terminal hole has a terminal hole tapering surface that tapers toward a bottom of the hole, and the terminal hole tapering surface intersects a lateral surface of the electrode lead-out portion.

公开(公告)号：US20250014939A1

公开(公告)日：2025-01-09

申请号：US18510850

申请日：2023-11-16

Applicant: NGK INSULATORS, LTD.

Inventor： Tatsuya KUNO ,  Seiya INOUE

IPC: H01L21/687 ,  H01L21/67

Abstract: A member for semiconductor manufacturing apparatus includes a ceramic plate in which an electrode is embedded; a power feeder receiving hole extending from a lower surface of the ceramic plate to a position close to the electrode; a power feeder inserted in the power feeder receiving hole; a recess extending from a bottom surface of the power feeder receiving hole to the electrode or an electrode lead-out portion attached to the electrode, the recess having an opening diameter smaller than a diameter of the power feeder receiving hole and greater than or equal to a diameter of the power feeder; a first brazing material layer filling the recess; and a second brazing material layer bonding an entire end surface of the power feeder to the first brazing material layer and not extending to a boundary between the bottom surface and a side surface of the power feeder receiving hole.

公开(公告)号：US20250014875A1

公开(公告)日：2025-01-09

申请号：US18895491

申请日：2024-09-25

Applicant: NGK INSULATORS, LTD.

Inventor： Seiya INOUE ,  Tatsuya KUNO

IPC: H01J37/32

Abstract: A wafer placement table includes a ceramic substrate having a wafer placement surface on an upper surface thereof and containing an electrode therein; a conductive substrate disposed adjacent to a lower surface of the ceramic substrate, serving also as a plasma generating electrode, and having the same diameter as the ceramic substrate; a support substrate disposed adjacent to a lower surface of the conductive substrate, having a greater diameter than the conductive substrate, and electrically insulated from the conductive substrate; and a mounting flange constituting a part of the support substrate and radially extending out of the conductive substrate.

公开(公告)号：US20240364241A1

公开(公告)日：2024-10-31

申请号：US18513850

申请日：2023-11-20

Applicant: NGK INSULATORS, LTD.

Inventor： Taro USAMI ,  Seiya INOUE ,  Tatsuya KUNO ,  Tomoyuki MINAMI

IPC: H02N13/00 ,  H01R4/02

CPC classification number: H02N13/00 ,  H01R4/027 ,  H01L21/6833

Abstract: A feeder member is used to supply electricity to an electrode embedded in a ceramic base. The feeder member includes an electrode-side terminal that is made of a high-melting-point metal containing material and joined to the electrode, an intermediate member that is made of a Cu containing material and directly joined to the electrode-side terminal without using a brazing material, a cable support member that is made of a Cu containing material and joined to the intermediate member, and a cable that is made of a Cu containing material and that has one end whose end surface is welded to the cable support member.

公开(公告)号：US20240079217A1

公开(公告)日：2024-03-07

申请号：US18166652

申请日：2023-02-09

Applicant: NGK Insulators, Ltd.

Inventor： Tatsuya KUNO ,  Taro USAMI ,  Masaki ISHIKAWA

IPC: H01J37/32 ,  H01L21/683

CPC classification number: H01J37/32724 ,  H01L21/6833 ,  H01J2237/002 ,  H01J2237/2007

Abstract: A wafer placement table includes an upper substrate; a lower substrate; a through hole extending through the lower substrate in an up-down direction; a plurality of projections provided in a dot pattern, for example, at an entirety of an upper surface of the lower substrate and being in contact with the lower surface of the upper substrate; a heat dissipation sheet having a projection insertion hole and being disposed between the upper substrate and the lower substrate; a screw hole provided, in the lower surface of the upper substrate, at a position facing the through hole; a screw member inserted from a lower surface of the lower substrate into the through hole and screwed into the screw hole.

公开(公告)号：US20230317430A1

公开(公告)日：2023-10-05

申请号：US18164799

申请日：2023-02-06

Applicant: NGK Insulators, Ltd.

Inventor： Ikuhisa MORIOKA ,  Hiroshi TAKEBAYASHI ,  Tatsuya KUNO ,  Seiya INOUE

IPC: H01J37/32 ,  H01L21/687

CPC classification number: H01J37/32715 ,  H01J37/32642 ,  H01J37/32174 ,  H01L21/68757 ,  H01L21/68785 ,  H01J2237/334 ,  H01J2237/332

Abstract: The wafer placement table includes a ceramic plate and a conductive substrate. The ceramic plate includes a plate annular portion at an outer circumference of a plate central portion having a wafer placement surface. The plate annular portion has an annular focus ring placement surface. The conductive substrate is provided on a lower surface of the ceramic plate and used as a radio-frequency source electrode. At the same height from the focus ring placement surface in the plate annular portion, a focus ring attraction electrode and a focus-ring-side radio-frequency bias electrode to which a bias radio frequency is supplied are embedded.

公开(公告)号：US20230298861A1

公开(公告)日：2023-09-21

申请号：US18052589

申请日：2022-11-04

Applicant: NGK Insulators, Ltd.

Inventor： Seiya INOUE ,  Tatsuya KUNO ,  Tomoki NAGAE ,  Yusuke OGISO ,  Takuya YOTO

IPC: H01J37/32 ,  H01L21/683

CPC classification number: H01J37/3244 ,  H01J37/32724 ,  H01L21/6833

Abstract: A member for semiconductor manufacturing apparatus includes: a ceramic plate having a wafer placement surface on its upper surface; and a porous plug that is disposed in a plug insertion hole penetrating the ceramic plate in a up-down direction, and allows a gas to flow, wherein the porous plug has a first porous member exposed to the wafer placement surface, and a second porous member having an upper surface covered by the first porous member, the first porous member is higher in purity and smaller in thickness than the second porous member, and the second porous member is higher in porosity than the first porous member.

公开(公告)号：US20230197500A1

公开(公告)日：2023-06-22

申请号：US18168032

申请日：2023-02-13

Applicant: NGK Insulators, Ltd.

Inventor： Seiya INOUE ,  Hiroshi TAKEBAYASHI ,  Tatsuya KUNO

IPC: H01L21/687 ,  H01L23/373

CPC classification number: H01L21/68721 ,  H01L23/3731 ,  H01L23/3736

Abstract: A wafer placement table includes a ceramic substrate having a wafer placement surface on an upper surface thereof and containing an electrode therein, a cooling substrate made of a metal-ceramic composite and having a cooling medium passage therein, and a metal joining layer configured to join a lower surface of the ceramic substrate to an upper surface of the cooling substrate. A thickness of a lower part of the cooling substrate below the cooling medium passage is greater than or equal to 13 mm, or greater than or equal to 43% of an overall thickness of the cooling substrate.

公开(公告)号：US20230146001A1

公开(公告)日：2023-05-11

申请号：US17819670

申请日：2022-08-15

Applicant: NGK Insulators, Ltd.

Inventor： Tatsuya KUNO ,  Seiya INOUE

IPC: H01L21/67 ,  H01J37/32

CPC classification number: H01L21/67109 ,  H01J37/32642 ,  H01L21/6833

Abstract: A wafer placement table includes a central ceramic base that has an upper surface including a wafer placement surface, an outer circumferential ceramic base that has an upper surface including a focus ring placement surface, and a cooling base that includes a central portion, an outer circumferential portion, and a coupler that couples the central portion and the outer circumferential portion with each other. The cooling base has a central refrigerant flow path that is formed in the central portion and an outer circumferential refrigerant flow path that is formed in the outer circumferential portion. The coupler has an upward groove that open from an upper surface and that have an annular shape, and a downward groove that opens from a lower surface, that have a ceiling surface higher than a bottom surface of the upward groove, and that have an annular shape.

公开(公告)号：US20230057107A1

公开(公告)日：2023-02-23

申请号：US17805237

申请日：2022-06-03

Applicant: NGK Insulators, Ltd.

Inventor： Hiroshi TAKEBAYASHI ,  Tatsuya KUNO ,  Seiya INOUE

IPC: H01J37/32 ,  C23C16/458

Abstract: A wafer placement table includes a ceramic base, a cooling base, and a bonding layer. The ceramic base includes an outer peripheral part having an annular focus ring placement surface on an outer peripheral side of a central part having a circular wafer placement surface. The cooling base contains metal. The bonding layer bonds the ceramic base with the cooling base. The outer peripheral part of the ceramic base has a thickness of less than or equal to 1 mm and does not incorporate an electrode.