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公开(公告)号:US20230298861A1
公开(公告)日:2023-09-21
申请号:US18052589
申请日:2022-11-04
Applicant: NGK Insulators, Ltd.
Inventor: Seiya INOUE , Tatsuya KUNO , Tomoki NAGAE , Yusuke OGISO , Takuya YOTO
IPC: H01J37/32 , H01L21/683
CPC classification number: H01J37/3244 , H01J37/32724 , H01L21/6833
Abstract: A member for semiconductor manufacturing apparatus includes: a ceramic plate having a wafer placement surface on its upper surface; and a porous plug that is disposed in a plug insertion hole penetrating the ceramic plate in a up-down direction, and allows a gas to flow, wherein the porous plug has a first porous member exposed to the wafer placement surface, and a second porous member having an upper surface covered by the first porous member, the first porous member is higher in purity and smaller in thickness than the second porous member, and the second porous member is higher in porosity than the first porous member.
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公开(公告)号:US20220260518A1
公开(公告)日:2022-08-18
申请号:US17736219
申请日:2022-05-04
Applicant: NGK INSULATORS, LTD.
Inventor: Yusuke OGISO , Yoshimasa KONDO , Katsunao UENISHI
IPC: G01N27/407
Abstract: A sensor element includes: an element base which has a gas inlet in one end portion thereof and into which a measurement gas is introduced through the gas inlet; and a leading-end protective layer disposed around an outer periphery of the element base in a predetermined range from the one end portion, having a laminated structure of: an inner layer having coarse voids with a size of 1 μm or more in a matrix region having a framework structure formed by porous pieces each having fine pores with a pore diameter of 10 nm or more and less than 1 μm; and an outer layer disposed to cover the inner leading-end protective layer, and having a lower porosity than the inner layer, and the inner layer has: an overall porosity of 40% or more and 90% or less; and a coarse porosity of 1% or more and 55% or less.
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公开(公告)号:US20240290646A1
公开(公告)日:2024-08-29
申请号:US18461611
申请日:2023-09-06
Applicant: NGK INSULATORS, LTD.
Inventor: Masaki ISHIKAWA , Tatsuya KUNO , Yusuke OGISO
IPC: H01L21/683 , H01J37/32
CPC classification number: H01L21/6833 , H01J37/32715 , H01J2237/2007
Abstract: A wafer placement table includes: a ceramic plate having a wafer placement surface on an upper surface and a built-in electrode; a plug placement hole extending through the ceramic plate from a lower surface to the upper surface; a plug placed in the plug placement hole and allowing gas to pass therethrough; and a plug joint joining an outer edge of an upper surface of the plug and an upper opening edge of the plug placement hole and covering the outer edge of the upper surface of the plug from above.
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公开(公告)号:US20240007023A1
公开(公告)日:2024-01-04
申请号:US18467882
申请日:2023-09-15
Applicant: NGK INSULATORS, LTD.
Inventor: Yusuke OGISO
IPC: H02N13/00 , C04B35/581 , C04B41/00 , C04B41/53 , B23K26/352
CPC classification number: H02N13/00 , C04B35/581 , C04B41/0036 , C04B41/5346 , B23K26/352 , C04B2235/3865 , C04B2235/3225
Abstract: A member for semiconductor manufacturing apparatus of the present invention includes an AlN ceramic substrate with a surface provided with projections for wafer placement. At least part of an area, provided with no projection, of the AlN ceramic substrate has a surface layer region from the surface to a predetermined depth, and a base material region below the surface layer region. The predetermined depth is 5 μm or less. The oxygen content rate of the surface layer region is higher than the oxygen content rate of the base material region.
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公开(公告)号:US20230238224A1
公开(公告)日:2023-07-27
申请号:US18056802
申请日:2022-11-18
Applicant: NGK Insulators, Ltd.
Inventor: Seiya INOUE , Tatsuya KUNO , Shinya YOSHIDA , Tomoki NAGAE , Yusuke OGISO , Takuya YOTO
IPC: H01J37/32 , H01L21/683
CPC classification number: H01J37/32715 , H01J37/3244 , H01L21/6833 , H01J2237/327
Abstract: A member for semiconductor manufacturing apparatus has a ceramic plate, a porous plug, an insulating lid, and pores. The ceramic plate has a wafer placement surface as an upper surface. The porous plug is disposed in a plug insertion hole penetrating the ceramic plate in an up-down direction, and allows a gas to flow. The insulating lid is provided in contact with an upper surface of the porous plug, and exposed to the wafer placement surface. A plurality of pores are provided in the insulating lid, and penetrate the insulating lid in an up-down direction.
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公开(公告)号:US20210389267A1
公开(公告)日:2021-12-16
申请号:US17411081
申请日:2021-08-25
Applicant: NGK INSULATORS, LTD.
Inventor: Tomoki NAGAE , Yoshimasa KONDO , Yusuke OGISO , Katsunao UENISHI , Atsushi WATANABE , Ayato KOIZUMI
IPC: G01N27/407
Abstract: A sensor element includes an element body and a porous protective layer arranged to cover a part of a surface of the element body. The protective layer includes an inlet protective layer arranged to cover a gas inlet formed in the surface of the element body, and at least a part of a face included in the surface of the element body, the face on which the gas inlet is opens, and an arithmetic average roughness Rap of an inner peripheral surface of an internal space of the inlet protective layer satisfies at least one of conditions below: the arithmetic average roughness Rap is 8 μm or more, and the arithmetic average roughness Rap is higher than an arithmetic average roughness Rac of a bonding surface of the protective layer, the bonding surface at which the protective layer is bonded to the element body.
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公开(公告)号:US20210381999A1
公开(公告)日:2021-12-09
申请号:US17411082
申请日:2021-08-25
Applicant: NGK INSULATORS, LTD.
Inventor: Tomoki NAGAE , Yoshimasa KONDO , Yusuke OGISO , Katsunao UENISHI , Atsushi WATANABE , Ayato KOIZUMI
IPC: G01N27/407
Abstract: A sensor element includes an element body having a measurement-object gas flow section formed therein, and a porous protective layer arranged to cover first to fifth surfaces of the element body. When an external wall that is the thinnest of parts of an external wall which constitute the element body and extend from the measurement-object gas flow section to the first to fifth surfaces is defined as a thinnest external wall and a surface corresponding to the thinnest external wall is defined as a closest surface, a part of the protective layer which covers the closest surface overlaps the entirety of the thinnest external wall when viewed in a direction perpendicular to the closest surface, and has one or more internal spaces formed therein which overlaps 80% or more of the thinnest external wall when viewed in the direction perpendicular to the closest surface.
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