公开(公告)号：US20250018690A1

公开(公告)日：2025-01-16

申请号：US18897101

申请日：2024-09-26

Applicant: NGK INSULATORS, LTD.

Inventor： Tomoki NAGAE ,  Takahiro YAMADERA ,  Kota OZEKI ,  Hirotomo TAKAHAMA

IPC: B32B18/00

Abstract: A joined body includes: a first plate; a second plate of a same type as or a different type from a type of the first plate; an amorphous layer existing at a joint interface between the first plate and the second plate; a first plate alteration layer existing on a side of the first plate in contact with the amorphous layer; and a second plate alteration layer existing on a side of the second plate in contact with the amorphous layer.

公开(公告)号：US20170154697A1

公开(公告)日：2017-06-01

申请号：US15429408

申请日：2017-02-10

Applicant: NGK INSULATORS, LTD.

Inventor： Hiroyuki TSUJI ,  Tomonori TAKAHASHI ,  Yoshimasa KONDO ,  Kazumasa KITAMURA ,  Takayoshi AKAO ,  Tomoki NAGAE

IPC: G21K5/00

CPC classification number: G21K5/00 ,  G21K5/02 ,  H05H1/46 ,  H05H3/02

Abstract: An atomic beam source 10 includes a tubular cathode 20 that includes an emission portion 30 that includes an emission port 32 through which an atomic beam can be emitted, a rod-shaped first anode 40 disposed inside the cathode 20, and a rod-shaped second anode 50 disposed inside the cathode 20 and spaced from the first anode 40. At least one selected from the group consisting of a shape of the cathode, a shape of the first anode, a shape of the second anode, and a positional relationship between the cathode, the first anode, and the second anode is predetermined so that emission of sputter particles resulting from collision of cations, which have been generated by plasma between the first anode and the second anode, with at least one selected from the cathode, the first anode, and the second anode is reduced.

公开(公告)号：US20150086670A1

公开(公告)日：2015-03-26

申请号：US14556516

申请日：2014-12-01

Applicant: NGK Insulators, Ltd.

Inventor： Kazumasa KITAMURA ,  Hirofumi HOSOKAWA ,  Tomoki NAGAE

IPC: B28B3/26 ,  B23P15/24

CPC classification number: B28B3/269 ,  B23P15/243

Abstract: Disclosed is a die for forming a honeycomb structure, including: a second plate-shaped portion that has a second bonded surface, where a back hole for introducing a forming raw material is formed; and a first plate-shaped portion that has a first bonded surface, where a slit communicating with the back hole to form a forming raw material is formed, and a cavity communicating with the back hole and the slit is formed in the first bonded surface side, wherein the first plate-shaped portion is arranged on the second plate-shaped portion, an open end of the cavity on the first bonded surface has a diameter different from that of an open end of the back hole on the second bonded surface, and the open end of the cavity on the first bonded surface is arranged inside the open end of the back hole on the second bonded surface.

Abstract translation: 公开了一种用于形成蜂窝结构的模具，包括：具有第二接合表面的第二板状部分，其中形成用于引入成形原料的后孔; 以及具有第一接合面的第一板状部，形成有与所述后孔连通以形成成形原料的狭缝，并且在所述第一接合面侧形成有与所述后孔和所述狭缝连通的空腔 其特征在于，所述第一板状部配置在所述第二板状部上，所述第一接合面上的所述空腔的开口端的直径与所述第二接合面上的所述后孔的开口端的直径不同， 第一接合表面上的空腔的开口端布置在第二接合表面上的后孔的开口端的内部。

公开(公告)号：US20230238224A1

公开(公告)日：2023-07-27

申请号：US18056802

申请日：2022-11-18

Applicant: NGK Insulators, Ltd.

Inventor： Seiya INOUE ,  Tatsuya KUNO ,  Shinya YOSHIDA ,  Tomoki NAGAE ,  Yusuke OGISO ,  Takuya YOTO

IPC: H01J37/32 ,  H01L21/683

CPC classification number: H01J37/32715 ,  H01J37/3244 ,  H01L21/6833 ,  H01J2237/327

Abstract: A member for semiconductor manufacturing apparatus has a ceramic plate, a porous plug, an insulating lid, and pores. The ceramic plate has a wafer placement surface as an upper surface. The porous plug is disposed in a plug insertion hole penetrating the ceramic plate in an up-down direction, and allows a gas to flow. The insulating lid is provided in contact with an upper surface of the porous plug, and exposed to the wafer placement surface. A plurality of pores are provided in the insulating lid, and penetrate the insulating lid in an up-down direction.

公开(公告)号：US20210389267A1

公开(公告)日：2021-12-16

申请号：US17411081

申请日：2021-08-25

Applicant: NGK INSULATORS, LTD.

Inventor： Tomoki NAGAE ,  Yoshimasa KONDO ,  Yusuke OGISO ,  Katsunao UENISHI ,  Atsushi WATANABE ,  Ayato KOIZUMI

IPC: G01N27/407

Abstract: A sensor element includes an element body and a porous protective layer arranged to cover a part of a surface of the element body. The protective layer includes an inlet protective layer arranged to cover a gas inlet formed in the surface of the element body, and at least a part of a face included in the surface of the element body, the face on which the gas inlet is opens, and an arithmetic average roughness Rap of an inner peripheral surface of an internal space of the inlet protective layer satisfies at least one of conditions below: the arithmetic average roughness Rap is 8 μm or more, and the arithmetic average roughness Rap is higher than an arithmetic average roughness Rac of a bonding surface of the protective layer, the bonding surface at which the protective layer is bonded to the element body.

公开(公告)号：US20210381999A1

公开(公告)日：2021-12-09

申请号：US17411082

申请日：2021-08-25

Applicant: NGK INSULATORS, LTD.

Inventor： Tomoki NAGAE ,  Yoshimasa KONDO ,  Yusuke OGISO ,  Katsunao UENISHI ,  Atsushi WATANABE ,  Ayato KOIZUMI

IPC: G01N27/407

Abstract: A sensor element includes an element body having a measurement-object gas flow section formed therein, and a porous protective layer arranged to cover first to fifth surfaces of the element body. When an external wall that is the thinnest of parts of an external wall which constitute the element body and extend from the measurement-object gas flow section to the first to fifth surfaces is defined as a thinnest external wall and a surface corresponding to the thinnest external wall is defined as a closest surface, a part of the protective layer which covers the closest surface overlaps the entirety of the thinnest external wall when viewed in a direction perpendicular to the closest surface, and has one or more internal spaces formed therein which overlaps 80% or more of the thinnest external wall when viewed in the direction perpendicular to the closest surface.

公开(公告)号：US20170179371A1

公开(公告)日：2017-06-22

申请号：US15449053

申请日：2017-03-03

Applicant: NGK INSULATORS, LTD.

Inventor： Kazumasa KITAMURA ,  Tomoki NAGAE

IPC: H01L41/337 ,  B24B37/10

CPC classification number: H01L41/337 ,  B24B37/10 ,  B81C1/00611 ,  H01L21/30625 ,  H01L21/7684 ,  H01L41/0805 ,  H01L41/18 ,  H01L41/312 ,  H01L41/338 ,  H03H3/02

Abstract: A production method for a composite substrate according to the present invention comprises (a) a step of mirror-polishing a piezoelectric-substrate side of a laminated substrate formed by bonding a piezoelectric substrate and a support substrate; (b) a step of performing machining using an ion beam or a neutral atom beam so that a thickness of an outer peripheral portion of the piezoelectric substrate is larger than a thickness of an inner peripheral portion and a difference between a largest thickness and a smallest thickness of the inner peripheral portion of the piezoelectric substrate is 100 nm or less over an entire surface; and (c) a step of flattening the entire surface of the piezoelectric substrate to remove at least a part of an altered layer formed by the machining using the ion beam or the neutral atom beam in the step (b).

公开(公告)号：US20170170385A1

公开(公告)日：2017-06-15

申请号：US15443023

申请日：2017-02-27

Applicant: NGK INSULATORS, LTD.

Inventor： Tomoki NAGAE ,  Ayato KOIZUMI

IPC: H01L41/337 ,  H01L41/08

CPC classification number: H01L41/337 ,  H01L41/081 ,  H01L41/0815 ,  H01L41/22 ,  H01L41/313 ,  H03H9/02047 ,  H03H9/02574 ,  H03H9/02614

Abstract: A composite substrate according to the present invention includes a support substrate having a diameter of 2 inches or more, and a piezoelectric substrate having a thickness of 20 μm or less and bonded to the support substrate to transmit light. The piezoelectric substrate has a thickness distribution shaped like a fringe. A waveform having an amplitude within a range of 5 to 100 nm in a thickness direction and a pitch within a range of 0.5 to 20 mm in a width direction appears in the thickness distribution of the piezoelectric substrate in a cross section of the composite substrate taken along a line orthogonal to the fringe, and the pitch of the waveform correlates with a width of the fringe. In the piezoelectric substrate, the fringe may include either parallel fringes or spiral or concentric fringes.

公开(公告)号：US20150266155A1

公开(公告)日：2015-09-24

申请号：US14722222

申请日：2015-05-27

Applicant: NGK Insulators, Ltd.

Inventor： Kazumasa KITAMURA ,  Tomoki NAGAE

IPC: B24B9/06

CPC classification number: B24B9/065 ,  B24B7/228 ,  B24B37/044 ,  B24B37/08 ,  B24B37/105 ,  C30B33/00 ,  H01L21/02013

Abstract: A grinding apparatus 10 includes a controller 11 for controlling the entire apparatus, a grinding motor 14, a base metal 15 to be rotated by the grinding motor 14, and a grinding wheel 16 fixed to the base metal 15. In a grinding step, the grinding apparatus 10 is used and a surface 19 of an object to be polished 18 is ground with the grinding wheel 16 rotating at a peripheral speed of 10 m/s or less. In the grinding step, the surface 19 of the object to be polished 18 is preferably ground with the grinding wheel 16 rotating at a peripheral speed of 0.5 m/s or more. In the grinding step, a surface of alumina, sapphire, silicon carbide, or gallium nitride is ground as the object to be polished.

Abstract translation: 研磨装置10包括用于控制整个装置的控制器11，研磨马达14，由研磨马达14旋转的基底金属15以及固定到基底金属15的砂轮16.在研磨步骤中， 研磨装置10被使用，并且被研磨物体18的表面19被研磨，砂轮16以10m / s或更小的圆周速度旋转。 在研磨工序中，被研磨对象物18的表面19优选以砂轮16以0.5m / s以上的圆周速度旋转而研磨。 在研磨步骤中，将氧化铝，蓝宝石，碳化硅或氮化镓的表面研磨为待抛光对象。

公开(公告)号：US20230298861A1

公开(公告)日：2023-09-21

申请号：US18052589

申请日：2022-11-04

Applicant: NGK Insulators, Ltd.

Inventor： Seiya INOUE ,  Tatsuya KUNO ,  Tomoki NAGAE ,  Yusuke OGISO ,  Takuya YOTO

IPC: H01J37/32 ,  H01L21/683

CPC classification number: H01J37/3244 ,  H01J37/32724 ,  H01L21/6833

Abstract: A member for semiconductor manufacturing apparatus includes: a ceramic plate having a wafer placement surface on its upper surface; and a porous plug that is disposed in a plug insertion hole penetrating the ceramic plate in a up-down direction, and allows a gas to flow, wherein the porous plug has a first porous member exposed to the wafer placement surface, and a second porous member having an upper surface covered by the first porous member, the first porous member is higher in purity and smaller in thickness than the second porous member, and the second porous member is higher in porosity than the first porous member.