Transistor microstructure
    51.
    发明授权
    Transistor microstructure 失效
    晶体管微结构

    公开(公告)号:US5397904A

    公开(公告)日:1995-03-14

    申请号:US906873

    申请日:1992-07-02

    Abstract: A method for isolating transistors and a microstructure for providing isolation for transistors includes a beam located on a substrate. The beam is formed from the same material as the substrate, preferably single crystal silicon, and is released so as to be suspended in the cavity and spaced apart from the substrate. The beam is supported in the cavity by a cantilever structure or by spaced pedestals, or both. One or more transistors are fabricated in the beam, and are thus isolated from the substrate and may be isolated from each other if desired. Contact beams may also be provided to contact the transistor electrodes for interconnection of adjacent transistors or connection of the transistors to electrical circuitry on the substrate. The contact beams also provide mechanical support for the beams.Multiple beams in side-by-side arrays or stacked arrays may be provided.

    Abstract translation: 用于隔离晶体管的方法和用于提供晶体管隔离的微结构包括位于衬底上的光束。 光束由与衬底相同的材料形成,优选为单晶硅,并且被释放以便悬挂在空腔中并与衬底间隔开。 梁通过悬臂结构或间隔开的支座或两者支撑在腔体中。 一个或多个晶体管制造在光束中,并且因此与衬底隔离,并且如果需要可以彼此隔离。 还可以提供接触光束以接触晶体管电极,用于相邻晶体管的互连或将晶体管连接到衬底上的电路。 接触梁还为梁提供机械支撑。 可以提供并排阵列或堆叠阵列中的多个光束。

    Massively parallel array cathode
    53.
    发明授权
    Massively parallel array cathode 失效
    大容量并联阵列阴极

    公开(公告)号:US5363021A

    公开(公告)日:1994-11-08

    申请号:US089821

    申请日:1993-07-12

    CPC classification number: H01J9/025 H01J3/022 H01J31/127

    Abstract: A massively parallel electron beam array for controllably imaging a target includes a multiplicity of emitter cathodes, each incorporating one or more micron-sized emitter tips. Each tip is controlled by a control electrode to produce an electron stream, and its deflection is controlled by a multielement deflection electrode to permit scanning of a corresponding target region.

    Abstract translation: 用于可控地成像靶的大规模平行电子束阵列包括多个发射极阴极,每个发射极阴极包括一个或多个微米级的发射极尖端。 每个尖端由控制电极控制以产生电子流,并且其偏转由多元件偏转电极控制以允许扫描相应的目标区域。

    Silicon tip field emission cathode arrays and fabrication thereof
    54.
    发明授权
    Silicon tip field emission cathode arrays and fabrication thereof 失效
    硅尖端场发射阴极阵列及其制造

    公开(公告)号:US5199917A

    公开(公告)日:1993-04-06

    申请号:US803986

    申请日:1991-12-09

    CPC classification number: B82Y10/00 H01J9/025

    Abstract: Through a silicon fabrication process, an emitter tip array is produced by electron beam or other suitable submicrometer scale lithography for precise location of the emitters. The emitter tips are formed by an oxidation process which ensures accurate and precise formation of tips having uniform radii. The process also utilizes the oxidation step to precisely align gate electrode apertures with respect to corresponding emitter tips so that large arrays can be formed with great accuracy and reliability.

    Abstract translation: 通过硅制造工艺,通过电子束或其他合适的亚微米级光刻产生发射极尖端阵列,用于发射器的精确定位。 发射极尖端通过氧化工艺形成,其确保准确且准确地形成具有均匀半径的尖端。 该方法还利用氧化步骤相对于相应的发射极尖端精确对准栅极电极孔,使得可以以高精度和可靠性形成大阵列。

    Monocyclic high aspect ratio titanium inductively coupled plasma deep etching processes and products so produced
    55.
    发明授权
    Monocyclic high aspect ratio titanium inductively coupled plasma deep etching processes and products so produced 有权
    单环高宽比钛电感耦合等离子体深蚀刻工艺和产品如此生产

    公开(公告)号:US08685266B2

    公开(公告)日:2014-04-01

    申请号:US11537743

    申请日:2006-10-02

    CPC classification number: C23F4/00

    Abstract: Monocyclic chlorine based inductively coupled plasma deep etching processes for the rapid micromachining of titanium substrates and titanium devices so produced are disclosed. The method parameters are adjustable to simultaneously vary etch rate, mask selectivity, and surface roughness and can be applied to titanium substrates having a wide variety of thicknesses to produce high aspect ratio features, smooth sidewalls, and smooth surfaces. The titanium microdevices so produced exhibit beneficially high fracture toughness, biocompatibility and are robust and able to withstand harsh environments making them useful in a wide variety of applications including microelectronics, micromechanical devices, MEMS, and biological devices that may be used in vivo.

    Abstract translation: 公开了用于快速微加工如此生产的钛基板和钛器件的单环氯基电感耦合等离子体深刻蚀工艺。 方法参数是可调节的,以同时改变蚀刻速率,掩模选择性和表面粗糙度,并且可以应用于具有各种厚度的钛基板以产生高纵横比特征,平滑侧壁和光滑表面。 如此生产的钛微型设备表现出有利的高断裂韧性,生物相容性,并且坚固耐用,能够承受恶劣环境,使其可用于各种应用,包括微电子学,微机械器件,MEMS和可在体内使用的生物器件。

    Monocyclic high aspect ratio titanium inductively coupled plasma deep etching processes and products so produced
    56.
    发明申请
    Monocyclic high aspect ratio titanium inductively coupled plasma deep etching processes and products so produced 有权
    单环高宽比钛电感耦合等离子体深蚀刻工艺和产品如此生产

    公开(公告)号:US20100125254A1

    公开(公告)日:2010-05-20

    申请号:US11537743

    申请日:2006-10-02

    CPC classification number: C23F4/00

    Abstract: Monocyclic chlorine based inductively coupled plasma deep etching processes for the rapid micromachining of titanium substrates and titanium devices so produced are disclosed. The method parameters are adjustable to simultaneously vary etch rate, mask selectivity, and surface roughness and can be applied to titanium substrates having a wide variety of thicknesses to produce high aspect ratio features, smooth sidewalls, and smooth surfaces. The titanium microdevices so produced exhibit beneficially high fracture toughness, biocompatibility and are robust and able to withstand harsh environments making them useful in a wide variety of applications including microelectronics, micromechanical devices, MEMS, and biological devices that may be used in vivo.

    Abstract translation: 公开了用于快速微加工如此生产的钛基板和钛器件的单环氯基电感耦合等离子体深刻蚀工艺。 方法参数是可调节的,以同时改变蚀刻速率,掩模选择性和表面粗糙度,并且可以应用于具有各种厚度的钛基板以产生高纵横比特征,平滑侧壁和光滑表面。 如此生产的钛微型设备表现出有利的高断裂韧性,生物相容性,并且坚固耐用,能够承受恶劣环境,使其可用于各种应用,包括微电子学,微机械器件,MEMS和可在体内使用的生物器件。

    Metal MEMS devices and methods of making same
    57.
    发明授权
    Metal MEMS devices and methods of making same 有权
    金属MEMS器件及其制造方法

    公开(公告)号:US07166488B2

    公开(公告)日:2007-01-23

    申请号:US10823559

    申请日:2004-04-14

    CPC classification number: C23F4/00 B81C1/00492 B81C2201/0132

    Abstract: Metal MEMS structures are fabricated from metal substrates, preferably titanium, utilizing micromachining processes with a new deep etching procedure to provide released microelectromechanical devices. The deep etch procedure includes metal anisotropic reactive ion etching utilizing repetitive alternating steps of etching and side wall protection. Variations in the timing of the etching and protecting steps produces walls of different roughness and taper. The metal wafers can be macomachined before forming the MEMS structures, and the resulting wafers can be stacked and bonded in packages.

    Abstract translation: 金属MEMS结构由金属基底(优选钛)制成,利用微加工工艺和新的深刻蚀工艺来提供释放的微机电装置。 深蚀刻程序包括利用重复的蚀刻和侧壁保护的交替步骤的金属各向异性反应离子蚀刻。 蚀刻和保护步骤的时间变化产生不同粗糙度和锥度的壁。 在形成MEMS结构之前,金属晶片可以被加工,并且所得到的晶片可以堆叠并结合成封装。

    Microfabrication process for enclosed microstructures
    58.
    发明授权
    Microfabrication process for enclosed microstructures 失效
    封闭微结构的微加工工艺

    公开(公告)号:US6093330A

    公开(公告)日:2000-07-25

    申请号:US867060

    申请日:1997-06-02

    Abstract: A single-mask process for fabricating enclosed, micron-scale subsurface cavities in a single crystal silicon substrate includes the steps of patterning the substrate to form vias, etching the cavities through the vias, and sealing the vias. Single cavities of any configuration may be produced, but a preferred embodiment includes closely spaced cavity pairs. The cavities may be separated by a thin membrane, or may be merged to form an enlarged merged cavity having an overhanging bar to which electrical leads may be connected. A three-mask process for fabricating enclosed cavities with electrical contacts and electrical connections is also disclosed.

    Abstract translation: 用于在单晶硅衬底中制造封闭的微米级次表面空穴的单掩模工艺包括以下步骤:使衬底图案化以形成通孔,通过通孔蚀刻空腔,并密封通孔。 可以制造任何构造的单个空腔,但是优选实施例包括紧密间隔的空腔对。 空腔可以由薄膜分离,或者可以被合并以形成具有可以连接电引线的悬伸杆的扩大的合并腔。 还公开了一种用于制造具有电触点和电连接的封闭腔的三掩模工艺。

    Method of making high aspect ratio probes with self-aligned control
electrodes
    59.
    发明授权
    Method of making high aspect ratio probes with self-aligned control electrodes 有权
    制作具有自对准控制电极的高纵横比探针的方法

    公开(公告)号:US6027951A

    公开(公告)日:2000-02-22

    申请号:US135176

    申请日:1998-08-18

    Abstract: A high aspect ratio field emission or tunnelling probe is fabricated utilizing a single crystal reactive etching and metallization process. The resulting field emission probes have self-aligned single crystal silicon sharp tips, high aspect ratio supporting posts for the tips, and integrated, self-aligned gate electrodes surrounding an electrically isolated from the tips. The gate electrodes are spaced from the tips by between 200 and 800 nm and metal silicide or metal can be applied on the tips to achieve emitter turn on at low operational gate voltages. The resulting tips have a high aspect ratio for use in probing various surface phenomena, and for this purpose, the probes can be mounted on or integrated in a three-dimensional translator for mechanical scanning across the surface and for focusing by adjusting the height of the emitter above the surface.

    Abstract translation: 使用单晶反应蚀刻和金属化工艺制造高纵横比场致发射或隧道探针。 所产生的场致发射探针具有自对准单晶硅尖尖,用于尖端的高纵横比支撑柱,以及围绕与尖端电隔离的集成的自对准栅电极。 栅电极与尖端间隔200至800nm,并且金属硅化物或金属可以施加在尖端上,以在低操作栅极电压下实现发射极导通。 所得到的尖端具有高的纵横比用于探测各种表面现象,并且为此目的,探针可以安装在三维平移机上或集成在三维平移机中,用于穿过表面进行机械扫描,并通过调整高度来进行聚焦 发射体在表面以上。

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