System context saving based on compression/decompression time
    51.
    发明授权
    System context saving based on compression/decompression time 有权
    基于压缩/解压缩时间的系统上下文保存

    公开(公告)号:US08370667B2

    公开(公告)日:2013-02-05

    申请号:US12976514

    申请日:2010-12-22

    IPC分类号: G06F1/32

    CPC分类号: G06F9/4418

    摘要: A method and apparatus for improving the resume time of a platform. In one embodiment of the invention, the context of the platform is saved prior to entering an inactive state of the platform. When the platform is switched back to an active state, it reads the saved context and restores the platform to its original state prior to entering the inactive state. In one embodiment of the invention, the platform determines whether it should compress the saved context before storing it in a non-volatile memory based on the operating condition of the platform. This allows the platform to select the optimum method to allow faster resume time of the platform.

    摘要翻译: 一种用于提高平台恢复时间的方法和装置。 在本发明的一个实施例中,平台的上下文在进入平台的不活动状态之前被保存。 当平台切换回活动状态时,它读取保存的上下文,并在进入非活动状态之前将平台恢复到原始状态。 在本发明的一个实施例中,平台基于平台的操作条件来确定在将保存的上下文存储在非易失性存储器中之前是否应该压缩保存的上下文。 这允许平台选择最佳方法以允许更快的平台恢复时间。

    Performing redundant memory hopping

    公开(公告)号:US08352779B2

    公开(公告)日:2013-01-08

    申请号:US13307547

    申请日:2011-11-30

    IPC分类号: G06F11/07

    摘要: In one embodiment, the present invention includes a method for receiving an indication of a loss of redundancy with respect to a pair of mirrored memory regions of a partially redundant memory system, determining new mirrored memory regions, and dynamically migrating information stored in the original mirrored memory regions to the new mirrored memory regions. Other embodiments are described and claimed.

    DEMAND BASED USB PROXY FOR DATA STORES IN SERVICE PROCESSOR COMPLEX
    53.
    发明申请
    DEMAND BASED USB PROXY FOR DATA STORES IN SERVICE PROCESSOR COMPLEX 有权
    数据存储在服务处理器复合中的基于需求的USB代码

    公开(公告)号:US20120084552A1

    公开(公告)日:2012-04-05

    申请号:US12894876

    申请日:2010-09-30

    IPC分类号: G06F9/00

    摘要: A method, apparatus, system, and computer program product for secure server system management. A payload containing system software and/or firmware updates is distributed in an on-demand, secure I/O operation. The I/O operation is performed via a secured communication channel inaccessible by the server operating system to an emulated USB drive. The secure communication channel can be established for the I/O operation only after authenticating the recipient of the payload, and the payload can be protected from access by a potentially-infected server operating system. Furthermore, the payload can be delivered on demand rather than relying on a BIOS update schedule, and the payload can be delivered at speeds of a write operation to a USB drive.

    摘要翻译: 一种用于安全服务器系统管理的方法,设备,系统和计算机程序产品。 包含系统软件和/或固件更新的有效载荷以按需安全I / O操作分发。 I / O操作通过服务器操作系统无法访问到模拟USB驱动器的安全通信通道执行。 只有在验证有效负载的收件人之后,才能为I / O操作建立安全通信通道,并且可以保护有效负载免受潜在感染的服务器操作系统的访问。 此外,有效载荷可以按需传送,而不是依赖于BIOS更新计划,并且有效载荷可以以写入操作的速度传送到USB驱动器。

    SYSTEM RAS PROTECTION FOR UMA STYLE MEMORY
    54.
    发明申请
    SYSTEM RAS PROTECTION FOR UMA STYLE MEMORY 有权
    UMA风格记忆体的系统防护

    公开(公告)号:US20110161726A1

    公开(公告)日:2011-06-30

    申请号:US12649296

    申请日:2009-12-29

    IPC分类号: G06F11/20 G06F9/24 G06F11/00

    摘要: In some embodiments, the invention involves a system and method relating to system recovery in a fault resilient manner by isolating errors associated with the management engine (ME) UMA memory. BIOS logs errors occurring on memory within the system. The ME UMA is invisible to the host OS, so the OS will not be notified about the errors occurring in the ME UMA range. When an error threshold has been reached for a memory unit in which ME UMA resides, ME UMA data is migrated to a previously reserved backup region of memory and the ME is notified of the new ME UMA location. The faulty memory is flagged for replacement at a next maintenance cycle. Embodiments may be applied to workstations that utilize ECC memory protection which utilize AMT (Active Management Technology) and ME UMA. Other embodiments are described and claimed.

    摘要翻译: 在一些实施例中,本发明涉及通过隔离与管理引擎(ME)UMA存储器相关联的错误,以故障恢复方式与系统恢复相关的系统和方法。 BIOS记录系统内存上发生的错误。 ME UMA对于主机操作系统是不可见的,因此不会在ME UMA范围内发生错误通知操作系统。 当ME UMA存在的存储器单元达到错误阈值时,ME UMA数据被迁移到先前保留的存储器备份区域,并向ME通知新的ME UMA位置。 在下一个维护周期,标记有故障的存储器进行更换。 实施例可以应用于利用AMT(主动管理技术)和ME UMA的ECC存储器保护的工作站。 描述和要求保护其他实施例。

    Dual non-volatile memories for a trusted hypervisor
    57.
    发明申请
    Dual non-volatile memories for a trusted hypervisor 有权
    用于可信管理程序的双重非易失性存储器

    公开(公告)号:US20090064274A1

    公开(公告)日:2009-03-05

    申请号:US11897469

    申请日:2007-08-30

    IPC分类号: H04L9/32 G06F12/06 G06F15/177

    CPC分类号: G06F21/575 G06F9/45533

    摘要: In one embodiment, the present invention includes a method for executing a first code portion of a pre-boot environment from a first non-volatile memory, authenticating a trusted hypervisor in the first non-volatile memory using the first code portion, executing the trusted hypervisor if the trusted hypervisor is authenticated, and authenticating a basic input/output system (BIOS) present in a second non-volatile memory with the trusted hypervisor and transferring control from the trusted hypervisor to the BIOS if the BIOS is authenticated. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括一种用于从第一非易失性存储器执行预引导环境的第一代码部分的方法,使用第一代码部分来验证第一非易失性存储器中的可管理管理程序,执行可信任的 虚拟机管理程序,如果可信管理程序被认证,以及如果BIOS被认证,则用可信管理程序验证存在于第二非易失性存储器中的基本输入/输出系统(BIOS)并将控制从可信管理程序传送到BIOS。 描述和要求保护其他实施例。

    Methods and apparatus for parallel processing in system management mode
    58.
    发明申请
    Methods and apparatus for parallel processing in system management mode 审中-公开
    系统管理模式下并行处理的方法与装置

    公开(公告)号:US20080126650A1

    公开(公告)日:2008-05-29

    申请号:US11525617

    申请日:2006-09-21

    IPC分类号: G06F13/24 G06F11/14

    摘要: A processing system includes multiple processing units. After multiple event handlers have been dispatched to execute concurrently in different processing units of the processing system in a hidden execution mode, the processing system automatically determines whether the multiple event handlers successfully complete. If an event handler among the multiple dispatched event handlers fails, the processing system automatically dispatches another event handler to perform operations associated with the event handler that failed. In an embodiment, the hidden execution mode is a system management mode (SMM), and the multiple event handlers are dispatched in response to a system management interrupt (SMI) or a platform management interrupt (PMI). In an embodiment, the processing system may determine why the dispatched event handler failed, and may performing a corrective operation before dispatching another event handler to perform the operations associated with the event handler that failed. Other embodiments are described and claimed.

    摘要翻译: 处理系统包括多个处理单元。 在多个事件处理程序已经被调度以在隐藏的执行模式中在处理系统的不同处理单元中同时执行的情况下,处理系统自动地确定多个事件处理程序是否成功完成。 如果多个分派事件处理程序中的事件处理程序发生故障,处理系统将自动调度另一个事件处理程序,以执行与失败的事件处理程序相关联的操作。 在一个实施例中,隐藏执行模式是系统管理模式(SMM),响应于系统管理中断(SMI)或平台管理中断(PMI),调度多个事件处理程序。 在一个实施例中,处理系统可以确定分派的事件处理程序失败的原因,并且可以在分派另一事件处理程序之前执行校正操作,以执行与失败的事件处理程序相关联的操作。 描述和要求保护其他实施例。

    THREAD AWARE POWER MANAGEMENT
    59.
    发明申请
    THREAD AWARE POWER MANAGEMENT 审中-公开
    线路电源管理

    公开(公告)号:US20150089249A1

    公开(公告)日:2015-03-26

    申请号:US14035534

    申请日:2013-09-24

    IPC分类号: G06F1/26

    摘要: In an embodiment, a power management controller is to receive thread information from a scheduler, where the thread information includes thread priority information for a thread scheduled to a core of a multicore processor. The power management controller is further to receive power consumption information from a power controller and to determine a power management action to be taken by the power controller on at least one core based at least in part on the thread priority information. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,功率管理控制器将从调度器接收线程信息,其中线程信息包括针对被调度到多核处理器的核心的线程的线程优先级信息。 功率管理控制器还进一步从功率控制器接收功耗信息,并且至少部分地基于线程优先级信息来确定功率控制器在至少一个核心上采取的功率管理动作。 描述和要求保护其他实施例。

    APPARATUS AND METHOD FOR PARTIAL MEMORY MIRRORING
    60.
    发明申请
    APPARATUS AND METHOD FOR PARTIAL MEMORY MIRRORING 有权
    用于部分存储器镜像的装置和方法

    公开(公告)号:US20140189417A1

    公开(公告)日:2014-07-03

    申请号:US13730482

    申请日:2012-12-28

    IPC分类号: G06F11/00 G06F11/07

    摘要: An apparatus and method are described for performing partial memory mirroring operations. For example, one embodiment of a processor comprises: a processor core for generating a read or write transaction having a system memory address; a home agent identified to service the read or write transaction based on the system memory address; one or more target address decoders (TADs) associated with the home agent to determine whether the system memory address is within a mirrored memory region or a non-mirrored memory region, wherein: if the system memory address is within a mirrored memory region, then the one or more TADs identifying multiple mirrored memory channels for the read or write transaction; and if the system memory address is not within a mirrored memory region, then the one or more TADs identifying a single memory channel for the read or write transaction.

    摘要翻译: 描述了用于执行部分存储器镜像操作的装置和方法。 例如,处理器的一个实施例包括:处理器核,用于产生具有系统存储器地址的读或写事务; 被识别为基于系统存储器地址来服务于读或写事务的归属代理; 与归属代理相关联的一个或多个目标地址解码器(TAD),以确定系统存储器地址是否在镜像存储器区域或非镜像存储器区域内,其中:如果系统存储器地址在镜像存储器区域内,则 所述一个或多个TAD识别用于读取或写入事务的多个镜像存储器通道; 并且如果系统存储器地址不在镜像存储器区域内,则该一个或多个标识用于读取或写入事务的单个存储器通道的TAD。