公开(公告)号：US10552262B2

公开(公告)日：2020-02-04

申请号：US15948586

申请日：2018-04-09

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang ,  Yang-Chih Shen ,  Sheng-I Hsu

IPC: G06F11/00 ,  G06F11/10 ,  G06F12/02 ,  G06F3/06 ,  G11C29/04

Abstract: An embodiment of a method for accessing a storage unit of a flash memory, performed by an arbiter, is disclosed to include at least the following steps. After transmitting data to first storage units each connected to one of storage-unit access interfaces in a first batch, the arbiter issues a data write command to each first storage unit, thereby enabling each first storage unit to start a physical data programming. During the physical data programming of each first storage unit, data is transmitted to second storage units each connected to one of the storage-unit access interfaces in a second batch.

公开(公告)号：US10162759B2

公开(公告)日：2018-12-25

申请号：US15689767

申请日：2017-08-29

Applicant: Silicon Motion, Inc.

Inventor： Yang-Chih Shen ,  Che-Wei Hsu

IPC: G06F12/08 ,  G06F12/0873

Abstract: The invention introduces a method for caching and reading data to be programmed into a storage unit, performed by a processing unit, including at least the following steps. A write command for programming at least a data page into a first address is received from a master device via an access interface. It is determined whether a block of data to be programmed has been collected, where the block contains a specified number of pages. The data page is stored in a DRAM (Dynamic Random Access Memory) and cache information is updated to indicate that the data page has not been programmed into the storage unit, and to also indicate the location of the DRAM caching the data page when the block of data to be programmed has not been collected.

公开(公告)号：US20180267730A1

公开(公告)日：2018-09-20

申请号：US15985718

申请日：2018-05-22

Applicant: Silicon Motion Inc.

Inventor： Tsung-Chieh Yang ,  Chun-Chieh Kuo ,  Ching-Hui Lin ,  Yang-Chih Shen

IPC: G06F3/06 ,  G11C11/56 ,  G06F12/02

CPC classification number: G06F3/0634 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7206 ,  G11C11/5628 ,  G11C11/5642 ,  Y02D10/13

Abstract: A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode.

公开(公告)号：US10042756B2

公开(公告)日：2018-08-07

申请号：US15589483

申请日：2017-05-08

Applicant: Silicon Motion, Inc.

Inventor： Yang-Chih Shen

IPC: G06F12/10 ,  G06F12/02 ,  G06F12/1027 ,  G06F12/1009

Abstract: A method for scheduling read commands, performed by a processing unit, contains the following steps: Logical read commands are received from a master device via a first access interface, where each logical read command requests to read data of a logical address. First physical storage locations of mapping segments associated with the logical addresses are obtained from a high-level mapping table, and a second access interface is directed to read the mapping segments from the first physical storage locations of a storage unit. Second physical storage locations associated with the logical addresses are obtained from the mapping segments, and the second access interface is directed to read data from the second physical storage locations of the storage unit. The first access interface is directed to clock the data of the logical addresses out to the master device.

公开(公告)号：US20180150357A1

公开(公告)日：2018-05-31

申请号：US15805067

申请日：2017-11-06

Applicant: Silicon Motion, Inc.

Inventor： Yang-Chih Shen ,  Po-Sheng Chou

IPC: G06F11/14 ,  G06F12/1009

Abstract: A data storage method includes steps of: selecting an active block to store data from a host; determining whether a power drop/loss event has occurred; when it is determined that a power drop/loss event has occurred, recording an index of the active block and an index of a last data-containing page in the active block; generating a primary F2H mapping table; and writing the primary F2H mapping table, the index of the active block and the index of the last data-containing page into a designated block. A data storage device and a data recovery program are also provided.

公开(公告)号：US09977714B2

公开(公告)日：2018-05-22

申请号：US14331575

申请日：2014-07-15

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang ,  Yang-Chih Shen ,  Sheng-I Hsu

IPC: G06F11/00 ,  G06F11/10 ,  G06F12/02 ,  G06F3/06 ,  G11C29/04

CPC classification number: G06F11/108 ,  G06F3/06 ,  G06F12/0246 ,  G11C2029/0411

Abstract: An embodiment of a method for accessing a storage unit of a flash memory, performed by an arbiter, includes at least the following steps. After transmitting data to first storage units each connected to one of storage-unit access interfaces in a first batch, the arbiter issues a data write command to each first storage unit, thereby enabling each first storage unit to start a physical data programming. During the physical data programming of each first storage unit, data is transmitted to second storage units each connected to one of the storage-unit access interfaces in a second batch.

公开(公告)号：US09846643B2

公开(公告)日：2017-12-19

申请号：US14738500

申请日：2015-06-12

Applicant: Silicon Motion, Inc.

Inventor： Yang-Chih Shen ,  Hou-Yun Lee

IPC: G06F12/02 ,  G06F12/10 ,  G11C7/10

CPC classification number: G06F12/0246 ,  G06F2212/1016 ,  G06F2212/7201 ,  G11C7/1072

Abstract: A method for maintaining a storage mapping table. An access interface is directed to read a group mapping table from the last page of a block of a storage unit. The block is allocated to store data of a plurality of groups, each group stores information indicating which location in the storage unit stores data of an LBA (Logical Block Address) range, and the group mapping table stores information indicating which unit of the block stores the latest data of each group. The group mapping table is stored in a DRAM (Dynamic Random Access Memory). The access interface is directed to read data of each group from the storage unit according to the group mapping table. The data of each group is stored in a specified location of a storage mapping table of the DRAM.

公开(公告)号：US20170309350A1

公开(公告)日：2017-10-26

申请号：US15649394

申请日：2017-07-13

Applicant: Silicon Motion, Inc.

Inventor： Ching-Ke Chen ,  Po-Sheng Chou ,  Yang-Chih Shen

IPC: G11C29/52 ,  G06F11/10 ,  G11C29/04

CPC classification number: G11C29/52 ,  G06F11/1068 ,  G06F11/1076 ,  G06F11/108 ,  G11C2029/0411

Abstract: An exemplary embodiment provides a data storage device including a flash memory and a controller. The flash memory includes a plurality of chips, each of the chips includes a plurality of pages, the pages are arranged to assemble into a super block, the pages of the super block are numbered 0˜X from top to bottom of the super block, the pages with number 0˜Y−1 constitute a data area, and the pages with numbers Y˜X constitute a RAID parity area. The controller corrects data of the data area according to data of the RAID parity area when the data in the data area cannot be successfully read.

公开(公告)号：US09779022B2

公开(公告)日：2017-10-03

申请号：US14738464

申请日：2015-06-12

Applicant: Silicon Motion, Inc.

Inventor： Yang-Chih Shen ,  Che-Wei Hsu

IPC: G06F12/08 ,  G06F12/0873

CPC classification number: G06F12/0873 ,  G06F2212/1021 ,  G06F2212/313 ,  G06F2212/608

Abstract: A method for caching and reading data to be programmed into a storage unit, performed by a processing unit, including at least the following steps. A write command for programming at least a data page into a first address is received from a master device via an access interface. It is determined whether a block of data to be programmed has been collected, where the block contains a specified number of pages. The data page is stored in a DRAM (Dynamic Random Access Memory) and cache information is updated to indicate that the data page has not been programmed into the storage unit, and to also indicate the location of the DRAM caching the data page when the block of data to be programmed has not been collected.

公开(公告)号：US20170060427A1

公开(公告)日：2017-03-02

申请号：US15220739

申请日：2016-07-27

Applicant: Silicon Motion, Inc.

Inventor： Yang-Chih Shen

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/061 ,  G06F3/0679

Abstract: A method for scheduling read and write commands, performed by a processing unit, including at least the following steps: the processing unit obtains more than one read commands from a read queue successively and executes the obtained read commands until a first condition is met. After the first condition is met, the processing unit obtains more than one write commands from a write queue successively and executes the obtained write commands until a second condition is met.

Abstract translation: 一种用于调度由处理单元执行的读取和写入命令的方法，至少包括以下步骤：处理单元从读取队列中连续获取多于一个的读取命令，并执行所获得的读取命令直到满足第一个条件。 在满足第一条件之后，处理单元从写入队列中连续获得多于一个的写入命令，并执行所获得的写入命令，直到满足第二个条件。