Method for exchanging information between at least two participants via at least one intermediary to limit disclosure between the participants
    51.
    发明授权
    Method for exchanging information between at least two participants via at least one intermediary to limit disclosure between the participants 失效
    用于经由至少一个中间人在至少两个参与者之间交换信息以限制参与者之间的公开的方法

    公开(公告)号:US07610407B2

    公开(公告)日:2009-10-27

    申请号:US10733502

    申请日:2003-12-11

    申请人: Alan H. Karp

    发明人: Alan H. Karp

    IPC分类号: G06F15/16 G06F21/00 G06Q10/00

    摘要: The disclosed embodiments relate to a method of exchanging information between at least one party and a plurality of intermediaries, the plurality of intermediaries including a selected intermediary. The method may comprise providing correct information to the selected intermediary, providing incorrect information to each of the plurality of intermediaries who are not the selected intermediary, receiving modified information based on the correct information from the selected intermediary, receiving modified information based on the incorrect information from each of the plurality of intermediaries who are not the selected intermediaries, and wherein the plurality of intermediaries do not know the identity of the selected intermediary.

    摘要翻译: 所公开的实施例涉及在至少一方和多个中介之间交换信息的方法,所述多个中介包括所选择的中介。 该方法可以包括向所选择的中间件提供正确的信息,向不是所选择的中间人的多个中介者中的每一个提供不正确的信息,基于来自所选中介的正确信息接收修改的信息,基于不正确的信息接收修改的信息 来自不是所选择的中间体的多个中间体中的每一个,并且其中所述多个中间体不知道所选择的中间体的身份。

    Method and apparatus for processing descriptive statements
    52.
    发明授权
    Method and apparatus for processing descriptive statements 有权
    用于处理描述语句的方法和装置

    公开(公告)号:US07519822B2

    公开(公告)日:2009-04-14

    申请号:US10798187

    申请日:2004-03-10

    摘要: This disclosure provides a method and apparatus for processing descriptive statements. More particularly, this disclosure provides a way of quickly and reliably signing and authenticating RDF statements without requiring a data sort. By using a commutative hashing function that combines multiple independent hashes, ideally one per serialized statement, signing and verifying can each be completed without a data sort; inclusion of an “extra” identifier, e.g., the total number of RDF statements, may enhance the security of the signed statements by helping minimize exposure to potential attackers. The disclosure also describes how to later add additional statements to an existing signature and hash using an incremental process. Effective blank node handling may also achieved using this incremental process by requiring intermediate machines to add a new “reverse-labeling” statement each time a blank node is locally assigned; the new statement, essentially provides information to permit downstream to reverse the labeling process and thereby reliably verify authentic the original RDF statements.

    摘要翻译: 本公开提供了一种用于处理描述性语句的方法和装置。 更具体地,本公开提供了在不需要数据排序的情况下快速且可靠地对RDF语句进行签名和认证的方式。 通过使用组合多个独立散列的交换散列函数,理想情况下每个序列化语句一个,签名和验证可以在没有数据排序的情况下完成; 包括“额外的”标识符,例如RDF语句的总数,可以通过帮助最小化对潜在攻击者的暴露来增强签名语句的安全性。 本公开还描述了如何使用增量过程稍后向现有签名和散列添加附加语句。 每当空白节点被本地分配时,也可以通过要求中间机器添加新的“反向标注”语句,也可以使用该增量过程实现有效的空白节点处理; 新的声明基本上提供信息,允许下游逆转标签过程,从而可靠地验证原始RDF语句的真实性。

    Detecting data races in multithreaded computer programs
    53.
    发明授权
    Detecting data races in multithreaded computer programs 有权
    检测多线程计算机程序中的数据竞赛

    公开(公告)号:US07366956B2

    公开(公告)日:2008-04-29

    申请号:US10870722

    申请日:2004-06-16

    IPC分类号: G06F11/00

    CPC分类号: G06F11/3624

    摘要: In one aspect, a value of a variable shared by multiple threads for executing the program code is stored in a thread-local variable. A data race condition is detected based on a comparison of values of the shared variable and the thread-local variable. Detection of the data race condition is reported. In another aspect, a machine-readable instruction to store in a thread-local variable a value of a variable shared by multiple threads for executing the program code is generated. A machine-readable instruction to detect a data race condition based on a comparison of values of the shared variable and the thread-local variable is generated. The machine-readable instructions are stored in a machine-readable medium.

    摘要翻译: 在一个方面,用于执行程序代码的多个线程共享的变量的值被存储在线程局部变量中。 基于共享变量和线程局部变量的值的比较来检测数据竞争条件。 报告数据竞争条件的检测。 在另一方面,生成用于存储线程局部变量中的多个线程共享的用于执行程序代码的变量的值的机器可读指令。 生成用于基于共享变量和线程局部变量的值的比较来检测数据竞争条件的机器可读指令。 机器可读指令存储在机器可读介质中。

    Wireless network system
    54.
    发明授权
    Wireless network system 有权
    无线网络系统

    公开(公告)号:US07362865B2

    公开(公告)日:2008-04-22

    申请号:US10122511

    申请日:2002-04-15

    申请人: Alan H. Karp

    发明人: Alan H. Karp

    IPC分类号: H04L9/00

    摘要: A wireless network system provides for a wireless access point. The wireless access point is configured to receive data, from a wireless computing device, that is encrypted using encryption key data and to determine if the encryption key data corresponds to a home computing device or a visitor computing device. An IP address is assigned to the wireless computing device to identify it on the network system. The IP address is assigned based upon the encryption key data.

    摘要翻译: 无线网络系统提供无线接入点。 无线接入点被配置为从无线计算设备接收使用加密密钥数据加密并且确定加密密钥数据是否对应于家庭计算设备或访问者计算设备的数据。 IP地址被分配给无线计算设备以在网络系统上识别它。 IP地址是根据加密密钥数据分配的。

    Processor having data buffer for speculative loads
    55.
    发明授权
    Processor having data buffer for speculative loads 失效
    具有用于投机负载的数据缓冲区的处理器

    公开(公告)号:US06321328B1

    公开(公告)日:2001-11-20

    申请号:US09274166

    申请日:1999-03-22

    IPC分类号: G06F1200

    摘要: Computer apparatus includes an execution unit for executing a sequence of instructions which may include a speculative load instruction, a memory for storing data required by the instructions for execution, a low latency data cache for holding data accessed in the memory in response to the instructions, a low latency data buffer for holding speculative data accessed in the memory in response to the speculative load instruction, and a controller. The controller loads the speculative data from the memory into the data buffer in response to the speculative load instruction when the speculative data is not present in the data cache or the data buffer, and loads the speculative data from the data buffer into the execution unit. The speculative data may be loaded from the data buffer into the execution unit when the speculative load instruction is executed or when the speculative load instruction is committed. The speculative data is supplied to the execution unit with low latency and without contamination of the data cache.

    摘要翻译: 计算机装置包括用于执行指令序列的执行单元,该指令序列可以包括推测性加载指令,用于存储执行指令所需的数据的存储器,用于响应于指令保存存储在存储器中的数据的低等待时间数据高速缓存, 低延迟数据缓冲器,用于保持响应于推测加载指令在存储器中访问的推测数据,以及控制器。 当推测数据不存在于数据高速缓存或数据缓冲器中时,控制器响应于推测加载指令将推测数据从存储器加载到数据缓冲器中,并将推测数据从数据缓冲器加载到执行单元中。 当推测加载指令执行时或推测加载指令被提交时,推测数据可以从数据缓冲器加载到执行单元中。 推测数据以低延迟提供给执行单元,而不会污染数据高速缓存。

    Method for sharing and executing inaccessible dynamic processes for replica consistency among a plurality of existing applications
    56.
    发明授权
    Method for sharing and executing inaccessible dynamic processes for replica consistency among a plurality of existing applications 有权
    用于共享和执行多个现有应用程序之间的复制一致性的无法访问的动态过程的方法

    公开(公告)号:US06314453B1

    公开(公告)日:2001-11-06

    申请号:US09251367

    申请日:1999-02-17

    IPC分类号: G06F1300

    摘要: A system for and method of sharing and executing inaccessible dynamic processes in replicated architecture networks to ensure that local activities are executed concurrently at remote workstations in a shared server-client network without the need for application modification in the system. The invention provides for sharing and executing inaccessible dynamic existing processes for replica consistency among multiple applications in the shared network. The invention provides for use at each workstation an application encapsulator having a listener to observe input events representative of process state changes. Each encapsulator also includes a mapper that operates with an associator for creating hierarchial tree structures to provide concurrent execution among all participant workstations. The invention uses a replica when an accessible process becomes inaccessible for multicasting input events to all participant workstations to maintain replica consistency among the plurality of applications. The invention is preferably used in engineering systems that include 3-D CAD/CAM graphical intensive applications and selectively with text/spreadsheet applications.

    摘要翻译: 在复制架构网络中共享和执行不可访问的动态进程的系统和方法,以确保在共享服务器 - 客户端网络中的远程工作站上并行执行本地活动,而无需系统中的应用程序修改。 本发明提供共享和执行在共享网络中的多个应用之间的复制一致性的不可访问的动态存在过程。 本发明提供了在每个工作站处使用具有监听器的应用程序封装器来观察表示进程状态改变的输入事件。 每个封装器还包括映射器,其与关联器一起操作,用于创建分层树结构以在所有参与者工作站之间提供并发执行。 当可访问进程变得不可访问时,本发明使用副本,以便向所有参与者工作站多播输入事件以维持多个应用程序之间的副本一致性。 本发明优选用于包括3-D CAD / CAM图形密集型应用程序和选择性地具有文本/电子表格应用程序的工程系统中。

    Methods and apparatus for handling and storing bi-endian words in a floating-point processor
    57.
    发明授权
    Methods and apparatus for handling and storing bi-endian words in a floating-point processor 有权
    用于在浮点处理器中处理和存储双向字的方法和装置

    公开(公告)号:US06212539B1

    公开(公告)日:2001-04-03

    申请号:US09169483

    申请日:1998-10-10

    IPC分类号: G06F700

    CPC分类号: G06F7/768 G06F7/483

    摘要: A floating-point unit of a computer includes a floating-point computation unit, floating-point registers and a floating-point status register. The floating-point status register may include a main status field and one or more alternate status fields. Each of the status fields contains flag and control information. Different floating-point operations may be associated with different status fields. Subfields of the floating-point status register may be updated dynamically during operation. The control bits of the alternate status fields may include a trap disable bit for deferring interruptions during speculative execution. A widest range exponent control bit in the status fields may be used to prevent interruptions when the exponent of an intermediate result is within the range of the register format but exceeds the range of the memory format. The floating-point data may be stored in big endian or little endian format.

    摘要翻译: 计算机的浮点单元包括浮点计算单元,浮点寄存器和浮点状态寄存器。 浮点状态寄存器可以包括主状态字段和一个或多个备用状态字段。 每个状态字段都包含标志和控制信息。 不同的浮点运算可能与不同的状态字段相关联。 浮点状态寄存器的子字段可以在操作期间动态更新。 替代状态字段的控制位可以包括用于在推测执行期间推迟中断的陷阱禁止位。 当中间结果的指数在寄存器格式的范围内但超出存储器格式的范围时,可以使用状态字段中的最大范围指数控制位来防止中断。 浮点数据可以以大端或小端格式存储。

    Infrastructure for an open digital services marketplace
    58.
    发明授权
    Infrastructure for an open digital services marketplace 失效
    开放数字服务市场的基础设施

    公开(公告)号:US06205466B1

    公开(公告)日:2001-03-20

    申请号:US09118248

    申请日:1998-07-17

    IPC分类号: G06F900

    摘要: A software infrastructure for providing an open digital services marketplace including a naming manager that enables a requesting task to refer to a desired resource using a name which is local to the requesting task and a router that forwards the request to an appropriate handler for the desired resource and that enables at least one additional task to be invoked in response to the request. The infrastructure includes a permission manager that compares a set of access rights of the requesting task to the desired resource to a set of permissions associated with the desired resource such that the access rights are kept separately from the reference to the desired resource. The desired resource, the requesting task, the additional task, and a set of additional components used to handle the request are each modeled as a resource defined by a corresponding set of meta-data which includes a set of attributes and a reference to a grammar for interpreting the attributes.

    摘要翻译: 一种用于提供开放数字服务市场的软件基础设施,包括命名管理器,其允许请求任务使用请求任务本地的名称引用期望的资源,以及将请求转发到所需资源的适当处理程序的路由器 并且这使得能够响应于该请求调用至少一个附加任务。 基础设施包括权限管理器,其将请求任务的一组访问权限与期望的资源进行比较,以与所需资源相关联的一组权限进行比较,使得访问权限与对期望的资源的引用分开地保持。 所需资源,请求任务,附加任务和用于处理请求的一组附加组件各自被建模为由对应的一组元数据定义的资源,该元数据包括一组属性和对语法的引用 用于解释属性。

    Methods and apparatus for efficient control of floating-point status
register
    59.
    发明授权
    Methods and apparatus for efficient control of floating-point status register 有权
    浮点状态寄存器的有效控制方法和装置

    公开(公告)号:US6151669A

    公开(公告)日:2000-11-21

    申请号:US169481

    申请日:1998-10-10

    摘要: A floating-point unit of a computer includes a floating-point computation it, floating-point registers and a floating-point status register. The floating-point status register may include a main status field and one or more alternate status fields. Each of the status fields contains flag and control information. Different floating-point operations may be associated with different status fields. Subfields of the floating-point status register may be updated dynamically during operation. The control bits of the alternate status fields may include a trap disable bit for deferring interruptions during speculative execution. A widest range exponent control bit in the status fields may be used to prevent interruptions when the exponent of an intermediate result is within the range of the register format but exceeds the range of the memory format. The floating-point data may be stored in big endian or little endian format.

    摘要翻译: 计算机的浮点单元包括浮点计算单元,浮点寄存器和浮点状态寄存器。 浮点状态寄存器可以包括主状态字段和一个或多个备用状态字段。 每个状态字段都包含标志和控制信息。 不同的浮点运算可能与不同的状态字段相关联。 浮点状态寄存器的子字段可以在操作期间动态更新。 替代状态字段的控制位可以包括用于在推测执行期间推迟中断的陷阱禁止位。 当中间结果的指数在寄存器格式的范围内但超出存储器格式的范围时,可以使用状态字段中的最大范围指数控制位来防止中断。 浮点数据可以以大端或小端格式存储。

    Propagating NaNs during high precision calculations using lesser
precision hardware
    60.
    发明授权
    Propagating NaNs during high precision calculations using lesser precision hardware 失效
    在使用较低精度的硬件进行高精度计算时传播NaN

    公开(公告)号:US6138135A

    公开(公告)日:2000-10-24

    申请号:US141246

    申请日:1998-08-27

    申请人: Alan H. Karp

    发明人: Alan H. Karp

    IPC分类号: G06F7/57 G06F7/38

    摘要: A floating point arithmetic unit provides consistent propagation of NaNs le performing high precision calculations on hardware designed to perform lower precision calculations. In one embodiment, the floating point arithmetic unit is provided with a microcode memory that stores more than one set of NaN propagation rules. In operation, the floating point arithmetic unit accesses one of the sets of NaN propagation rules according to the precision of the calculation being performed. A method of performing calculations in a floating point arithmetic unit includes dynamically determining if a calculation to be performed is to be a quad precision calculation or a double precision calculation. If it is determined that a quad precision calculation is to be performed, quad precision NaN propagation rules are selected and a quad precision calculation is performed using the selected quad precision NaN propagation rules. Likewise, if it is determined that a double precision calculation is to be performed, double precision NaN propagation rules are selected and a double precision calculation is performed using the selected double precision NaN propagation rules. By providing more than one set of NaN propagation rules and selecting one of the sets of NaN propagation rules depending on the precision of the calculation being performed, propagation of NaNs in conformance with IEEE standards can be assured. The method and apparatus are easily extended to higher precision calculations to ensure proper propagation of NaNs regardless of the precision calculation.

    摘要翻译: 浮点算术单元提供NaN的一致传播,同时对设计用于执行较低精度计算的硬件执行高精度计算。 在一个实施例中,浮点算术单元设置有存储多于一组NaN传播规则的微代码存储器。 在操作中,浮点算术单元根据正在执行的计算的精度访问NaN传播规则集合中的一个。 在浮点算术单元中执行计算的方法包括动态地确定要执行的计算是四精度计算还是双精度计算。 如果确定要执行四次精度计算,则选择四精度NaN传播规则,并且使用所选择的四次精度NaN传播规则执行四次精度计算。 同样,如果确定要执行双精度计算,则选择双精度NaN传播规则,并且使用所选择的双精度NaN传播规则执行双精度计算。 通过提供多套NaN传播规则,并根据正在执行的计算精度选择一组NaN传播规则,可以确保符合IEEE标准的NaN传播。 该方法和装置易于扩展到更高精度的计算,以确保NaN的适当传播,而不考虑精度计算。