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1.发明申请公开(公告)号：US20140053008A1
公开(公告)日：2014-02-20
申请号：US13586517
申请日：2012-08-15
申请人： Guillermo Juan Rozas
发明人： Guillermo Juan Rozas
IPC分类号： G06F1/00
CPC分类号： G06F1/3237 , G06F1/3228 , G06F9/3824 , G06F9/3869 , G06F11/0706 , G06F11/0751 , G06F11/0793 , G06F11/3024 , G06F2201/87 , G06F2201/88 , Y02D10/128
摘要： A system and method for power management by performing clock-gating at a clock source. In the method a critical stall condition is detected within a clocked component of a core of a processing unit. The core includes one or more clocked components synchronized in operation by a clock signal distributed by a clock grid. The clock grid is clock-gated to suspend distribution of the clock signal to the core during the critical stall condition.
摘要翻译： 一种用于通过在时钟源上执行时钟门控来进行电源管理的系统和方法。 在该方法中，在处理单元的核心的时钟分量内检测到临界失速条件。 核心包括由时钟网格分配的时钟信号在同步操作中的一个或多个时钟元件。 时钟网格是时钟门控的，以在暂停失速状态下暂停时钟信号分配给核心。
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公开(公告)号：US20110072248A1
公开(公告)日：2011-03-24
申请号：US12815201
申请日：2010-06-14
IPC分类号： G06F9/38
CPC分类号： G06F9/30072 , G06F9/3851 , G06F9/3887
摘要： One embodiment of the present invention sets forth a mechanism for managing thread divergence in a thread group executing a multithreaded processor. A unanimous branch instruction, when executed, causes all the active threads in the thread group to branch only when each thread in the thread group agrees to take the branch. In such a manner, thread divergence is eliminated. A branch-any instruction, when executed, causes all the active threads in the thread group to branch when at least one thread in the thread group agrees to take the branch.
摘要翻译： 本发明的一个实施例提出了一种用于管理执行多线程处理器的线程组中的线程发散的机制。 一致的分支指令执行时，只有当线程组中的每个线程同意采用分支时，才能使线程组中的所有活动线程分支。 以这种方式消除螺纹发散。 分支 - 任何指令执行时，会导致线程组中的所有活动线程在线程组中的至少一个线程同意分支时分支。
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3.发明授权
公开(公告)号：US6151669A
公开(公告)日：2000-11-21
申请号：US169481
申请日：1998-10-10
申请人： Jerome C. Huck , Peter Markstein , Glenn T. Colon-Bonet , Alan H. Karp , Roger Golliver , Michael Morrison , Gautam B. Doshi , Guillermo Juan Rozas
发明人： Jerome C. Huck , Peter Markstein , Glenn T. Colon-Bonet , Alan H. Karp , Roger Golliver , Michael Morrison , Gautam B. Doshi , Guillermo Juan Rozas
CPC分类号： G06F9/30014 , G06F9/30094 , G06F9/3842
摘要： A floating-point unit of a computer includes a floating-point computation it, floating-point registers and a floating-point status register. The floating-point status register may include a main status field and one or more alternate status fields. Each of the status fields contains flag and control information. Different floating-point operations may be associated with different status fields. Subfields of the floating-point status register may be updated dynamically during operation. The control bits of the alternate status fields may include a trap disable bit for deferring interruptions during speculative execution. A widest range exponent control bit in the status fields may be used to prevent interruptions when the exponent of an intermediate result is within the range of the register format but exceeds the range of the memory format. The floating-point data may be stored in big endian or little endian format.
摘要翻译： 计算机的浮点单元包括浮点计算单元，浮点寄存器和浮点状态寄存器。 浮点状态寄存器可以包括主状态字段和一个或多个备用状态字段。 每个状态字段都包含标志和控制信息。 不同的浮点运算可能与不同的状态字段相关联。 浮点状态寄存器的子字段可以在操作期间动态更新。 替代状态字段的控制位可以包括用于在推测执行期间推迟中断的陷阱禁止位。 当中间结果的指数在寄存器格式的范围内但超出存储器格式的范围时，可以使用状态字段中的最大范围指数控制位来防止中断。 浮点数据可以以大端或小端格式存储。
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4.发明授权公开(公告)号：US06370639B1
公开(公告)日：2002-04-09
申请号：US09169482
申请日：1998-10-10
申请人： Jerome C. Huck , Peter Markstein , Glenn T. Colon-Bonet , Alan H. Karp , Roger Golliver , Michael Morrison , Gautam B. Doshi , Guillermo Juan Rozas
发明人： Jerome C. Huck , Peter Markstein , Glenn T. Colon-Bonet , Alan H. Karp , Roger Golliver , Michael Morrison , Gautam B. Doshi , Guillermo Juan Rozas
IPC分类号： G06F9312
CPC分类号： G06F9/3865 , G06F9/30014 , G06F9/30094 , G06F9/3842
摘要： A floating-point unit of a computer includes a floating-point computation unit, floating-point registers and a floating-point status register. The floating-point status register may include a main status field and one or more alternate status fields. Each of the status fields contains flag and control information. Different floating-point operations may be associated with different status fields. Subfields of the floating-point status register may be updated dynamically during operation. The control bits of the alternate status fields may include a trap disable bit for deferring interruptions during speculative execution. A widest range exponent control bit in the status fields may be used to prevent interruptions when the exponent of an intermediate result is within the range of the register format but exceeds the range of the memory format. The floating-point data may be stored in big endian or little endian format.
摘要翻译： 计算机的浮点单元包括浮点计算单元，浮点寄存器和浮点状态寄存器。 浮点状态寄存器可以包括主状态字段和一个或多个备用状态字段。 每个状态字段都包含标志和控制信息。 不同的浮点运算可能与不同的状态字段相关联。 浮点状态寄存器的子字段可以在操作期间动态更新。 替代状态字段的控制位可以包括用于在推测执行期间推迟中断的陷阱禁止位。 当中间结果的指数在寄存器格式的范围内但超出存储器格式的范围时，可以使用状态字段中的最大范围指数控制位来防止中断。 浮点数据可以以大端或小端格式存储。
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5.发明授权Method and system for automatic clock-gating of a clock grid at a clock source 有权时钟源时钟网格自动时钟门控的方法和系统公开(公告)号：US09323315B2
公开(公告)日：2016-04-26
申请号：US13586517
申请日：2012-08-15
申请人： Guillermo Juan Rozas
发明人： Guillermo Juan Rozas
CPC分类号： G06F1/3237 , G06F1/3228 , G06F9/3824 , G06F9/3869 , G06F11/0706 , G06F11/0751 , G06F11/0793 , G06F11/3024 , G06F2201/87 , G06F2201/88 , Y02D10/128
摘要： A system and method for power management by performing clock-gating at a clock source. In the method a critical stall condition is detected within a clocked component of a core of a processing unit. The core includes one or more clocked components synchronized in operation by a clock signal distributed by a clock grid. The clock grid is clock-gated to suspend distribution of the clock signal to the core during the critical stall condition.
摘要翻译： 一种用于通过在时钟源上执行时钟门控来进行电源管理的系统和方法。 在该方法中，在处理单元的核心的时钟分量内检测到临界失速条件。 核心包括由时钟网格分配的时钟信号在同步操作中的一个或多个时钟元件。 时钟网格是时钟门控的，以在暂停失速状态下暂停时钟信号分配给核心。
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公开(公告)号：US08677106B2
公开(公告)日：2014-03-18
申请号：US12815226
申请日：2010-06-14
IPC分类号： G06F9/32
CPC分类号： G06F9/30072 , G06F9/3851 , G06F9/3887
摘要： One embodiment of the present invention sets forth a mechanism for managing thread divergence in a thread group executing a multithreaded processor. A unanimous branch instruction, when executed, causes all the active threads in the thread group to branch only when each thread in the thread group agrees to take the branch. In such a manner, thread divergence is eliminated. A branch-any instruction, when executed, causes all the active threads in the thread group to branch when at least one thread in the thread group agrees to take the branch.
摘要翻译： 本发明的一个实施例提出了一种用于管理执行多线程处理器的线程组中的线程发散的机制。 一致的分支指令执行时，只有当线程组中的每个线程同意采用分支时，才能使线程组中的所有活动线程分支。 以这种方式消除螺纹发散。 分支 - 任何指令执行时，会导致线程组中的所有活动线程在线程组中的至少一个线程同意分支时分支。
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公开(公告)号：US08615646B2
公开(公告)日：2013-12-24
申请号：US12815201
申请日：2010-06-14
IPC分类号： G06F9/32
CPC分类号： G06F9/30072 , G06F9/3851 , G06F9/3887
摘要： One embodiment of the present invention sets forth a mechanism for managing thread divergence in a thread group executing a multithreaded processor. A unanimous branch instruction, when executed, causes all the active threads in the thread group to branch only when each thread in the thread group agrees to take the branch. In such a manner, thread divergence is eliminated. A branch-any instruction, when executed, causes all the active threads in the thread group to branch when at least one thread in the thread group agrees to take the branch.
摘要翻译： 本发明的一个实施例提出了一种用于管理执行多线程处理器的线程组中的线程发散的机制。 一致的分支指令执行时，只有当线程组中的每个线程同意采用分支时，才能使线程组中的所有活动线程分支。 以这种方式消除螺纹发散。 分支 - 任何指令执行时，会导致线程组中的所有活动线程在线程组中的至少一个线程同意分支时分支。
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公开(公告)号：US20110078418A1
公开(公告)日：2011-03-31
申请号：US12881065
申请日：2010-09-13
IPC分类号： G06F9/38
CPC分类号： G06F9/30058 , G06F9/3851
摘要： One embodiment of the present invention sets forth a method for executing a non-local return instruction in a parallel thread processor. The method comprises the steps of receiving, within the thread group, a first long jump instruction and, in response, popping a first token from the execution stack. The method also comprises determining whether the first token is a first long jump token that was pushed onto the execution stack when a first push instruction associated with the first long jump instruction was executed, and when the first token is the first long jump token, jumping to the second instruction based on the address specified by the first long jump token, or, when the first token is not the first long jump token, disabling the active thread until the first long jump token is popped from the execution stack.
摘要翻译： 本发明的一个实施例提出了一种用于在并行线程处理器中执行非本地返回指令的方法。 该方法包括以下步骤：在线程组内接收第一长跳转指令，作为响应，从执行堆栈中弹出第一个令牌。 该方法还包括当与第一长跳转指令相关联的第一推送指令被执行时，确定第一令牌是否是被推送到执行堆栈上的第一长跳转令牌，以及当第一令牌是第一长跳转令牌时，跳转 基于由第一长跳转令牌指定的地址到第二指令，或者当第一令牌不是第一长跳转令牌时，禁用活动线程，直到从执行堆栈弹出第一个长跳转令牌。
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公开(公告)号：US20110072249A1
公开(公告)日：2011-03-24
申请号：US12815226
申请日：2010-06-14
IPC分类号： G06F9/38
CPC分类号： G06F9/30072 , G06F9/3851 , G06F9/3887
摘要： One embodiment of the present invention sets forth a mechanism for managing thread divergence in a thread group executing a multithreaded processor. A unanimous branch instruction, when executed, causes all the active threads in the thread group to branch only when each thread in the thread group agrees to take the branch. In such a manner, thread divergence is eliminated. A branch-any instruction, when executed, causes all the active threads in the thread group to branch when at least one thread in the thread group agrees to take the branch.
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公开(公告)号：US08572355B2
公开(公告)日：2013-10-29
申请号：US12881065
申请日：2010-09-13
IPC分类号： G06F9/30
CPC分类号： G06F9/30058 , G06F9/3851
摘要： One embodiment of the present invention sets forth a method for executing a non-local return instruction in a parallel thread processor. The method comprises the steps of receiving, within the thread group, a first long jump instruction and, in response, popping a first token from the execution stack. The method also comprises determining whether the first token is a first long jump token that was pushed onto the execution stack when a first push instruction associated with the first long jump instruction was executed, and when the first token is the first long jump token, jumping to the second instruction based on the address specified by the first long jump token, or, when the first token is not the first long jump token, disabling the active thread until the first long jump token is popped from the execution stack.
摘要翻译： 本发明的一个实施例提出了一种用于在并行线程处理器中执行非本地返回指令的方法。 该方法包括以下步骤：在线程组内接收第一长跳转指令，作为响应，从执行堆栈中弹出第一个令牌。 该方法还包括当与第一长跳转指令相关联的第一推送指令被执行时，确定第一令牌是否是被推送到执行堆栈上的第一长跳转令牌，以及当第一令牌是第一长跳转令牌时，跳转 基于由第一长跳转令牌指定的地址到第二指令，或者当第一令牌不是第一长跳转令牌时，禁用活动线程，直到从执行堆栈弹出第一个长跳转令牌。
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