Operation method for a computer system
    51.
    发明授权
    Operation method for a computer system 有权
    计算机系统的操作方法

    公开(公告)号:US08838866B2

    公开(公告)日:2014-09-16

    申请号:US13349178

    申请日:2012-01-12

    CPC classification number: G06F13/4027 G06F2213/0026 G06F2213/0032

    Abstract: A device receives a standard command. The device judges whether an address field and/or a data length field and/or a data field of the standard command includes at least one of a vendor command, a vendor data and a checkword. The device judges whether the address field and/or a data length field and/or the data field of the standard command matches a vendor predetermined pattern. If matched, the device performs a vendor operation based on the vendor command and/or the vendor data of the standard command.

    Abstract translation: 设备接收标准命令。 设备判断标准命令的地址字段和/或数据长度字段和/或数据字段是否包括供应商命令,供应商数据和检查词中的至少一个。 设备判断标准命令的地址字段和/或数据长度字段和/或数据字段是否匹配供应商预定模式。 如果匹配,设备将根据供应商命令和/或标准命令的供应商数据执行供应商操作。

    TRANSMISSION APPARATUS AND SYSTEM OF USING THE SAME
    52.
    发明申请
    TRANSMISSION APPARATUS AND SYSTEM OF USING THE SAME 有权
    传输装置及其使用系统

    公开(公告)号:US20130181957A1

    公开(公告)日:2013-07-18

    申请号:US13741499

    申请日:2013-01-15

    Inventor: CHIUN-SHIU CHEN

    CPC classification number: G09G5/00 G06F3/1454 G06F13/105 G09G2354/00 H04W48/18

    Abstract: A transmission system includes a transmission apparatus, a first electronic device and a second electronic device electrically connected to one another. The first electronic includes a composite driver, a first application program, a first display image and a virtual display device. The first composite driver emulates the virtual display device according to the first display image. The second electronic device includes a second application program and a second display image. The transmission interface includes a transmission controller and two transmission interfaces. The two transmission interfaces are connected to the first electronic device and the second electronic device, respectively. When the first application program transmits output data corresponding to the virtual display device via the two transmission interfaces and the transmission controller to the second application program, a virtual display image corresponding to the first display image is presented on the second display image.

    Abstract translation: 传输系统包括彼此电连接的传输设备,第一电子设备和第二电子设备。 第一电子包括复合驱动器,第一应用程序,第一显示图像和虚拟显示装置。 第一复合驱动器根据第一显示图像模拟虚拟显示设备。 第二电子设备包括第二应用程序和第二显示图像。 传输接口包括传输控制器和两个传输接口。 两个传输接口分别连接到第一电子设备和第二电子设备。 当第一应用程序经由两个传输接口和传输控制器将对应于虚拟显示设备的输出数据发送到第二应用程序时,在第二显示图像上呈现与第一显示图像相对应的虚拟显示图像。

    USB interface provided with host/device function and its control method
    53.
    发明授权
    USB interface provided with host/device function and its control method 有权
    USB接口提供主机/设备功能及其控制方式

    公开(公告)号:US07895386B2

    公开(公告)日:2011-02-22

    申请号:US11657575

    申请日:2007-01-25

    CPC classification number: G06F13/4022 G06F13/426

    Abstract: A USB interface provided with USB host/device function and its control method is disclosed. The USB interface includes a control unit, a USB host, a USB device, a memory, a port router and a plurality of connection ports. The control unit is used to define the connection ports to be either an upstream port or downstream port. It also controls signal flows within the USB control interface. The signal flows are provided for the USB host and the USB device. The memory is used to store data during the operation of the USB control interface. The USB host is coupled to an external device via the port router, and the USB device is coupled to an external host via the port router.

    Abstract translation: 公开了具有USB主机/设备功能的USB接口及其控制方法。 USB接口包括控制单元,USB主机,USB设备,存储器,端口路由器和多个连接端口。 控制单元用于将连接端口定义为上游端口或下游端口。 它还控制USB控制接口内的信号流。 为USB主机和USB设备提供信号流。 存储器用于在USB控制接口的操作期间存储数据。 USB主机通过端口路由器耦合到外部设备,USB设备通过端口路由器耦合到外部主机。

    BRIDGE, DATA COMPRESSING METHOD THEREOF AND COMPUTER SYSTEM APPLYING THE SAME
    54.
    发明申请
    BRIDGE, DATA COMPRESSING METHOD THEREOF AND COMPUTER SYSTEM APPLYING THE SAME 审中-公开
    桥梁,数据压缩方法及其应用的计算机系统

    公开(公告)号:US20100202468A1

    公开(公告)日:2010-08-12

    申请号:US12635007

    申请日:2009-12-10

    Inventor: Ming-Cheng Chang

    CPC classification number: H03M7/30 G06F13/385 G06F2213/3804

    Abstract: Provided is a bridge coupled between an external host and an external storage device. The bridge includes a first interface, an encoder, a memory device, a decoder and a second interface. The first interface is coupled to the external host and receives a first data from an external host. The encoder is coupled to the first interface and compresses the first data by undistorted compression for producing a second data. The memory device is coupled to the encoder and temporally stores the second data produced by the encoder. The decoder is coupled to the memory device and decompresses the second data stored in the memory device for producing a third data. The third data and the first data are substantially the same. The second interface is coupled between the decoder and the external storage device and outputs the third data transmitted from the decoder to the external storage device.

    Abstract translation: 提供了耦合在外部主机和外部存储设备之间的桥。 该桥包括第一接口,编码器,存储器件,解码器和第二接口。 第一个接口耦合到外部主机,并从外部主机接收第一个数据。 编码器耦合到第一接口并且通过未失真压缩来压缩第一数据以产生第二数据。 存储器件耦合到编码器并在时间上存储由编码器产生的第二数据。 解码器耦合到存储器件并解压存储在存储器件中的第二数据,以产生第三数据。 第三数据和第一数据基本相同。 第二接口耦合在解码器和外部存储装置之间,并将从解码器发送的第三数据输出到外部存储装置。

    VOLTAGE REGULATOR
    55.
    发明申请
    VOLTAGE REGULATOR 有权
    电压稳压器

    公开(公告)号:US20100176775A1

    公开(公告)日:2010-07-15

    申请号:US12400809

    申请日:2009-03-10

    CPC classification number: G05F1/56

    Abstract: A voltage regulator includes a comparator, a first voltage output unit, a second voltage output unit, a third voltage output unit, a first switch and a second switch. The voltage regulator receives an operating voltage and a reference voltage generated by a reference voltage generator, and then outputs a corresponding output voltage. The voltage regulator of the present invention can provide an operation mode, a suspend mode and a standby mode and can be switched among these modes to provide corresponding current driving capacity for respective operation states. When in the operation mode, the voltage regulator can supply a great current. When in the suspend mode, the voltage regulator consumes less power. When in the standby mode, the voltage regulator consumes even less power.

    Abstract translation: 电压调节器包括比较器,第一电压输出单元,第二电压输出单元,第三电压输出单元,第一开关和第二开关。 电压调节器接收由参考电压发生器产生的工作电压和参考电压,然后输出相应的输出电压。 本发明的电压调节器可以提供操作模式,暂停模式和待机模式,并且可以在这些模式之间切换,以为相应的操作状态提供对应的电流驱动能力。 在运行模式下,电压调节器可以提供较大的电流。 当处于暂停模式时,电压调节器消耗的功率较小。 当处于待机模式时,电压调节器消耗更少的功率。

    Global positioning system receiver and correlating circuit thereof
    56.
    发明授权
    Global positioning system receiver and correlating circuit thereof 有权
    全球定位系统接收机及其相关电路

    公开(公告)号:US07574301B2

    公开(公告)日:2009-08-11

    申请号:US11464117

    申请日:2006-08-11

    Applicant: Chia-Chang Hsu

    Inventor: Chia-Chang Hsu

    CPC classification number: G01S19/29 G01S19/30

    Abstract: A global positioning System receiver and a correlating circuit thereof are disclosed. They sequentially and in parallel generate the portion of bits of the C/A code representing the satellite, sequentially and in parallel generate the portion of bits of the corrected frequency code of Doppler effect, and sequentially outputs the portion of bits of the C/A code and the corrected frequency code therefrom for multiplying the data and the IF data and for adding the multiplications therefrom for generating the total addition values.

    Abstract translation: 公开了一种全球定位系统接收机及其相关电路。 它们顺序地并且并行地产生表示卫星的C / A码的比特的一部分,并且并行地生成校正的多普勒效应的频率码的比特的一部分,并且顺序地输出C / A的比特的部分 代码及其校正的频率代码,用于对数据和IF数据进行乘法和加法,以产生总加法值。

    Phase-difference detecting apparatus and method
    57.
    发明申请
    Phase-difference detecting apparatus and method 有权
    相位差检测装置及方法

    公开(公告)号:US20080129344A1

    公开(公告)日:2008-06-05

    申请号:US11898043

    申请日:2007-09-07

    CPC classification number: H03D13/00

    Abstract: A phase-difference detecting method is for detecting phase difference between a first signal and a second signal of the same frequency. First, generate a detection signal. Next, sample the detection signal respectively according to the first signal and the second signal to obtain a first sample value and a second sample value. Then, determine whether a determination condition that the first and the second sample values are respectively equal to the previous first and second sample values is satisfied. When the determination condition is unsatisfied for the first time, record a delay time of the detection signal as a first time. When the determination condition is unsatisfied for the second time, record a delay time of the detection signal as a second time. Obtain the phase difference between the first signal and the second signal according to the first time and the second time.

    Abstract translation: 相位差检测方法用于检测第一信号和相同频率的第二信号之间的相位差。 首先,生成检测信号。 接下来,根据第一信号和第二信号分别对检测信号进行采样,以获得第一采样值和第二采样值。 然后,确定是否满足第一和第二样本值分别等于先前的第一和第二样本值的确定条件。 当第一次不满足确定条件时,首先记录检测信号的延迟时间。 当第二次确定条件不满足时,第二次记录检测信号的延迟时间。 根据第一次和第二次获取第一信号和第二信号之间的相位差。

    System and method of oversampling high speed clock/data recovery
    58.
    发明申请
    System and method of oversampling high speed clock/data recovery 有权
    过采样高速时钟/数据恢复的系统和方法

    公开(公告)号:US20060125665A1

    公开(公告)日:2006-06-15

    申请号:US11312694

    申请日:2005-12-21

    Applicant: Christine Lin

    Inventor: Christine Lin

    CPC classification number: H04L7/0337

    Abstract: A system and method of high speed clock/data recovery, which is used to recover the high speed clock/data through oversampling technique, wherein the internal clock with frequency lower than the high speed data is used for data recovery. Only three clocks are used in the digital circuit without involving all the oversampling clock phases to make the design timing complicated and critical. The system and method provide a simple clock structure to implement the digital circuit of high speed clock/data recovery in a robust and easy way. Furthermore a phase selection mechanism which decides the clock phase of the high speed data is provided as well.

    Abstract translation: 高速时钟/数据恢复系统和方法,用于通过过采样技术恢复高速时钟/数据,其中频率低于高速数据的内部时钟用于数据恢复。 数字电路中仅使用三个时钟,而不涉及所有过采样时钟相位,从而使设计时序复杂且至关重要。 该系统和方法提供了一种简单的时钟结构,以强大而简单的方式实现高速时钟/数据恢复的数字电路。 此外,还提供了决定高速数据的时钟相位的相位选择机构。

    Training circuit and method of digital-analog converter and analog-digital converter
    59.
    发明授权
    Training circuit and method of digital-analog converter and analog-digital converter 失效
    数模转换器和模拟数字转换器的训练电路和方法

    公开(公告)号:US07034724B2

    公开(公告)日:2006-04-25

    申请号:US10904545

    申请日:2004-11-16

    Applicant: Chin-Lung Lin

    Inventor: Chin-Lung Lin

    CPC classification number: H03M1/1061 H03M1/804

    Abstract: A training method of a digital-analog converter is provided. The digital-analog converter comprises a plurality of parallel capacitors, each of which is floatingly coupled to a plurality of correcting capacitors. Two voltages outputted from the digital-analog converter are received and compared. When a latter output voltage is lower than or equal to a former output voltage, the correcting capacitor is used to correct the capacitor corresponding to the latter output voltage until the latter output voltage is higher than the former output voltage. When the latter output voltage is higher than the former output voltage, a new voltage is outputted from the digital-analog convert and compared with the latter output voltage. The steps of comparing and correcting are repeated until every latter output voltage is higher than every former output voltage.

    Abstract translation: 提供了数模转换器的训练方法。 数模转换器包括多个并联电容器,每个并联电容器浮动耦合到多个校正电容器。 接收并比较从数模转换器输出的两个电压。 当后一个输出电压低于或等于前一个输出电压时,校正电容器用于校正与后一个输出电压相对应的电容,直到后一个输出电压高于前一个输出电压。 当后一个输出电压高于前一个输出电压时,从数模转换器输出一个新的电压,并与后一个输出电压进行比较。 重复比较和校正的步骤,直到每个后一个输出电压高于每个先前的输出电压。

    Motor drive circuit and method with frequency setting and correcting functions
    60.
    发明授权
    Motor drive circuit and method with frequency setting and correcting functions 有权
    电机驱动电路及其频率设定和校正功能的方法

    公开(公告)号:US06933699B2

    公开(公告)日:2005-08-23

    申请号:US10385604

    申请日:2003-03-12

    CPC classification number: H02P6/08

    Abstract: A motor drive circuit and method with frequency setting and correcting functions. The drive circuit includes a speed control device, which simultaneously receives a sense signal and a rotation frequency signal. A pulse width modulation signal capable of modulating a duty ratio may be generated by a pulse width modulation method. The pulse width modulation signal is then transferred to a drive timing controller that generates a timing control signal to control output timing of a power drive signal for the drive circuit. Meanwhile, a sensor is used to detect a motor and to generate a correction sense signal, which is immediately fed back to the speed control device to form a closed loop control, so that the rotation frequency of the motor may be automatically corrected and set.

    Abstract translation: 具有频率设定和校正功能的电机驱动电路及方法。 驱动电路包括速度控制装置,其同时接收感测信号和旋转频率信号。 可以通过脉冲宽度调制方法产生能够调制占空比的脉宽调制信号。 然后将脉冲宽度调制信号传送到驱动定时控制器,该驱动定时控制器产生定时控制信号以控制用于驱动电路的功率驱动信号的输出定时。 同时,传感器用于检测电动机并产生校正感测信号,该校正感测信号立即反馈到速度控制装置以形成闭环控制,从而可以自动校正和设定电动机的旋转频率。

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