公开(公告)号：US20060176062A1

公开(公告)日：2006-08-10

申请号：US11032424

申请日：2005-01-10

Applicant: Wuqiang Yang ,  A. Hennessey

Inventor： Wuqiang Yang ,  A. Hennessey

IPC: G01R27/26

CPC classification number: G01V3/08 ,  A61B5/0522 ,  G01N27/221 ,  G01R27/00

Abstract: Security scanning devices based on electrical tomography, including tomography systems based on the measurement of capacitance (ECT) and electromagnetic tomography (EMT), in combination with knowledge-based image analysis and understanding. Each device includes a sensing head or transducer, sensing electronics, image reconstruction and image analysis microprocessor, a display unit and accompanying software for identifying dangerous materials and items. The security scanning devices are employed for obtaining multiple independent measurements and enable implementation of data fusion to combine the complementary sensitivity of ECT and EMT to different material properties, while providing architecture to implement image knowledge bases, which characterize objects, whose image attributes are acquired from multiple sensors.

Abstract translation: 基于电断层扫描的安全扫描装置，包括基于电容测量（ECT）和电磁层析成像（EMT）的断层扫描系统，结合基于知识的图像分析和理解。 每个设备包括感测头或换能器，感测电子器件，图像重建和图像分析微处理器，显示单元和用于识别危险材料和物品的附带软件。 安全扫描装置被用于获得多个独立的测量，并且能够实现数据融合，以将ECT和EMT的互补灵敏度与不同的材料属性相结合，同时提供架构来实现图像知识库，其表征对象，其图像属性从 多个传感器。

公开(公告)号：US07042242B2

公开(公告)日：2006-05-09

申请号：US10852902

申请日：2004-05-25

Applicant: Kevin Gearhardt

Inventor： Kevin Gearhardt

IPC: G01R31/26

CPC classification number: G01R31/31715 ,  G01R27/00

Abstract: A circuit which includes the addition of test points and analog circuitry required to perform a four-point measurement technique. Test points are fed to an analog multiplexer which is under control of test logic added to the design to facilitate the testing. The output of the analog multiplexer is fed directly to an n-bit Analog-to-Digital Converter (ADC), when the number of bits is determined by the measurement resolution required for the circuit to be tested. The ADC is controlled by digital test logic instantiated in the design to perform the BIST operation. A known current is injected and held constant during the entire BIST operation, and the BIST logic performs voltage measurements. The voltage differential is compared by the BIST circuitry based on the values obtained from the ADC. Then, a pass/fail bit can be passed to a signal pin on the device to be compared by the ATE.

Abstract translation: 包括添加测试点和执行四点测量技术所需的模拟电路的电路。 测试点被馈送到模拟多路复用器，该模拟多路复用器受到添加到设计中的测试逻辑的控制以便于测试。 当比特数由测试电路所需的测量分辨率决定时，模拟多路复用器的输出直接馈送到n位模数转换器（ADC）。 ADC由设计中实例化的数字测试逻辑控制，以执行BIST操作。 在整个BIST操作期间，已知电流被注入并保持恒定，并且BIST逻辑执行电压测量。 基于从ADC获得的值，通过BIST电路比较电压差。 然后，通过/失败位可以传递到设备上的信号引脚，以通过ATE进行比较。

公开(公告)号：US20060028216A1

公开(公告)日：2006-02-09

申请号：US11191993

申请日：2005-07-29

Applicant: Kiyoshi Murase

Inventor： Kiyoshi Murase

IPC: G01R27/08

CPC classification number: G01R1/067 ,  G01R27/00

Abstract: A probe for surface-resistivity measurement is provided in a surface-resistivity measuring apparatus for measuring a surface resistivity of a target. The probe includes an electrode and a contact portion. The contact portion has a specific resistance larger than the electrode. The contact portion is disposed on the electrode. The contact portion is capable of surface-contact with the target.

公开(公告)号：US5848265A

公开(公告)日：1998-12-08

申请号：US920200

申请日：1997-08-25

Applicant: Michael F. Maas ,  Bret A. Oeltjen

Inventor： Michael F. Maas ,  Bret A. Oeltjen

IPC: G01R27/00 ,  G06F1/04

CPC classification number: G01R27/00

Abstract: A circuit for measuring the frequency difference between a reference clock and a second clock. The circuit presents a first output in response to a phase crossing between the two clocks. A second circuit presents a second output in response to the first output and the reference clock.

Abstract translation: 用于测量参考时钟和第二时钟之间的频率差的电路。 该电路响应于两个时钟之间的相位交叉而呈现第一输出。 第二电路响应于第一输出和参考时钟呈现第二输出。

公开(公告)号：US5691644A

公开(公告)日：1997-11-25

申请号：US644397

申请日：1996-05-10

Applicant: Boris M. Danilyak

Inventor： Boris M. Danilyak

IPC: G01R27/00 ,  G01R31/02

CPC classification number: G01R27/00

Abstract: A method of use and system for determining the longitudinal active resistance of a neutral conductor of an underground electrical cable, while the electrical cable remains in service. The method is conducted by applying a selective frequency test current signal to the neutral conductor of the underground cable connected between a pair of grounded structures, e.g., power transformers, from a test signal generator that is connected across the neutral conductor using first and second bifilar winding signal-voltage cables. The method utilizes indirect voltage determination to obtain the voltage drop across the neutral conductor while mitigating induced voltage effects which occur when direct voltage measurement is used. A plurality of selective frequency test current signals are used to obtain a plurality of longitudinal active resistance values. Any conventional extrapolation method is then used to obtain a longitudinal active resistance value at 0 Hz. A further enhancement to this method of use and system is addition of a current balance test and a current partition test. The current balance test determines the ratio of the test current in/out of neutral conductor under test, thereby providing an indication of the electrical continuity or breaks of the neutral conductor. The current partition test determines the ratio of the test current in the neutral conductor to the generator test current, thereby providing a relative indication of the amount of test current actually passing through the neutral conductor under test.

Abstract translation: 一种使用的方法和用于确定地下电缆的中性导体的纵向有源电阻的系统，同时电缆保持在使用中。 该方法是通过向连接在一对接地结构（例如电力变压器）的地下电缆的中性导体施加选择性频率测试电流信号，该测试信号发生器使用第一和第二双向连接在中性导体上 绕组信号电压电缆。 该方法利用间接电压确定来获得跨过中性导体的电压降，同时减轻当使用直流电压测量时发生的感应电压效应。 使用多个选择频率测试电流信号来获得多个纵向有源电阻值。 然后使用任何常规的外推法来获得0Hz的纵向有源电阻值。 对这种使用方法和系统的进一步改进是增加了当前的平衡测试和当前的分区测试。 当前的平衡测试确定了被测试中的中性导体的测试电流的比率，从而提供了中性导线的电气连续性或断路的指示。 当前分区测试确定中性导体中的测试电流与发电机测试电流的比率，从而提供实际通过被测中性导体的测试电流量的相对指示。

公开(公告)号：US5532590A

公开(公告)日：1996-07-02

申请号：US261154

申请日：1994-06-17

Applicant: Haruhiko Yamanaka

Inventor： Haruhiko Yamanaka

IPC: G01R27/28 ,  G01R27/00 ,  G01R33/12 ,  G01R33/14

CPC classification number: G01R27/00 ,  G01R33/12

Abstract: A measuring circuit obtains desired characteristic values of a device under test by accurately measuring a voltage and a current. Errors are eliminated that originate from the transmission characteristics of cables used in measurements at high frequencies and measurements using long cables. The errors are eliminated by connecting resistors that are equal in resistance to the characteristic impedance of cables, to the inputs of the cables which connect the device under test to a measuring device.

Abstract translation: 测量电路通过精确测量电压和电流来获得被测器件的期望特性值。 消除了来自高频测量的电缆的传输特性以及使用长电缆测量的误差。 通过将与电缆的特性阻抗相等的电阻连接到将被测设备连接到测量装置的电缆的输入端来消除误差。

公开(公告)号：US5369372A

公开(公告)日：1994-11-29

申请号：US838419

申请日：1992-03-09

Applicant: Wilfried Vandervorst ,  Marc Meuris

Inventor： Wilfried Vandervorst ,  Marc Meuris

IPC: G01Q60/16 ,  G01R27/00 ,  G01R27/20 ,  G01R31/26 ,  G01R27/08

CPC classification number: B82Y35/00 ,  G01R27/00 ,  G01R27/205 ,  G01R31/2648 ,  Y10S977/854

Abstract: A method for measuring the resistance or conductivity between two or more conductors which are placed against a semiconductor element, wherein in order to bring the contact resistance between the conductors and the element to, to hold it at,a predetermined value during measuring, the conductors are held at a constant distance and/or under constant pressure relative to the semiconductor element.

Abstract translation: PCT No.PCT / EP91 / 01294 Sec。 371日期：1992年3月9日 102（e）1992年3月9日PCT PCT 1991年7月9日PCT公布。 出版物WO92 / 01233 日本1992年1月23日。一种用于测量放置在半导体元件上的两个或多个导体之间的电阻或电导率的方法，其中为了使导体和元件之间的接触电阻保持在 测量期间的预定值，导体相对于半导体元件保持恒定的距离和/或恒定的压力。

公开(公告)号：US5227720A

公开(公告)日：1993-07-13

申请号：US862148

申请日：1992-04-02

Applicant: Dan A. Gross ,  Mark E. Vermilyea

Inventor： Dan A. Gross ,  Mark E. Vermilyea

IPC: G01N27/02 ,  G01R27/00 ,  G01R33/12

CPC classification number: G01R33/1238 ,  G01N27/023 ,  G01R27/00 ,  Y10S505/843

Abstract: This invention relates to an apparatus and method for measuring the resistance of superconductors. Structures of this type, generally, allow the resistance of the superconductor to be accurately measured in a non-destructive manner by using a bifilar coil which includes an integrated loop/switch formed from the bifilar coil.

Abstract translation: 本发明涉及一种用于测量超导体电阻的装置和方法。 这种结构通常通过使用包括由双线圈形成的集成环路/开关的双线圈，以非破坏性的方式准确地测量超导体的电阻。

公开(公告)号：US5189322A

公开(公告)日：1993-02-23

申请号：US500637

申请日：1990-03-28

Applicant: Melvin D. Chan ,  Brad Sharpe-Geisler

Inventor： Melvin D. Chan ,  Brad Sharpe-Geisler

IPC: G01R27/00 ,  H03K17/00 ,  H03K17/0416

CPC classification number: H03K17/04163 ,  G01R27/00 ,  H03K2217/0036

Abstract: A sense amplifier is provided for sensing an impedance between two lines. The impedance has two levels. The two lines are, in one embodiment, a product term line and a product term ground line of a programmable logic device. In the amplifier, a pull-up circuit connects one of the two lines to a high voltage (for example, V.sub.DD =5 volts), and a pull-down circuit connects the other line to a low voltage (for example, ground). A negative feedback circuit controls the pull-up and pull-down circuits in response to the voltage on one of the two lines so that the impedance of the pull-up circuit changes in direct relationship with respect to the voltage of that line, and the impedance of the pull-down circuit changes in an inverse relationship with respect to that voltage. The feedback circuit has a delay at least as long as the transition of that voltage between its two values, which values correspond to the two impedance levels. The delay permits to increase the transition speed in a power-efficient manner. The delay can be implemented by simple circuitry. The pull-down circuit includes, in some embodiments, two electrical paths structured so as to make the amplifier more tolerant to temperature and process variations.

Abstract translation: 提供读出放大器用于感测两条线之间的阻抗。 阻抗有两个等级。 在一个实施例中，两条线是可编程逻辑器件的乘积项和地线。 在放大器中，上拉电路将两条线路之一连接到高电压（例如，VDD = 5伏特），下拉电路将另一条线路连接到低电压（例如接地）。 负反馈电路响应于两条线路之一上的电压来控制上拉和下拉电路，使得上拉电路的阻抗相对于该线路的电压直接变化，并且 下拉电路的阻抗与该电压成反比关系。 反馈电路的延迟至少与其两个值之间的电压的转变一样长，该值对应于两个阻抗电平。 延迟允许以功率有效的方式增加转换速度。 延迟可以通过简单的电路实现。 在一些实施例中，下拉电路包括两个电路径，其被构造成使得放大器更容忍温度和工艺变化。

公开(公告)号：US5092171A

公开(公告)日：1992-03-03

申请号：US531033

申请日：1990-05-31

Applicant: Werner Wallrafen

Inventor： Werner Wallrafen

IPC: G01P15/125 ,  G01R27/00

CPC classification number: G01P15/125 ,  G01R27/00

Abstract: In an acceleration sensor, in particular for automobiles, at least two electrodes which are surrounded by a dielectric are arranged, substantially parallel to each other, in a housing and immersed over part of their length in an electrically conductive liquid. Flip-flops output pulses having durations based on capacitance of the sensor. Output signals of the flip-flops are combined arithmetically.

Abstract translation: 在加速度传感器中，特别是对于汽车，由电介质围绕的至少两个电极在壳体中基本上彼此平行地布置，并且在其一部分长度上浸入导电液体中。 触发器输出具有基于传感器电容的持续时间的脉冲。 触发器的输出信号以数学方式组合。