Automatic gain control device
    51.
    发明授权
    Automatic gain control device 有权
    自动增益控制装置

    公开(公告)号:US06816013B2

    公开(公告)日:2004-11-09

    申请号:US10614869

    申请日:2003-07-09

    申请人: Hsueh-Wu Kao

    发明人: Hsueh-Wu Kao

    IPC分类号: H03G310

    CPC分类号: H03G3/30

    摘要: An automatic gain control device without being influenced by leakage current of a capacitor. The automatic gain control device includes a first control loop, a second control loop, and a multiplexer. The first control loop receives an input voltage and generates a first AGC voltage accordingly. The second control loop receives the first AGC voltage, registers the first AGC voltage as digital data, and outputs a second AGC voltage by a DAC. The multiplexer chooses the first AGC voltage or the second AGC voltage as an AGC voltage according to a hold signal. Because the second control loop registers the first AGC voltage in a digital format and output the second AGC voltage from the DAC, the AGC voltage can be held constant for a long time without being influenced by leakage current.

    AGC circuit providing control of output signal amplitude and of output signal DC level
    52.
    发明授权
    AGC circuit providing control of output signal amplitude and of output signal DC level 失效
    AGC电路提供输出信号幅度和输出信号DC电平的控制

    公开(公告)号:US06809591B1

    公开(公告)日:2004-10-26

    申请号:US10457558

    申请日:2003-06-10

    申请人: Naomi Ohashi

    发明人: Naomi Ohashi

    IPC分类号: H03G310

    摘要: An AGC circuit suitable for applications such as an optical receiving apparatus includes a differential amplification adjustment circuit section for operating on a pair of input signals to produce a corresponding pair of complementary controlled output signals having a fixed amplitude, a peak detector for detecting a peak value of at least one of the controlled output signals, a DC monitoring circuit for detecting the DC level of at least one of the controlled output signals, and an amplitude fixing control circuit for deriving a value of voltage difference between the peak value and DC level and for generating an amplitude control signal based on comparing the voltage difference with a reference voltage. The differential amplification adjustment circuit section applies a degree of amplification that is determined by the amplitude control signal, to thereby perform feedback control of the output signal amplitude. The AGC circuit can further be configured to control the DC levels of the controlled output signals, so that both DC level and amplitude of the controlled output signals are held constant against changes in DC level and amplitude of the input signals.

    摘要翻译: 适用于诸如光接收装置之类的应用的AGC电路包括差分放大调节电路部分,用于对一对输入信号进行操作以产生具有固定振幅的相应的互补控制输出信号对,用于检测峰值的峰值检测器 控制输出信号中的至少一个,用于检测受控输出信号中的至少一个的DC电平的DC监视电路,以及用于导出峰值和DC电平之间的电压差值的幅度定影控制电路和 用于基于将电压差与参考电压进行比较来产生幅度控制信号。 差分放大调整电路部分施加由幅度控制信号确定的放大程度,从而执行输出信号幅度的反馈控制。 AGC电路还可以被配置为控制受控输出信号的DC电平,使得受控输出信号的DC电平和幅度保持恒定,抵抗输入信号的DC电平和幅度的变化。

    Multimode output stage converting differential to single-ended signals using current-mode input signals
    53.
    发明授权
    Multimode output stage converting differential to single-ended signals using current-mode input signals 有权
    多模输出级使用电流模式输入信号将差分转换为单端信号

    公开(公告)号:US06806771B1

    公开(公告)日:2004-10-19

    申请号:US10159681

    申请日:2002-05-31

    IPC分类号: H03G310

    摘要: An output block for an in-system programmable analog integrated circuit. The output block features an output amplifier that accepts a differential current-mode input signal and provides a single-ended output voltage. The output amplifier is also selectably operable as a linear amplifier, an integrator or a comparator. The output block also includes a common-mode feedback circuit (CMFB), an analog trim circuit (OATRM), a CLAMP circuit, and an offset calibration circuit (CLDAC), all coupled to the differential input of the output amplifier. The CMFB exhibits bandwidth comparable to that of the output amplifier and a drive capability that enables the differential-input to single-ended output conversion. The CLAMP is connected to the differential input in the comparator mode in order to avoid slow recovery from an overdrive condition. The OATRM forces a difference current into the differential input that compensates for a (gain independent) offset voltage that results from various mismatches. The CLDAC uses a digital-to-analog converter (DAC) to perform offset calibration at the differential input of the output amplifier. In addition, the output block is configured to be operational in a number of user-selectable modes, including, in one embodiment, one or more of: a linear (NORM) mode, a comparator (COMP) mode, and an integrator (INT) mode. An amplifier in the output block is variously reconfigured to achieve the selected mode of operation. Also, the output block accommodates an autocalibration (CAL) technique by clamping the single-ended output stage and balancing, through operation of the CLDAC, signals at an input node and at an interstage node of the amplifier.

    摘要翻译: 用于在系统可编程模拟集成电路的输出块。 输出模块具有输出放大器,可接受差分电流模式输入信号,并提供单端输出电压。 输出放大器也可选择可操作为线性放大器,积分器或比较器。 输出块还包括共模反馈电路(CMFB),模拟微调电路(OATRM),钳位电路和偏移校准电路(CLDAC),全部耦合到输出放大器的差分输入。 CMFB具有与输出放大器的带宽相当的带宽,以及使差分输入能够实现单端输出转换的驱动能力。 CLAMP在比较器模式下连接到差分输入,以避免从过驱动条件恢复缓慢。 OATRM将差分电流强制为差分输入,补偿由各种不匹配产生的(增益无关)偏移电压。 CLDAC使用数模转换器(DAC)在输出放大器的差分输入端执行偏移校准。 此外,输出块被配置为可在多个用户可选模式下操作,包括在一个实施例中,一个或多个:线性(NORM)模式,比较器(COMP)模式和积分器(INT )模式。 输出块中的放大器被不同地重新配置以实现所选择的操作模式。 此外,输出块通过钳位单端输出级并通过CLDAC的操作在放大器的输入节点和级间节点处的信号进行平衡来适应自动校准(CAL)技术。

    Communication semiconductor integrated circuit device and wireless communication system
    54.
    发明授权
    Communication semiconductor integrated circuit device and wireless communication system 失效
    通信半导体集成电路器件和无线通信系统

    公开(公告)号:US06750719B2

    公开(公告)日:2004-06-15

    申请号:US10323819

    申请日:2002-12-20

    IPC分类号: H03G310

    摘要: The present invention provides a communication semiconductor integrated circuit device equipped with a high-frequency power amplifier circuit including a gain control amplifier and a bias circuit which supplies such a bias current as to linearly change the gain of the gain control amplifier, and a wireless communication system using the same. A bias current generating circuit which supplies a bias current to a linear amplifier that constitutes the communication high-frequency power amplifier circuit, comprises a plurality of variable current sources respectively different in current value and start level. These variable current sources are controlled according to an input control voltage and thereby combine their currents into a bias current. The combined bias current changes exponentially with respect to the input control voltage.

    摘要翻译: 本发明提供了一种配备有包括增益控制放大器和偏置电路的高频功率放大器电路的通信半导体集成电路装置,该偏置电路提供这样的偏置电流以线性地改变增益控制放大器的增益,以及无线通信 系统使用相同。 向构成通信高频功率放大器电路的线性放大器提供偏置电流的偏置电流产生电路包括分别与电流值和起始电平不同的多个可变电流源。 这些可变电流源根据输入控制电压进行控制,从而将它们的电流组合成偏置电流。 组合的偏置电流相对于输入控制电压呈指数变化。

    Radio-frequency amplifier
    55.
    发明授权
    Radio-frequency amplifier 失效
    射频放大器

    公开(公告)号:US06750718B2

    公开(公告)日:2004-06-15

    申请号:US10304079

    申请日:2002-11-26

    IPC分类号: H03G310

    摘要: Base biases that are supplied to an RF transistor when the RF transistor is in high output power operation and in low output power operation, respectively, are supplied from different voltage sources. When an amplifier is in high output power operation, a base bias is output from a bias circuit unit. At this time, the RF transistor operates at a constant voltage based on the bias that is output from the bias circuit unit. When the amplifier is in low output power operation, a base bias is supplied from a reference voltage terminal via a resistor. This makes it possible to decrease variation in base bias voltage. When the amplifier is in low output power operation, operation of the bias circuit unit is prohibited and hence no current is consumed in the bias circuit unit, whereby efficiency of the amplifier is increased.

    摘要翻译: 当RF晶体管分别处于高输出功率运行和低输出功率运行时,提供给RF晶体管的基极偏压由不同的电压源提供。 当放大器处于高输出功率运行时,从偏置电路单元输出基极偏置。 此时,RF晶体管基于从偏置电路单元输出的偏压而工作在恒定电压。 当放大器处于低输出功率运行时,通过电阻从参考电压端子提供基极偏置。 这使得可以减小基极偏置电压的变化。 当放大器处于低输出功率操作时,偏置电路单元的操作被禁止,因此在偏置电路单元中不消耗电流,由此放大器的效率增加。

    High frequency power amplifier, and communication apparatus
    56.
    发明授权
    High frequency power amplifier, and communication apparatus 有权
    高频功率放大器和通讯装置

    公开(公告)号:US06690237B2

    公开(公告)日:2004-02-10

    申请号:US09802132

    申请日:2001-03-09

    申请人: Naoyuki Miyazawa

    发明人: Naoyuki Miyazawa

    IPC分类号: H03G310

    摘要: The high frequency power amplifier comprises a detector which detects a collector output power (or base input power) of an amplifying transistor, and a DC/DC converter which changes a collector voltage of the amplifying transistor in proportion to the detected power. Thus, a DC power consumed by the amplifying transistor is controlled. A resistor for a base bias of the amplifying transistor is connected to the DC/DC converter, thereby interlocking the base bias control with the control of the DC/DC converter.

    摘要翻译: 高频功率放大器包括检测放大晶体管的集电极输出功率(或基极输入功率)的检测器和与检测到的功率成比例地改变放大晶体管的集电极电压的DC / DC转换器。 因此,控制由放大晶体管消耗的直流电力。 用于放大晶体管的基极偏置的电阻器连接到DC / DC转换器,从而将基极偏置控制与DC / DC转换器的控制互锁。

    Stable AGC transimpedance amplifier with expanded dynamic range

    公开(公告)号:US06583671B2

    公开(公告)日:2003-06-24

    申请号:US09910660

    申请日:2001-07-20

    IPC分类号: H03G310

    CPC分类号: H03F3/4508 H03F2203/45394

    摘要: Wide dynamic range and stability are achieved by adjusting a gain control resistance of an amplifier such that the pole ratio between the input and output is stable and by using a gain compensation technique to adjust output current. Adjustment of the gain is performed by determining a peak voltage between a gain stage and a dummy gain stage amplifier that does not amplify the input voltage. The peak voltage is compared to a gain control reference voltage and the comparison output is used to regulate both the variable gain and the gain compensation. The variable gain is performed using an FET variable resistor in a feed back loop of the amplifier. The gain compensation technique uses an FET variable resistor to adjust a voltage level of a driving transistor that adjusts an amount of current provided to an input of a current mirror. The mirrored current is then used to drain bias current from the amplifier.

    Broadband cable modem amplifier with programmable bias current
    59.
    发明授权
    Broadband cable modem amplifier with programmable bias current 有权
    具有可编程偏置电流的宽带电缆调制解调器放大器

    公开(公告)号:US06552614B1

    公开(公告)日:2003-04-22

    申请号:US09708691

    申请日:2000-11-08

    IPC分类号: H03G310

    CPC分类号: H03F1/30 H03G3/001

    摘要: An upstream programmable gain amplifier (PGA) (114, 214) for a cable modem (100) having a programmable bias current. PGA (114, 214) includes a bias current-setting circuit (140, 240) coupled to a power amplifier stage (136, 236), the bias current-setting circuit (140, 240) adapted to program the bias current Ibias of the power amplifier stage (136, 236). The bias current-setting circuit (140) includes a bandgap generator (130, 230) having an external bias resistor R1 at the input. The bias current-setting circuit (140) may include a variable gain amplifier (VGA) (134), a digital-to-analog converter (DAC) (132), and a bias code generator (138). The bias current-setting circuit (240) may alternatively include a plurality of programmable resistors R1a, R1b . . . R1x coupled to a bias code generator (238).

    摘要翻译: 一种用于具有可编程偏置电流的电缆调制解调器(100)的上游可编程增益放大器(PGA)(114,214)。 PGA(114,214)包括耦合到功率放大器级(136,236)的偏置电流设定电路(140,240),所述偏置电流设置电路(140,240)适于编程所述偏置电流Ibias 功率放大器级(136,236)。 偏置电流设定电路(140)包括在输入端具有外部偏置电阻器R1的带隙发生器(130,230)。 偏置电流设定电路(140)可以包括可变增益放大器(VGA)(134),数模转换器(DAC)(132)和偏置代码发生器(138)。 偏置电流设定电路(240)可以替代地包括多个可编程电阻器R1a,R1b。 。 。 R1x耦合到偏置码发生器(238)。

    Power amplifier and method of operating a power amplifier having multiple output-power modes
    60.
    发明授权
    Power amplifier and method of operating a power amplifier having multiple output-power modes 有权
    功率放大器和操作具有多个输出功率模式的功率放大器的方法

    公开(公告)号:US06538515B2

    公开(公告)日:2003-03-25

    申请号:US09764274

    申请日:2001-01-19

    申请人: Per-Olof Brandt

    发明人: Per-Olof Brandt

    IPC分类号: H03G310

    CPC分类号: H03F3/211 H03F3/72

    摘要: A power amplifier that operates at a high efficiency over a wide power range. In one embodiment, the power amplifier includes a first circuit having a first transistor including an input terminal for receiving an RF input, a first output terminal connected to ground, and a second output terminal connected to a first inductor connected in series with a capacitor and also connected to a voltage supply through a first controllable connector; a second circuit including a second transistor having an input terminal for receiving the radio frequency (RF) input, a first output terminal connected to ground, and a second output terminal connected to a second inductor connected in series with the capacitor and also connected to a voltage supply through a second controllable connector; and bias means for biasing the first transistor and the second transistor, wherein the first circuit is connected in parallel to the second circuit.

    摘要翻译: 功率放大器,功率范围广泛,效率高。 在一个实施例中,功率放大器包括具有第一晶体管的第一电路,第一晶体管包括用于接收RF输入的输入端,连接到地的第一输出端和连接到与电容器串联连接的第一电感器的第二输出端,以及 还通过第一可控制连接器连接到电压源; 第二电路,包括具有用于接收射频(RF)输入的输入端的第二晶体管,连接到地的第一输出端和连接到与电容器串联连接的第二电感器的第二输出端,并且还连接到 通过第二可控连接器供电; 以及用于偏置第一晶体管和第二晶体管的偏置装置,其中第一电路与第二电路并联连接。