利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

1159 条记录 (耗时 0.03 秒)

    Reflective relay processing on logical ports for channelized links in edge virtual bridging systems
    62.
    发明授权
    Reflective relay processing on logical ports for channelized links in edge virtual bridging systems 有权
    逻辑端口上的反射中继处理，用于边缘虚拟桥接系统中的信道化链路

    公开(公告)号：US09503278B2

    公开(公告)日：2016-11-22

    申请号：US13971636

    申请日：2013-08-20

    申请人： LENOVO Enterprise Solutions (Singapore) PTE, LTD.

    发明人： Vasmi M. Abidi ,  Xiang Hui Dong ,  Tamanna Z. Sait ,  Yun Sun ,  Zheng Dong Zhu

    IPC分类号： H04L12/28 ,  H04L12/46

    CPC分类号： H04L12/465 ,  Y02D30/30 ,  Y02D30/32

    摘要： Embodiments of the invention relate to reflective relay (RR) processing on logical ports for channelized links in edge virtual bridging (EVB) systems. One embodiment includes providing a virtual edge bridge (VEB) mode and a virtual Ethernet port aggregator (VEPA) mode in an EVB system on a same port of a physical switch. RR capability per channel is negotiated between a server and the physical switch in the EVB system. RR per channel is supported on the physical switch of the EVB system using RR setting information per channel.

    摘要翻译： 本发明的实施例涉及在边缘虚拟桥接（EVB）系统中用于信道化链路的逻辑端口上的反射中继（RR）处理。 一个实施例包括在物理交换机的同一端口上的EVB系统中提供虚拟边缘网桥（VEB）模式和虚拟以太网端口聚合（VEPA）模式。 在EVB系统中，服务器与物理交换机之间协商每个通道的RR能力。 EVB系统的物理交换机每个通道使用RR设置信息支持每个通道的RR。

    Sensor pattern with signal-spreading electrodes
    64.
    发明授权
    Sensor pattern with signal-spreading electrodes 有权
    具有信号扩散电极的传感器图案

    公开(公告)号：US09495050B1

    公开(公告)日：2016-11-15

    申请号：US14297115

    申请日：2014-06-05

    申请人： Cypress Semiconductor Corporation

    发明人： Oleksandr Hoshtanar ,  Igor Kravets ,  Oleksandr Karpin ,  Alexandre Gourevitch

    IPC分类号： G06F3/044

    CPC分类号： G06F3/044 ,  G01D5/24 ,  G06F2203/04107 ,  G06F2203/04111 ,  G06F2203/04112 ,  G06K9/0002 ,  H03K17/955

    摘要： A capacitive sensor array may include a plurality of row sensor electrodes and a column sensor electrode capacitively coupled with each of the plurality of row sensor electrodes to form a plurality of unit cells. For each row sensor electrode, a unit cell that is associated with the column sensor electrode and the row sensor electrode comprises an area where a capacitance between the column sensor electrode and the row sensor electrode is greater than any other capacitance between the column sensor electrode and a different row sensor electrode. The capacitive sensor array further includes a first plurality of dummy electrodes, where each of the first plurality of dummy electrodes is capacitively coupled with the column sensor electrode and two adjacent row sensor electrodes of the plurality of row sensor electrodes.

    摘要翻译： 电容传感器阵列可以包括多个行传感器电极和与多个行传感器电极中的每一个电容耦合以形成多个单元电池的列传感器电极。 对于每个行传感器电极，与列传感器电极和行传感器电极相关联的单元电池包括列传感器电极和行传感器电极之间的电容大于列传感器电极和 不同的行传感器电极。 电容传感器阵列还包括第一多个虚拟电极，其中第一多个虚拟电极中的每一个与列传感器电极和多个行传感器电极中的两个相邻的行传感器电极电容耦合。

    Touch detection techniques for capacitive touch sense systems
    65.
    发明授权
    Touch detection techniques for capacitive touch sense systems 有权
    触摸检测技术用于电容式触摸感测系统

    公开(公告)号：US09494627B1

    公开(公告)日：2016-11-15

    申请号：US13590390

    申请日：2012-08-21

    申请人： Louis W. Bokma ,  Andrew C. Page ,  Dennis R. Seguine

    发明人： Louis W. Bokma ,  Andrew C. Page ,  Dennis R. Seguine

    IPC分类号： G01R27/26 ,  G06F3/041 ,  G06F3/044

    CPC分类号： G06F3/0418 ,  G01R27/2605 ,  G06F3/041 ,  G06F3/044 ,  H03K17/955 ,  H03K17/9622 ,  H03K2217/94026 ,  H03K2217/96066 ,  H03K2217/960705

    摘要： A technique for recognizing and rejecting false activation events related to a capacitance sense interface includes measuring a capacitance value of a capacitance sense element. The measured capacitance value is analyzed to determine a baseline capacitance value for the capacitance sensor. The capacitance sense interface monitors a rate of change of the measured capacitance values and rejects an activation of the capacitance sense element as a non-touch event when the rate of change of the measured capacitance values have a magnitude greater than a threshold level, indicative of a maximum rate of change of a touch event.

    摘要翻译： 用于识别和拒绝与电容感测接口相关的假激活事件的技术包括测量电容感测元件的电容值。 分析测量的电容值以确定电容传感器的基线电容值。 当所测量的电容值的变化率具有大于阈值电平的幅度时，电容感测接口监测所测量的电容值的变化率并且拒绝电容感测元件的激活作为非触摸事件，表示 触摸事件的最大变化率。

    Pregroomer for storage array
    66.
    发明授权
    Pregroomer for storage array 有权
    存储阵列的存储器

    公开(公告)号：US09489297B2

    公开(公告)日：2016-11-08

    申请号：US13746225

    申请日：2013-01-21

    申请人： Fusion-io, Inc.

    发明人： James Peterson ,  Ned Plasson

    IPC分类号： G06F12/12 ,  G06F12/02 ,  G11C8/06

    CPC分类号： G06F12/0246 ,  G06F2212/7204 ,  G06F2212/7205 ,  G06F2212/7207 ,  G11C8/06

    摘要： Techniques are disclosed relating to arranging data on storage media. In one embodiment, a computer system is configured to access a storage array that includes a plurality of storage blocks. The computer system executes a first set of processes and a second set of processes, where the first set of processes operates on selected ones of the plurality of storage blocks to increase a likelihood that the selected storage blocks are operated on by the second set of processes. In some embodiments, the second set of processes determines whether to operate on a storage block based on an amount of invalid data within the storage block. In such an embodiment, the first set of processes increases a likelihood that the storage block is operated on by increasing the amount of invalid data within the storage block.

    摘要翻译： 公开了关于在存储介质上排列数据的技术。 在一个实施例中，计算机系统被配置为访问包括多个存储块的存储阵列。 计算机系统执行第一组进程和第二组进程，其中第一组进程对多个存储块中的选定的进程进行操作以增加所选存储块通过第二组进程操作的可能性 。 在一些实施例中，第二组进程基于存储块内的无效数据的量确定是否对存储块进行操作。 在这样的实施例中，第一组处理通过增加存储块内的无效数据的量来增加存储块的操作的可能性。

    Displaying information associated with correspondence
    67.
    发明授权
    Displaying information associated with correspondence 有权
    显示与信件相关的信息

    公开(公告)号：US09485635B2

    公开(公告)日：2016-11-01

    申请号：US14213993

    申请日：2014-03-14

    申请人： LENOVO (Singapore) PTE, LTD.

    发明人： Robert A. Bowser ,  John Weldon Nicholson ,  Rod D. Waltermann

    IPC分类号： H04W4/00 ,  H04W4/14 ,  H04L12/58

    CPC分类号： H04W4/14 ,  H04L51/16

    摘要： For displaying information associated with correspondence, a memory stores code executable by a processor. The code identifies a communication context for a communication. The communication context includes a correspondent. The code further displays information associated with the communication context. The information includes a prior communication with the correspondent.

    摘要翻译： 为了显示与通信相关联的信息，存储器存储可由处理器执行的代码。 代码识别通信的通信上下文。 通信环境包括记者。 代码进一步显示与通信上下文相关联的信息。 信息包括与通讯员的先前通信。

    Arrangement for secure independent operating environments in a computer
    69.
    发明授权
    Arrangement for secure independent operating environments in a computer 有权
    计算机中安全的独立操作环境的安排

    公开(公告)号：US09483278B2

    公开(公告)日：2016-11-01

    申请号：US14275008

    申请日：2014-05-12

    申请人： LENOVO (Singapore) PTE, LTD.

    发明人： Seiichi Kawano ,  Kenji Oka ,  Shinji Matsushima

    IPC分类号： G06F9/44 ,  G06F21/57 ,  G06F21/62 ,  G06F21/74

    CPC分类号： G06F9/441 ,  G06F9/4418 ,  G06F21/572 ,  G06F21/6209 ,  G06F21/74 ,  G06F2221/2105 ,  G06F2221/2149

    摘要： The present invention protects a memory image of an OS in a sleep state. A CPU executes a first OS or a second OS while switching there between. The first OS is loaded into a main memory, and the second OS is loaded into an auxiliary memory. The auxiliary memory may be connected to a chipset through a PCIe interface. The main memory and the auxiliary memory are configured such that, when one is in an active state where the right of access to the CPU is obtained, the other makes a transition to the sleep state where there is no right of access to the CPU while maintaining the memory image. In order to prevent one OS in the active state from accessing the main memory or the auxiliary memory in which the memory image of the other OS in the sleep state is stored, the BIOS may set a corresponding controller to disabled during a POST.

    摘要翻译： 本发明保护处于睡眠状态的OS的存储器映像。 CPU之间切换时执行第一OS或第二OS。 第一个OS被加载到主存储器中，第二个OS被加载到辅助存储器中。 辅助存储器可以通过PCIe接口连接到芯片组。 主存储器和辅助存储器被配置为使得当处于访问CPU的权限的活动状态时，另一个进入到没有CPU访问权限的睡眠状态， 保持记忆图像。 为了防止处于活动状态的一个OS访问存储休眠状态的其他OS的存储器图像的主存储器或辅助存储器，BIOS可以在POST期间将相应的控制器设置为禁用。

    Autonomous crawling assembly system
    70.
    发明授权
    Autonomous crawling assembly system 有权
    自动爬行装配系统

    公开(公告)号：US09475527B2

    公开(公告)日：2016-10-25

    申请号：US13663838

    申请日：2012-10-30

    申请人： The Boeing Company

    发明人： James Darryl Gamboa

    IPC分类号： B25B27/14 ,  B62D57/024 ,  B64F5/00

    CPC分类号： B62D57/024 ,  B64F5/10 ,  Y10T29/53983

    摘要： An automated motorized device may be configured to move on a structure for use in assembling of the structure. The automated motorized device may comprise an end effector configured to perform a plurality of assembling related functions; a first movement assembly, comprising a first plurality of dual function movement components; a second movement assembly, comprising a second plurality of dual function movement components; and a pivoting component connected concentrically to the end effector, and to at least one of the first movement assembly and the second movement assembly. Functions of each dual function movement component may comprise adhering and gliding; and during movement of the automated motorized device, one of the first movement assembly and the second movement assembly is secured to the structure while the other one of the first movement assembly and the second movement assembly moves over the structure.

    摘要翻译： 自动电动装置可以被配置为在用于组装结构的结构上移动。 自动电动装置可以包括构造成执行多个组装相关功能的末端执行器; 第一运动组件，包括第一多个双功能运动部件; 第二运动组件，包括第二多个双功能运动部件; 以及与所述端部执行器同心地连接的枢转部件，以及所述第一移动组件和所述第二移动组件中的至少一个。 每个双功能运动部件的功能可以包括粘附和滑行; 并且在所述自动电动装置的移动期间，所述第一移动组件和所述第二移动组件中的一个固定到所述结构，而所述第一移动组件和所述第二移动组件中的另一个在所述结构上移动。