Abstract:
Provided are a semiconductor integrated circuit including a unit which detects soft defects in a pull-up circuit of a static memory cell, and a soft defect detection method and a testing method thereof. The semiconductor integrated circuit includes a static memory cell, a bit line connected to a first node of the static memory cell and a complementary bit line connected to a second node of the static memory cell, and an equalization circuit connected to the bit line and the complementary bit line to equalize the bit line and the complementary bit line in response to a test signal during a test mode. The semiconductor integrated circuit and the soft defect detection method can rapidly detect soft defects in the pull-up circuit of the static memory cell without a retention test. Furthermore, the testing method can rapidly detect soft defects in the pull-up circuit of the static memory cell, allowing the test time to be drastically reduced.
Abstract:
Provided are a semiconductor integrated circuit including a unit which detects soft defects in a pull-up circuit of a static memory cell, and a soft defect detection method and a testing method thereof. The semiconductor integrated circuit includes a static memory cell, a bit line connected to a first node of the static memory cell and a complementary bit line connected to a second node of the static memory cell, and an equalization circuit connected to the bit line and the complementary bit line to equalize the bit line and the complementary bit line in response to a test signal during a test mode. The semiconductor integrated circuit and the soft defect detection method can rapidly detect soft defects in the pull-up circuit of the static memory cell without a retention test. Furthermore, the testing method can rapidly detect soft defects in the pull-up circuit of the static memory cell, allowing the test time to be drastically reduced.
Abstract:
A multi-port semiconductor memory device includes a plurality of memory cells, each having a first bitline pair and a second bitline pair, and a plurality of flipped memory cells, each having a first flipped bitline pair and a second flipped bitline pair. The memory cells and the flipped memory cells are alternately arranged in a row direction, and a predetermined preparatory memory cell is arranged between the memory cell and the flipped memory cell that are adjacent to each other at a predetermined position in the row direction. In particular, the preparatory memory cell connects the first bitline pair of the memory cell to the second bitline pair of the flipped memory cell and connects the second bitline pair of the memory cell to the first bitline pair of the flipped memory cell.
Abstract:
A metal-oxide-semiconductor field-effect transistor device includes a first active area, a first gate electrode configured to cross the first active area and extend in a Y direction, and define a first source area and a first drain area, first gate contacts disposed on the first gate electrode to align on a first virtual gate passing line extending in the Y direction, first source contacts disposed on the first source area to align on a first virtual source passing line extending in the Y direction, and first drain contacts disposed on the first drain area to align on a first virtual drain passing line extending in the Y direction, wherein at least one of the first drain contacts is disposed to align on any one of first virtual X-straight lines configured to pass between the first source contacts and extend parallel in an X direction perpendicular to the Y direction.
Abstract:
A metal-oxide-semiconductor field-effect transistor device includes a first active area, a first gate electrode configured to cross the first active area and extend in a Y direction, and define a first source area and a first drain area, first gate contacts disposed on the first gate electrode to align on a first virtual gate passing line extending in the Y direction, first source contacts disposed on the first source area to align on a first virtual source passing line extending in the Y direction, and first drain contacts disposed on the first drain area to align on a first virtual drain passing line extending in the Y direction, wherein at least one of the first drain contacts is disposed to align on any one of first virtual X-straight lines configured to pass between the first source contacts and extend parallel in an X direction perpendicular to the Y direction.
Abstract:
A plate-type heat exchanger for use in a fuel cell system that has a fuel cell stack and a reformer is provided. The heat exchanger includes a substrate and a pair of cover plates. The substrate has a first face and a second face opposite to the first face. The substrate is disposed between the cover plates, and combined with the cover plates to form a first passageway and a second passageway. The first passageway is formed in the first face and circulates steam discharged from the fuel cell stack. The steam or water condensed from the steam is supplied to a water supply source. The second passageway is formed in the second face, and circulates water supplied from the water supply source. The water is supplied to the reformer after the circulation. The heat exchanger of the present invention improves performance and efficiency of a fuel cell system.
Abstract:
A carbon monoxide treatment apparatus according to an exemplary embodiment of the present invention includes: a reactor body; a partitioning plate located inside the reactor body for partitioning an internal space of the reactor body into a first section and a second section; a channel member in the first section for transporting an introduced gas including a reformed gas and an oxidant gas to the second section; and a reaction unit around the channel member of the first section for reducing a concentration level of carbon monoxide in the introduced gas moving through the first section by utilizing a preferential oxidation reaction of the carbon monoxide and the oxidant gas of the introduced gas, wherein moisture of the introduced gas that has been partially condensed when passing through the channel member is stored in the second section.
Abstract:
A heater for heating a reformer of a fuel cell system includes a combustion chamber having a combustion catalyst layer; a distributor having an inner space and uniformly distributing a combustion fuel and an oxidant flowing along the inner space to the combustion catalyst layer of the combustion chamber; and an igniter igniting the combustion fuel and the oxidant, wherein the igniter is placed in the inner space of the distributor. Thus, the igniter is protected from combustion heat of the combustion catalyst layer and thus has improved durability.
Abstract:
A fuel cell system comprises: a fuel container for storing fuel liquefied with pressure; a reformer for generating hydrogen from the fuel through a catalyst reaction based on heat energy; an electric generator for generating electricity by transforming energy of an electrochemical reaction between hydrogen and oxygen into electric energy; a condenser for condensing water produced in the electric generator; and a heat exchanger passing through the condenser for cooling the condenser by latent heat of the fuel. With this configuration, cooling water cooled by latent heat of a fuel container is employed to cool the condenser without using a separate cooler. Furthermore, air is mixed with butane fuel without using a separate power unit, so that it is possible to achieve a more compact and highly efficient fuel cell.
Abstract:
The reformer for a fuel cell system includes a reforming reaction part that generates hydrogen gas from a fuel through a catalyst reforming reaction using heat energy, and a carbon monoxide reducing part that reduces the concentration of carbon monoxide in the hydrogen gas, through an oxidizing reaction of hydrogen gas with the oxidant. The carbon monoxide reducing part includes a first reducing part including a first carbon monoxide oxidizing catalyst and a second reducing part including a second carbon monoxide oxidizing catalyst.