公开(公告)号：US20070023925A1

公开(公告)日：2007-02-01

申请号：US11414275

申请日：2006-04-27

申请人： Chun-Chi Ke ,  Kook-Jui Tai ,  Chien-Ping Huang

发明人： Chun-Chi Ke ,  Kook-Jui Tai ,  Chien-Ping Huang

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L23/48

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device and a fabrication method thereof are provided. A first passivation layer and a second passivation layer are applied on a semiconductor substrate having at least one bond pad, with the bond pad being exposed. A first metallic layer is formed on the second passivation layer and electrically connected to the bond pad. A third passivation layer is applied on the first metallic layer and exposes a portion of the first metallic layer. A second metallic layer is formed on the third passivation layer and electrically connected to the exposed portion of the first metallic layer. A fourth passivation layer is applied on the second metallic layer and has an opening corresponding in position to the bond pad, allowing a portion of the second metallic layer to be exposed via the opening, such that a solder bump is formed on the exposed portion of the second metallic layer.

摘要翻译： 提供半导体器件及其制造方法。 将第一钝化层和第二钝化层施加到具有至少一个接合焊盘的半导体衬底上，其中焊盘被暴露。 第一金属层形成在第二钝化层上并电连接到接合焊盘。 将第三钝化层施加在第一金属层上并暴露第一金属层的一部分。 第二金属层形成在第三钝化层上并电连接到第一金属层的暴露部分。 在第二金属层上施加第四钝化层，并且具有与接合焊盘相对应的开口的开口，允许第二金属层的一部分经由开口露出，使得在露出部分上形成焊料凸块 第二金属层。

公开(公告)号：US20060160348A1

公开(公告)日：2006-07-20

申请号：US11100140

申请日：2005-04-05

申请人： Han-Ping Pu ,  Chun-Chi Ke ,  Kuo-Jui Tai ,  Cheng-Hsu Hsiao

发明人： Han-Ping Pu ,  Chun-Chi Ke ,  Kuo-Jui Tai ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/013

摘要： A semiconductor element with under bump metallurgy (UBM) structures and a fabrication method thereof are proposed. When UBM structures are formed on signal pads and ground pads on a surface of the semiconductor element that is completely fabricated with a circuit layout, a metallic layer for defining the UBM structures is retained, wherein the UBM structures on the ground pads are electrically connected to the metallic layer, and the UBM structures on the signal pads are electrically insulated from the metallic layer. This allows the metallic layer for defining the UBM structures to directly serve as a grounding layer for the semiconductor element.

摘要翻译： 提出了具有凸块下冶金（UBM）结构的半导体元件及其制造方法。 当在完全由电路布局制造的半导体元件的表面上的信号焊盘和接地焊盘上形成UBM结构时，保留用于限定UBM结构的金属层，其中接地焊盘上的UBM结构电连接到 金属层和信号焊盘上的UBM结构与金属层电绝缘。 这允许用于限定UBM结构的金属层直接用作半导体元件的接地层。