Abstract:
A data output driver and a semiconductor memory device having the same are disclosed. This data output driver includes: a rising transition slope adjuster including a plurality of first delay units cascade-connected to each other and receiving data and generating delayed data, each of the first delay units having a delay time which varies in response to a first control signal; a falling transition slope adjuster including a plurality of second delay units cascade-connected to each other and receiving inverted data and generating delayed inverted data, each of the second delay units having a delay time which varies in response to a second control signal; a pull-up driver including a plurality of pull-up circuits, the driving capabilities of the pull-up circuits being adjustable in response to a third control signal, each pull-up circuit pulling-up output data in response to each of the data and the delayed data; and a pull-down driver including a plurality of pull-down circuits, the driving capabilities of the pull-down circuits being adjustable in response to a fourth control signal, each pull-down circuit pulling-down output data in response to each of the inverted data and the delayed inverted data, wherein the first control signal varies in response to the third control signal, and wherein the second control signal varies in response to the fourth control signal. Accordingly, the rising and falling transition slopes of the output data can be constant even when the driving capability is varied, so that output data having desired characteristics can be produced.
Abstract:
A synchronous semiconductor memory device having an on-die termination (ODT) circuit, and an ODT method, satisfy ODT DC and AC parameter specifications and perform an adaptive impedance matching through an external or internal control, by executing an ODT operation synchronized to an external clock. The synchronous semiconductor memory device having a data output circuit for performing a data output operation synchronously to the external clock includes the ODT circuit for generating ODT up and down signals having the same timing as data output up and down signals for the data output operation, to perform the ODT operation.
Abstract:
An input buffer which detects an input signal. The input buffer including an output node, a first buffer, and a second buffer. The first buffer may control the voltage level of the output node when the voltage level of a reference voltage signal is equal to a predetermined voltage level. The second buffer may control the voltage level of the output node in response to the input signal when the voltage level of the reference voltage signal is lower than the predetermined voltage level. The second buffer may maintain the output node at a first level. The second buffer may include an output control section and a level control unit. The output control section may receive the input signal and generate a level output signal at a second level. The level control section may generate a control signal which maintains the output node at the first level, in response to the level output signal when the voltage level of the reference voltage signal is lower than the predetermined voltage level of the first voltage and may intercept the control signal when the voltage level of the reference voltage signal is equal to the predetermined voltage level.
Abstract:
A method and apparatus compensating for disc eccentricity includes extracting eccentricity data from a tracking error signal having one period, generated by a tracking servo, detecting parameter values of an eccentricity component extracted during the extraction of the eccentricity data and transforming a reference sine wave based on the detected parameter values of the eccentricity component. The eccentricity data is replaced with the transformed reference sine wave and the replaced eccentricity data is added to the tracking error signal to compensate for the disc eccentricity.
Abstract:
A method of discriminating an optical disc type and an apparatus thereof. The method for an optical disc system of recording and/or reproducing an optical disc that includes an optical pickup having a laser diode, an object lens, and a light receiving device, checks a track error signal while moving the object lens to upward/downward, and discriminates an optical disc type by using the magnitude of the checked track error signal. The method and apparatus discriminate the disc type in the initial stage of focusing where the object lens moves to upward/downward.
Abstract:
A method for converting position data of a mini disc into corresponding regenerating time data of a cluster and a sector in the mini disc system. The method having a first step of converting time by using a time table based on the cluster word and a second step of converting time by using a time table based on the sector byte. The first step further includes the steps of dividing the cluster word into the upper and lower bytes, respectively, creating a first time table corresponding to the upper byte of the cluster and a second time table corresponding to the lower byte of the cluster, and obtaining converted time corresponding to the upper and lower bytes of the cluster in the first and second time tables. The converted time, which is represented in predetermined time units, is generated by adding the converted time for each of the upper and lower bytes of the cluster, and the converted time for the sector byte.
Abstract:
Provided is an adjustment unit of an unpowered automatic water flushing toilet bowl seat having a function of controlling air discharge and intake only by body weight, which can adjust a water flushing time when excrement is cleaned while interworking with a rising operation of a toilet bowl seat moved by weight of a toilet user
Abstract:
Disclosed is a method of sequencing character information in order to increase precision of character recognition. The method includes: a pre-processing that extracts character information from an image to binarize the extracted character information through a predetermined threshold and extracts and thins a center line of the binarized character information; normalizing the pre-processed character information to character information according to a predetermined criteria; and sequencing the normalized character information using structural features including an end point or a divergence point of the character information. The present invention suggests an angle normalization method of input character information, a structural feature position determining method, and a structural feature numeral string generating method to strongly recognize characters configured by various fonts obtained from a natural scene regardless of an angle or a size of the characters.
Abstract:
Disclosed herein is a door of an electric oven, which has an improved configuration to prevent the escape of heat from a cooking compartment to the outside during cooking or self-cleaning of the cooking compartment. The door, which serves to selectively open or close a cooking compartment of an electric oven, includes a front glass installed to a front surface, a rear glass installed behind the front glass, and a porous plate interposed between the front glass and the rear glass. The porous plate serves to prevent the escape of heat from the cooking compartment to the outside and includes a plurality of view holes to enable observation of the cooking compartment from the outside.
Abstract:
A delay locked loop (DLL) circuit has a first delay line that delays a received external clock signal for a fine delay time and then outputs a first internal clock signal; a duty cycle correction unit that corrects a duty cycle of the first internal clock signal and then outputs a second clock signal; a second delay line that delays the second clock signal for a coarse delay time and then outputs a second internal clock signal; and a phase detection and control unit that detects the difference between the phases of the external clock signal and the fed back second internal clock signal, and controls the fine delay time and the coarse delay time. The DLL circuit performs coarse locking and fine locking by using different type delay cells, and thus consumes a small amount of power and robustly withstands jitter and variation in PVT variables.